1 /**
2 ******************************************************************************
3 * @file stm32l1xx_ll_pwr.h
4 * @author MCD Application Team
5 * @version V1.2.0
6 * @date 01-July-2016
7 * @brief Header file of PWR LL module.
8 ******************************************************************************
9 * @attention
10 *
11 * <h2><center>© COPYRIGHT(c) 2016 STMicroelectronics</center></h2>
12 *
13 * Redistribution and use in source and binary forms, with or without modification,
14 * are permitted provided that the following conditions are met:
15 * 1. Redistributions of source code must retain the above copyright notice,
16 * this list of conditions and the following disclaimer.
17 * 2. Redistributions in binary form must reproduce the above copyright notice,
18 * this list of conditions and the following disclaimer in the documentation
19 * and/or other materials provided with the distribution.
20 * 3. Neither the name of STMicroelectronics nor the names of its contributors
21 * may be used to endorse or promote products derived from this software
22 * without specific prior written permission.
23 *
24 * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
25 * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
26 * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
27 * DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE
28 * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
29 * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
30 * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER
31 * CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY,
32 * OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
33 * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
34 *
35 ******************************************************************************
36 */
37
38 /* Define to prevent recursive inclusion -------------------------------------*/
39 #ifndef __STM32L1xx_LL_PWR_H
40 #define __STM32L1xx_LL_PWR_H
41
42 #ifdef __cplusplus
43 extern "C" {
44 #endif
45
46 /* Includes ------------------------------------------------------------------*/
47 #include "stm32l1xx.h"
48
49 /** @addtogroup STM32L1xx_LL_Driver
50 * @{
51 */
52
53 #if defined(PWR)
54
55 /** @defgroup PWR_LL PWR
56 * @{
57 */
58
59 /* Private types -------------------------------------------------------------*/
60 /* Private variables ---------------------------------------------------------*/
61
62 /* Private constants ---------------------------------------------------------*/
63
64 /* Private macros ------------------------------------------------------------*/
65
66 /* Exported types ------------------------------------------------------------*/
67 /* Exported constants --------------------------------------------------------*/
68 /** @defgroup PWR_LL_Exported_Constants PWR Exported Constants
69 * @{
70 */
71
72 /** @defgroup PWR_LL_EC_CLEAR_FLAG Clear Flags Defines
73 * @brief Flags defines which can be used with LL_PWR_WriteReg function
74 * @{
75 */
76 #define LL_PWR_CR_CSBF PWR_CR_CSBF /*!< Clear standby flag */
77 #define LL_PWR_CR_CWUF PWR_CR_CWUF /*!< Clear wakeup flag */
78 /**
79 * @}
80 */
81
82 /** @defgroup PWR_LL_EC_GET_FLAG Get Flags Defines
83 * @brief Flags defines which can be used with LL_PWR_ReadReg function
84 * @{
85 */
86 #define LL_PWR_CSR_WUF PWR_CSR_WUF /*!< Wakeup flag */
87 #define LL_PWR_CSR_SBF PWR_CSR_SBF /*!< Standby flag */
88 #if defined (PWR_PVD_SUPPORT)
89 #define LL_PWR_CSR_PVDO PWR_CSR_PVDO /*!< Power voltage detector output flag */
90 #endif
91 #if defined (PWR_CSR_VREFINTRDYF)
92 #define LL_PWR_CSR_VREFINTRDYF PWR_CSR_VREFINTRDYF /*!< VREFINT ready flag */
93 #endif
94 #define LL_PWR_CSR_VOSF PWR_CSR_VOSF /*!< Voltage scaling select flag */
95 #define LL_PWR_CSR_REGLPF PWR_CSR_REGLPF /*!< Regulator low power flag */
96 #define LL_PWR_CSR_EWUP1 PWR_CSR_EWUP1 /*!< Enable WKUP pin 1 */
97 #define LL_PWR_CSR_EWUP2 PWR_CSR_EWUP2 /*!< Enable WKUP pin 2 */
98 #if defined (PWR_CSR_EWUP3)
99 #define LL_PWR_CSR_EWUP3 PWR_CSR_EWUP3 /*!< Enable WKUP pin 3 */
100 #endif /* PWR_CSR_EWUP3 */
101 /**
102 * @}
103 */
104
105 /** @defgroup PWR_LL_EC_REGU_VOLTAGE Regulator Voltage
106 * @{
107 */
108 #define LL_PWR_REGU_VOLTAGE_SCALE1 (PWR_CR_VOS_0) /*!< 1.8V (range 1) */
109 #define LL_PWR_REGU_VOLTAGE_SCALE2 (PWR_CR_VOS_1) /*!< 1.5V (range 2) */
110 #define LL_PWR_REGU_VOLTAGE_SCALE3 (PWR_CR_VOS_0 | PWR_CR_VOS_1) /*!< 1.2V (range 3) */
111 /**
112 * @}
113 */
114
115 /** @defgroup PWR_LL_EC_MODE_PWR Mode Power
116 * @{
117 */
118 #define LL_PWR_MODE_STOP ((uint32_t)0x00000000U) /*!< Enter Stop mode when the CPU enters deepsleep */
119 #define LL_PWR_MODE_STANDBY (PWR_CR_PDDS) /*!< Enter Standby mode when the CPU enters deepsleep */
120 /**
121 * @}
122 */
123
124 /** @defgroup PWR_LL_EC_REGU_MODE_LP_MODES Regulator Mode In Low Power Modes
125 * @{
126 */
127 #define LL_PWR_REGU_LPMODES_MAIN ((uint32_t)0x00000000U) /*!< Voltage regulator in main mode during deepsleep/sleep/low-power run mode */
128 #define LL_PWR_REGU_LPMODES_LOW_POWER (PWR_CR_LPSDSR) /*!< Voltage regulator in low-power mode during deepsleep/sleep/low-power run mode */
129 /**
130 * @}
131 */
132
133 #if defined(PWR_CR_LPDS)
134 /** @defgroup PWR_LL_EC_REGU_MODE_DS_MODE Regulator Mode In Deep Sleep Mode
135 * @{
136 */
137 #define LL_PWR_REGU_DSMODE_MAIN ((uint32_t)0x00000000U) /*!< Voltage regulator in main mode during deepsleep mode */
138 #define LL_PWR_REGU_DSMODE_LOW_POWER (PWR_CR_LPDS) /*!< Voltage regulator in low-power mode during deepsleep mode */
139 /**
140 * @}
141 */
142 #endif /* PWR_CR_LPDS */
143
144 #if defined (PWR_PVD_SUPPORT)
145 /** @defgroup PWR_LL_EC_PVDLEVEL Power Voltage Detector Level
146 * @{
147 */
148 #define LL_PWR_PVDLEVEL_0 (PWR_CR_PLS_LEV0) /*!< Voltage threshold detected by PVD 1.9 V */
149 #define LL_PWR_PVDLEVEL_1 (PWR_CR_PLS_LEV1) /*!< Voltage threshold detected by PVD 2.1 V */
150 #define LL_PWR_PVDLEVEL_2 (PWR_CR_PLS_LEV2) /*!< Voltage threshold detected by PVD 2.3 V */
151 #define LL_PWR_PVDLEVEL_3 (PWR_CR_PLS_LEV3) /*!< Voltage threshold detected by PVD 2.5 V */
152 #define LL_PWR_PVDLEVEL_4 (PWR_CR_PLS_LEV4) /*!< Voltage threshold detected by PVD 2.7 V */
153 #define LL_PWR_PVDLEVEL_5 (PWR_CR_PLS_LEV5) /*!< Voltage threshold detected by PVD 2.9 V */
154 #define LL_PWR_PVDLEVEL_6 (PWR_CR_PLS_LEV6) /*!< Voltage threshold detected by PVD 3.1 V */
155 #define LL_PWR_PVDLEVEL_7 (PWR_CR_PLS_LEV7) /*!< External input analog voltage (Compare internally to VREFINT) */
156 /**
157 * @}
158 */
159 #endif
160
161 /** @defgroup PWR_LL_EC_WAKEUP_PIN Wakeup Pins
162 * @{
163 */
164 #define LL_PWR_WAKEUP_PIN1 (PWR_CSR_EWUP1) /*!< WKUP pin 1 : PA0 */
165 #define LL_PWR_WAKEUP_PIN2 (PWR_CSR_EWUP2) /*!< WKUP pin 2 : PC13 */
166 #if defined (PWR_CSR_EWUP3)
167 #define LL_PWR_WAKEUP_PIN3 (PWR_CSR_EWUP3) /*!< WKUP pin 3 : PE6 or PA2 according to device */
168 #endif /* PWR_CSR_EWUP3 */
169 /**
170 * @}
171 */
172
173 /**
174 * @}
175 */
176
177
178 /* Exported macro ------------------------------------------------------------*/
179 /** @defgroup PWR_LL_Exported_Macros PWR Exported Macros
180 * @{
181 */
182
183 /** @defgroup PWR_LL_EM_WRITE_READ Common write and read registers Macros
184 * @{
185 */
186
187 /**
188 * @brief Write a value in PWR register
189 * @param __REG__ Register to be written
190 * @param __VALUE__ Value to be written in the register
191 * @retval None
192 */
193 #define LL_PWR_WriteReg(__REG__, __VALUE__) WRITE_REG(PWR->__REG__, (__VALUE__))
194
195 /**
196 * @brief Read a value in PWR register
197 * @param __REG__ Register to be read
198 * @retval Register value
199 */
200 #define LL_PWR_ReadReg(__REG__) READ_REG(PWR->__REG__)
201 /**
202 * @}
203 */
204
205 /**
206 * @}
207 */
208
209
210 /* Exported functions --------------------------------------------------------*/
211 /** @defgroup PWR_LL_Exported_Functions PWR Exported Functions
212 * @{
213 */
214
215 /** @defgroup PWR_LL_EF_Configuration Configuration
216 * @{
217 */
218
219 /**
220 * @brief Switch the regulator from main mode to low-power mode
221 * @rmtoll CR LPRUN LL_PWR_EnableLowPowerRunMode
222 * @note Remind to set the regulator to low power before enabling
223 * LowPower run mode (bit @ref LL_PWR_REGU_LPMODES_LOW_POWER).
224 * @retval None
225 */
LL_PWR_EnableLowPowerRunMode(void)226 __STATIC_INLINE void LL_PWR_EnableLowPowerRunMode(void)
227 {
228 SET_BIT(PWR->CR, PWR_CR_LPRUN);
229 }
230
231 /**
232 * @brief Switch the regulator from low-power mode to main mode
233 * @rmtoll CR LPRUN LL_PWR_DisableLowPowerRunMode
234 * @retval None
235 */
LL_PWR_DisableLowPowerRunMode(void)236 __STATIC_INLINE void LL_PWR_DisableLowPowerRunMode(void)
237 {
238 CLEAR_BIT(PWR->CR, PWR_CR_LPRUN);
239 }
240
241 /**
242 * @brief Check if the regulator is in low-power mode
243 * @rmtoll CR LPRUN LL_PWR_IsEnabledLowPowerRunMode
244 * @retval State of bit (1 or 0).
245 */
LL_PWR_IsEnabledLowPowerRunMode(void)246 __STATIC_INLINE uint32_t LL_PWR_IsEnabledLowPowerRunMode(void)
247 {
248 return (READ_BIT(PWR->CR, PWR_CR_LPRUN) == (PWR_CR_LPRUN));
249 }
250
251 /**
252 * @brief Set voltage regulator to low-power and switch from
253 * run main mode to run low-power mode.
254 * @rmtoll CR LPSDSR LL_PWR_EnterLowPowerRunMode\n
255 * CR LPRUN LL_PWR_EnterLowPowerRunMode
256 * @note This "high level" function is introduced to provide functional
257 * compatibility with other families. Notice that the two registers
258 * have to be written sequentially, so this function is not atomic.
259 * To assure atomicity you can call separately the following functions:
260 * - @ref LL_PWR_SetRegulModeLP(@ref LL_PWR_REGU_LPMODES_LOW_POWER);
261 * - @ref LL_PWR_EnableLowPowerRunMode();
262 * @retval None
263 */
LL_PWR_EnterLowPowerRunMode(void)264 __STATIC_INLINE void LL_PWR_EnterLowPowerRunMode(void)
265 {
266 SET_BIT(PWR->CR, PWR_CR_LPSDSR); /* => LL_PWR_SetRegulModeLP(LL_PWR_REGU_LPMODES_LOW_POWER) */
267 SET_BIT(PWR->CR, PWR_CR_LPRUN); /* => LL_PWR_EnableLowPowerRunMode() */
268 }
269
270 /**
271 * @brief Set voltage regulator to main and switch from
272 * run main mode to low-power mode.
273 * @rmtoll CR LPSDSR LL_PWR_ExitLowPowerRunMode\n
274 * CR LPRUN LL_PWR_ExitLowPowerRunMode
275 * @note This "high level" function is introduced to provide functional
276 * compatibility with other families. Notice that the two registers
277 * have to be written sequentially, so this function is not atomic.
278 * To assure atomicity you can call separately the following functions:
279 * - @ref LL_PWR_DisableLowPowerRunMode();
280 * - @ref LL_PWR_SetRegulModeLP(@ref LL_PWR_REGU_LPMODES_MAIN);
281 * @retval None
282 */
LL_PWR_ExitLowPowerRunMode(void)283 __STATIC_INLINE void LL_PWR_ExitLowPowerRunMode(void)
284 {
285 CLEAR_BIT(PWR->CR, PWR_CR_LPRUN); /* => LL_PWR_DisableLowPowerRunMode() */
286 CLEAR_BIT(PWR->CR, PWR_CR_LPSDSR); /* => LL_PWR_SetRegulModeLP(LL_PWR_REGU_LPMODES_MAIN) */
287 }
288
289 /**
290 * @brief Set the main internal regulator output voltage
291 * @rmtoll CR VOS LL_PWR_SetRegulVoltageScaling
292 * @param VoltageScaling This parameter can be one of the following values:
293 * @arg @ref LL_PWR_REGU_VOLTAGE_SCALE1
294 * @arg @ref LL_PWR_REGU_VOLTAGE_SCALE2
295 * @arg @ref LL_PWR_REGU_VOLTAGE_SCALE3
296 * @retval None
297 */
LL_PWR_SetRegulVoltageScaling(uint32_t VoltageScaling)298 __STATIC_INLINE void LL_PWR_SetRegulVoltageScaling(uint32_t VoltageScaling)
299 {
300 MODIFY_REG(PWR->CR, PWR_CR_VOS, VoltageScaling);
301 }
302
303 /**
304 * @brief Get the main internal regulator output voltage
305 * @rmtoll CR VOS LL_PWR_GetRegulVoltageScaling
306 * @retval Returned value can be one of the following values:
307 * @arg @ref LL_PWR_REGU_VOLTAGE_SCALE1
308 * @arg @ref LL_PWR_REGU_VOLTAGE_SCALE2
309 * @arg @ref LL_PWR_REGU_VOLTAGE_SCALE3
310 */
LL_PWR_GetRegulVoltageScaling(void)311 __STATIC_INLINE uint32_t LL_PWR_GetRegulVoltageScaling(void)
312 {
313 return (uint32_t)(READ_BIT(PWR->CR, PWR_CR_VOS));
314 }
315
316 /**
317 * @brief Enable access to the backup domain
318 * @rmtoll CR DBP LL_PWR_EnableBkUpAccess
319 * @retval None
320 */
LL_PWR_EnableBkUpAccess(void)321 __STATIC_INLINE void LL_PWR_EnableBkUpAccess(void)
322 {
323 SET_BIT(PWR->CR, PWR_CR_DBP);
324 }
325
326 /**
327 * @brief Disable access to the backup domain
328 * @rmtoll CR DBP LL_PWR_DisableBkUpAccess
329 * @retval None
330 */
LL_PWR_DisableBkUpAccess(void)331 __STATIC_INLINE void LL_PWR_DisableBkUpAccess(void)
332 {
333 CLEAR_BIT(PWR->CR, PWR_CR_DBP);
334 }
335
336 /**
337 * @brief Check if the backup domain is enabled
338 * @rmtoll CR DBP LL_PWR_IsEnabledBkUpAccess
339 * @retval State of bit (1 or 0).
340 */
LL_PWR_IsEnabledBkUpAccess(void)341 __STATIC_INLINE uint32_t LL_PWR_IsEnabledBkUpAccess(void)
342 {
343 return (READ_BIT(PWR->CR, PWR_CR_DBP) == (PWR_CR_DBP));
344 }
345
346 /**
347 * @brief Set voltage regulator mode during low power modes
348 * @rmtoll CR LPSDSR LL_PWR_SetRegulModeLP
349 * @param RegulMode This parameter can be one of the following values:
350 * @arg @ref LL_PWR_REGU_LPMODES_MAIN
351 * @arg @ref LL_PWR_REGU_LPMODES_LOW_POWER
352 * @retval None
353 */
LL_PWR_SetRegulModeLP(uint32_t RegulMode)354 __STATIC_INLINE void LL_PWR_SetRegulModeLP(uint32_t RegulMode)
355 {
356 MODIFY_REG(PWR->CR, PWR_CR_LPSDSR, RegulMode);
357 }
358
359 /**
360 * @brief Get voltage regulator mode during low power modes
361 * @rmtoll CR LPSDSR LL_PWR_GetRegulModeLP
362 * @retval Returned value can be one of the following values:
363 * @arg @ref LL_PWR_REGU_LPMODES_MAIN
364 * @arg @ref LL_PWR_REGU_LPMODES_LOW_POWER
365 */
LL_PWR_GetRegulModeLP(void)366 __STATIC_INLINE uint32_t LL_PWR_GetRegulModeLP(void)
367 {
368 return (uint32_t)(READ_BIT(PWR->CR, PWR_CR_LPSDSR));
369 }
370
371 #if defined(PWR_CR_LPDS)
372 /**
373 * @brief Set voltage regulator mode during deep sleep mode
374 * @rmtoll CR LPDS LL_PWR_SetRegulModeDS
375 * @param RegulMode This parameter can be one of the following values:
376 * @arg @ref LL_PWR_REGU_DSMODE_MAIN
377 * @arg @ref LL_PWR_REGU_DSMODE_LOW_POWER
378 * @retval None
379 */
LL_PWR_SetRegulModeDS(uint32_t RegulMode)380 __STATIC_INLINE void LL_PWR_SetRegulModeDS(uint32_t RegulMode)
381 {
382 MODIFY_REG(PWR->CR, PWR_CR_LPDS, RegulMode);
383 }
384
385 /**
386 * @brief Get voltage regulator mode during deep sleep mode
387 * @rmtoll CR LPDS LL_PWR_GetRegulModeDS
388 * @retval Returned value can be one of the following values:
389 * @arg @ref LL_PWR_REGU_DSMODE_MAIN
390 * @arg @ref LL_PWR_REGU_DSMODE_LOW_POWER
391 */
LL_PWR_GetRegulModeDS(void)392 __STATIC_INLINE uint32_t LL_PWR_GetRegulModeDS(void)
393 {
394 return (uint32_t)(READ_BIT(PWR->CR, PWR_CR_LPDS));
395 }
396 #endif /* PWR_CR_LPDS */
397
398 /**
399 * @brief Set power down mode when CPU enters deepsleep
400 * @rmtoll CR PDDS LL_PWR_SetPowerMode
401 * @param PDMode This parameter can be one of the following values:
402 * @arg @ref LL_PWR_MODE_STOP
403 * @arg @ref LL_PWR_MODE_STANDBY
404 * @note Set the regulator to low power (bit @ref LL_PWR_REGU_LPMODES_LOW_POWER)
405 * before setting MODE_STOP. If the regulator remains in "main mode",
406 * it consumes more power without providing any additional feature.
407 * In MODE_STANDBY the regulator is automatically off.
408 * @retval None
409 */
LL_PWR_SetPowerMode(uint32_t PDMode)410 __STATIC_INLINE void LL_PWR_SetPowerMode(uint32_t PDMode)
411 {
412 MODIFY_REG(PWR->CR, PWR_CR_PDDS, PDMode);
413 }
414
415 /**
416 * @brief Get power down mode when CPU enters deepsleep
417 * @rmtoll CR PDDS LL_PWR_GetPowerMode
418 * @retval Returned value can be one of the following values:
419 * @arg @ref LL_PWR_MODE_STOP
420 * @arg @ref LL_PWR_MODE_STANDBY
421 */
LL_PWR_GetPowerMode(void)422 __STATIC_INLINE uint32_t LL_PWR_GetPowerMode(void)
423 {
424 return (uint32_t)(READ_BIT(PWR->CR, PWR_CR_PDDS));
425 }
426
427 #if defined (PWR_PVD_SUPPORT)
428 /**
429 * @brief Configure the voltage threshold detected by the Power Voltage Detector
430 * @rmtoll CR PLS LL_PWR_SetPVDLevel
431 * @param PVDLevel This parameter can be one of the following values:
432 * @arg @ref LL_PWR_PVDLEVEL_0
433 * @arg @ref LL_PWR_PVDLEVEL_1
434 * @arg @ref LL_PWR_PVDLEVEL_2
435 * @arg @ref LL_PWR_PVDLEVEL_3
436 * @arg @ref LL_PWR_PVDLEVEL_4
437 * @arg @ref LL_PWR_PVDLEVEL_5
438 * @arg @ref LL_PWR_PVDLEVEL_6
439 * @arg @ref LL_PWR_PVDLEVEL_7
440 * @retval None
441 */
LL_PWR_SetPVDLevel(uint32_t PVDLevel)442 __STATIC_INLINE void LL_PWR_SetPVDLevel(uint32_t PVDLevel)
443 {
444 MODIFY_REG(PWR->CR, PWR_CR_PLS, PVDLevel);
445 }
446
447 /**
448 * @brief Get the voltage threshold detection
449 * @rmtoll CR PLS LL_PWR_GetPVDLevel
450 * @retval Returned value can be one of the following values:
451 * @arg @ref LL_PWR_PVDLEVEL_0
452 * @arg @ref LL_PWR_PVDLEVEL_1
453 * @arg @ref LL_PWR_PVDLEVEL_2
454 * @arg @ref LL_PWR_PVDLEVEL_3
455 * @arg @ref LL_PWR_PVDLEVEL_4
456 * @arg @ref LL_PWR_PVDLEVEL_5
457 * @arg @ref LL_PWR_PVDLEVEL_6
458 * @arg @ref LL_PWR_PVDLEVEL_7
459 */
LL_PWR_GetPVDLevel(void)460 __STATIC_INLINE uint32_t LL_PWR_GetPVDLevel(void)
461 {
462 return (uint32_t)(READ_BIT(PWR->CR, PWR_CR_PLS));
463 }
464
465 /**
466 * @brief Enable Power Voltage Detector
467 * @rmtoll CR PVDE LL_PWR_EnablePVD
468 * @retval None
469 */
LL_PWR_EnablePVD(void)470 __STATIC_INLINE void LL_PWR_EnablePVD(void)
471 {
472 SET_BIT(PWR->CR, PWR_CR_PVDE);
473 }
474
475 /**
476 * @brief Disable Power Voltage Detector
477 * @rmtoll CR PVDE LL_PWR_DisablePVD
478 * @retval None
479 */
LL_PWR_DisablePVD(void)480 __STATIC_INLINE void LL_PWR_DisablePVD(void)
481 {
482 CLEAR_BIT(PWR->CR, PWR_CR_PVDE);
483 }
484
485 /**
486 * @brief Check if Power Voltage Detector is enabled
487 * @rmtoll CR PVDE LL_PWR_IsEnabledPVD
488 * @retval State of bit (1 or 0).
489 */
LL_PWR_IsEnabledPVD(void)490 __STATIC_INLINE uint32_t LL_PWR_IsEnabledPVD(void)
491 {
492 return (READ_BIT(PWR->CR, PWR_CR_PVDE) == (PWR_CR_PVDE));
493 }
494 #endif
495
496 /**
497 * @brief Enable the WakeUp PINx functionality
498 * @rmtoll CSR EWUP1 LL_PWR_EnableWakeUpPin\n
499 * CSR EWUP2 LL_PWR_EnableWakeUpPin\n
500 * CSR EWUP3 LL_PWR_EnableWakeUpPin
501 * @param WakeUpPin This parameter can be one of the following values:
502 * @arg @ref LL_PWR_WAKEUP_PIN1
503 * @arg @ref LL_PWR_WAKEUP_PIN2
504 * @arg @ref LL_PWR_WAKEUP_PIN3 (*)
505 *
506 * (*) not available on all devices
507 * @retval None
508 */
LL_PWR_EnableWakeUpPin(uint32_t WakeUpPin)509 __STATIC_INLINE void LL_PWR_EnableWakeUpPin(uint32_t WakeUpPin)
510 {
511 SET_BIT(PWR->CSR, WakeUpPin);
512 }
513
514 /**
515 * @brief Disable the WakeUp PINx functionality
516 * @rmtoll CSR EWUP1 LL_PWR_DisableWakeUpPin\n
517 * CSR EWUP2 LL_PWR_DisableWakeUpPin\n
518 * CSR EWUP3 LL_PWR_DisableWakeUpPin
519 * @param WakeUpPin This parameter can be one of the following values:
520 * @arg @ref LL_PWR_WAKEUP_PIN1
521 * @arg @ref LL_PWR_WAKEUP_PIN2
522 * @arg @ref LL_PWR_WAKEUP_PIN3 (*)
523 *
524 * (*) not available on all devices
525 * @retval None
526 */
LL_PWR_DisableWakeUpPin(uint32_t WakeUpPin)527 __STATIC_INLINE void LL_PWR_DisableWakeUpPin(uint32_t WakeUpPin)
528 {
529 CLEAR_BIT(PWR->CSR, WakeUpPin);
530 }
531
532 /**
533 * @brief Check if the WakeUp PINx functionality is enabled
534 * @rmtoll CSR EWUP1 LL_PWR_IsEnabledWakeUpPin\n
535 * CSR EWUP2 LL_PWR_IsEnabledWakeUpPin\n
536 * CSR EWUP3 LL_PWR_IsEnabledWakeUpPin
537 * @param WakeUpPin This parameter can be one of the following values:
538 * @arg @ref LL_PWR_WAKEUP_PIN1
539 * @arg @ref LL_PWR_WAKEUP_PIN2
540 * @arg @ref LL_PWR_WAKEUP_PIN3 (*)
541 *
542 * (*) not available on all devices
543 * @retval State of bit (1 or 0).
544 */
LL_PWR_IsEnabledWakeUpPin(uint32_t WakeUpPin)545 __STATIC_INLINE uint32_t LL_PWR_IsEnabledWakeUpPin(uint32_t WakeUpPin)
546 {
547 return (READ_BIT(PWR->CSR, WakeUpPin) == (WakeUpPin));
548 }
549
550 /**
551 * @brief Enable ultra low-power mode by enabling VREFINT switch off in low-power modes
552 * @rmtoll CR ULP LL_PWR_EnableUltraLowPower
553 * @retval None
554 */
LL_PWR_EnableUltraLowPower(void)555 __STATIC_INLINE void LL_PWR_EnableUltraLowPower(void)
556 {
557 SET_BIT(PWR->CR, PWR_CR_ULP);
558 }
559
560 /**
561 * @brief Disable ultra low-power mode by disabling VREFINT switch off in low-power modes
562 * @rmtoll CR ULP LL_PWR_DisableUltraLowPower
563 * @retval None
564 */
LL_PWR_DisableUltraLowPower(void)565 __STATIC_INLINE void LL_PWR_DisableUltraLowPower(void)
566 {
567 CLEAR_BIT(PWR->CR, PWR_CR_ULP);
568 }
569
570 /**
571 * @brief Check if ultra low-power mode is enabled by checking if VREFINT switch off in low-power modes is enabled
572 * @rmtoll CR ULP LL_PWR_IsEnabledUltraLowPower
573 * @retval State of bit (1 or 0).
574 */
LL_PWR_IsEnabledUltraLowPower(void)575 __STATIC_INLINE uint32_t LL_PWR_IsEnabledUltraLowPower(void)
576 {
577 return (READ_BIT(PWR->CR, PWR_CR_ULP) == (PWR_CR_ULP));
578 }
579
580 /**
581 * @brief Enable fast wakeup by ignoring VREFINT startup time when exiting from low-power mode
582 * @rmtoll CR FWU LL_PWR_EnableFastWakeUp
583 * @note Works in conjunction with ultra low power mode.
584 * @retval None
585 */
LL_PWR_EnableFastWakeUp(void)586 __STATIC_INLINE void LL_PWR_EnableFastWakeUp(void)
587 {
588 SET_BIT(PWR->CR, PWR_CR_FWU);
589 }
590
591 /**
592 * @brief Disable fast wakeup by waiting VREFINT startup time when exiting from low-power mode
593 * @rmtoll CR FWU LL_PWR_DisableFastWakeUp
594 * @note Works in conjunction with ultra low power mode.
595 * @retval None
596 */
LL_PWR_DisableFastWakeUp(void)597 __STATIC_INLINE void LL_PWR_DisableFastWakeUp(void)
598 {
599 CLEAR_BIT(PWR->CR, PWR_CR_FWU);
600 }
601
602 /**
603 * @brief Check if fast wakeup is enabled by checking if VREFINT startup time when exiting from low-power mode is ignored
604 * @rmtoll CR FWU LL_PWR_IsEnabledFastWakeUp
605 * @retval State of bit (1 or 0).
606 */
LL_PWR_IsEnabledFastWakeUp(void)607 __STATIC_INLINE uint32_t LL_PWR_IsEnabledFastWakeUp(void)
608 {
609 return (READ_BIT(PWR->CR, PWR_CR_FWU) == (PWR_CR_FWU));
610 }
611
612 /**
613 * @}
614 */
615
616 /** @defgroup PWR_LL_EF_FLAG_Management FLAG_Management
617 * @{
618 */
619
620 /**
621 * @brief Get Wake-up Flag
622 * @rmtoll CSR WUF LL_PWR_IsActiveFlag_WU
623 * @retval State of bit (1 or 0).
624 */
LL_PWR_IsActiveFlag_WU(void)625 __STATIC_INLINE uint32_t LL_PWR_IsActiveFlag_WU(void)
626 {
627 return (READ_BIT(PWR->CSR, PWR_CSR_WUF) == (PWR_CSR_WUF));
628 }
629
630 /**
631 * @brief Get Standby Flag
632 * @rmtoll CSR SBF LL_PWR_IsActiveFlag_SB
633 * @retval State of bit (1 or 0).
634 */
LL_PWR_IsActiveFlag_SB(void)635 __STATIC_INLINE uint32_t LL_PWR_IsActiveFlag_SB(void)
636 {
637 return (READ_BIT(PWR->CSR, PWR_CSR_SBF) == (PWR_CSR_SBF));
638 }
639
640 #if defined (PWR_PVD_SUPPORT)
641 /**
642 * @brief Indicate whether VDD voltage is below the selected PVD threshold
643 * @rmtoll CSR PVDO LL_PWR_IsActiveFlag_PVDO
644 * @retval State of bit (1 or 0).
645 */
LL_PWR_IsActiveFlag_PVDO(void)646 __STATIC_INLINE uint32_t LL_PWR_IsActiveFlag_PVDO(void)
647 {
648 return (READ_BIT(PWR->CSR, PWR_CSR_PVDO) == (PWR_CSR_PVDO));
649 }
650 #endif
651
652 #if defined (PWR_CSR_VREFINTRDYF)
653 /**
654 * @brief Get Internal Reference VrefInt Flag
655 * @rmtoll CSR VREFINTRDYF LL_PWR_IsActiveFlag_VREFINTRDY
656 * @retval State of bit (1 or 0).
657 */
LL_PWR_IsActiveFlag_VREFINTRDY(void)658 __STATIC_INLINE uint32_t LL_PWR_IsActiveFlag_VREFINTRDY(void)
659 {
660 return (READ_BIT(PWR->CSR, PWR_CSR_VREFINTRDYF) == (PWR_CSR_VREFINTRDYF));
661 }
662 #endif
663
664 /**
665 * @brief Indicate whether the regulator is ready in the selected voltage range or if its output voltage is still changing to the required voltage level
666 * @rmtoll CSR VOSF LL_PWR_IsActiveFlag_VOSF
667 * @retval State of bit (1 or 0).
668 */
LL_PWR_IsActiveFlag_VOSF(void)669 __STATIC_INLINE uint32_t LL_PWR_IsActiveFlag_VOSF(void)
670 {
671 return (READ_BIT(PWR->CSR, PWR_CSR_VOSF) == (PWR_CSR_VOSF));
672 }
673
674 /**
675 * @brief Indicate whether the regulator is ready in main mode or is in low-power mode
676 * @rmtoll CSR REGLPF LL_PWR_IsActiveFlag_REGLPF
677 * @note Take care, return value "0" means the regulator is ready. Return value "1" means the output voltage range is still changing.
678 * @retval State of bit (1 or 0).
679 */
LL_PWR_IsActiveFlag_REGLPF(void)680 __STATIC_INLINE uint32_t LL_PWR_IsActiveFlag_REGLPF(void)
681 {
682 return (READ_BIT(PWR->CSR, PWR_CSR_REGLPF) == (PWR_CSR_REGLPF));
683 }
684
685 /**
686 * @brief Clear Standby Flag
687 * @rmtoll CR CSBF LL_PWR_ClearFlag_SB
688 * @retval None
689 */
LL_PWR_ClearFlag_SB(void)690 __STATIC_INLINE void LL_PWR_ClearFlag_SB(void)
691 {
692 SET_BIT(PWR->CR, PWR_CR_CSBF);
693 }
694
695 /**
696 * @brief Clear Wake-up Flags
697 * @rmtoll CR CWUF LL_PWR_ClearFlag_WU
698 * @retval None
699 */
LL_PWR_ClearFlag_WU(void)700 __STATIC_INLINE void LL_PWR_ClearFlag_WU(void)
701 {
702 SET_BIT(PWR->CR, PWR_CR_CWUF);
703 }
704
705
706 #if defined(USE_FULL_LL_DRIVER)
707 /** @defgroup PWR_LL_EF_Init De-initialization function
708 * @{
709 */
710 ErrorStatus LL_PWR_DeInit(void);
711 /**
712 * @}
713 */
714 #endif /* USE_FULL_LL_DRIVER */
715
716 /**
717 * @}
718 */
719
720 /**
721 * @}
722 */
723
724 /**
725 * @}
726 */
727
728 #endif /* defined(PWR) */
729
730 /**
731 * @}
732 */
733
734 #ifdef __cplusplus
735 }
736 #endif
737
738 #endif /* __STM32L1xx_LL_PWR_H */
739
740 /************************ (C) COPYRIGHT STMicroelectronics *****END OF FILE****/
741