1 /** @file 2 3 Copyright (c) 2013-2015 Intel Corporation. 4 5 SPDX-License-Identifier: BSD-2-Clause-Patent 6 7 8 **/ 9 10 #ifndef _SPI_FLASH_DEVICE_H_ 11 #define _SPI_FLASH_DEVICE_H_ 12 13 #include <PiDxe.h> 14 #include <Protocol/Spi.h> 15 #include <Protocol/FirmwareVolumeBlock.h> 16 17 // 18 // Supported SPI Flash Devices 19 // 20 typedef enum { 21 EnumSpiFlash25L3205D, // Macronix 32Mbit part 22 EnumSpiFlashW25Q32, // Winbond 32Mbit part 23 EnumSpiFlashW25X32, // Winbond 32Mbit part 24 EnumSpiFlashAT25DF321, // Atmel 32Mbit part 25 EnumSpiFlashQH25F320, // Intel 32Mbit part 26 EnumSpiFlash25VF064C, // SST 64Mbit part 27 EnumSpiFlashM25PX64, // NUMONYX 64Mbit part 28 EnumSpiFlashAT25DF641, // Atmel 64Mbit part 29 EnumSpiFlashS25FL064K, // Spansion 64Mbit part 30 EnumSpiFlash25L6405D, // Macronix 64Mbit part 31 EnumSpiFlashW25Q64, // Winbond 64Mbit part 32 EnumSpiFlashW25X64, // Winbond 64Mbit part 33 EnumSpiFlashQH25F640, // Intel 64Mbit part 34 EnumSpiFlashMax 35 } SPI_FLASH_TYPES_SUPPORTED; 36 37 // 38 // Flash Device commands 39 // 40 // If a supported device uses a command different from the list below, a device specific command 41 // will be defined just below it's JEDEC id section. 42 // 43 #define SPI_COMMAND_WRITE 0x02 44 #define SPI_COMMAND_WRITE_AAI 0xAD 45 #define SPI_COMMAND_READ 0x03 46 #define SPI_COMMAND_ERASE 0x20 47 #define SPI_COMMAND_WRITE_DISABLE 0x04 48 #define SPI_COMMAND_READ_S 0x05 49 #define SPI_COMMAND_WRITE_ENABLE 0x06 50 #define SPI_COMMAND_READ_ID 0xAB 51 #define SPI_COMMAND_JEDEC_ID 0x9F 52 #define SPI_COMMAND_WRITE_S_EN 0x50 53 #define SPI_COMMAND_WRITE_S 0x01 54 #define SPI_COMMAND_CHIP_ERASE 0xC7 55 #define SPI_COMMAND_BLOCK_ERASE 0xD8 56 57 // 58 // Flash JEDEC device ids 59 // 60 // SST 8Mbit part 61 // 62 #define SPI_SST25VF080B_ID1 0xBF 63 #define SPI_SST25VF080B_ID2 0x25 64 #define SPI_SST25VF080B_ID3 0x8E 65 // 66 // SST 16Mbit part 67 // 68 #define SPI_SST25VF016B_ID1 0xBF 69 #define SPI_SST25VF016B_ID2 0x25 70 #define SPI_SST25V016BF_ID3 0x41 71 // 72 // Macronix 32Mbit part 73 // 74 // MX25 part does not support WRITE_AAI comand (0xAD) 75 // 76 #define SPI_MX25L3205_ID1 0xC2 77 #define SPI_MX25L3205_ID2 0x20 78 #define SPI_MX25L3205_ID3 0x16 79 // 80 // Intel 32Mbit part bottom boot 81 // 82 #define SPI_QH25F320_ID1 0x89 83 #define SPI_QH25F320_ID2 0x89 84 #define SPI_QH25F320_ID3 0x12 // 32Mbit bottom boot 85 // 86 // Intel 64Mbit part bottom boot 87 // 88 #define SPI_QH25F640_ID1 0x89 89 #define SPI_QH25F640_ID2 0x89 90 #define SPI_QH25F640_ID3 0x13 // 64Mbit bottom boot 91 // 92 // QH part does not support command 0x20 for erase; only 0xD8 (sector erase) 93 // QH part has 0x40 command for erase of parameter block (8 x 8K blocks at bottom of part) 94 // 0x40 command ignored if address outside of parameter block range 95 // 96 #define SPI_QH25F320_COMMAND_PBLOCK_ERASE 0x40 97 // 98 // Winbond 32Mbit part 99 // 100 #define SPI_W25X32_ID1 0xEF 101 #define SPI_W25X32_ID2 0x30 // Memory Type 102 #define SPI_W25X32_ID3 0x16 // Capacity 103 #define SF_DEVICE_ID1_W25Q32 0x16 104 105 // 106 // Winbond 64Mbit part 107 // 108 #define SPI_W25X64_ID1 0xEF 109 #define SPI_W25X64_ID2 0x30 // Memory Type 110 #define SPI_W25X64_ID3 0x17 // Capacity 111 #define SF_DEVICE_ID0_W25QXX 0x40 112 #define SF_DEVICE_ID1_W25Q64 0x17 113 // 114 // Winbond 128Mbit part 115 // 116 #define SF_DEVICE_ID0_W25Q128 0x40 117 #define SF_DEVICE_ID1_W25Q128 0x18 118 119 // 120 // Atmel 32Mbit part 121 // 122 #define SPI_AT26DF321_ID1 0x1F 123 #define SPI_AT26DF321_ID2 0x47 // [7:5]=Family, [4:0]=Density 124 #define SPI_AT26DF321_ID3 0x00 125 126 #define SF_VENDOR_ID_ATMEL 0x1F 127 #define SF_DEVICE_ID0_AT25DF641 0x48 128 #define SF_DEVICE_ID1_AT25DF641 0x00 129 130 // 131 // SST 8Mbit part 132 // 133 #define SPI_SST25VF080B_ID1 0xBF 134 #define SPI_SST25VF080B_ID2 0x25 135 #define SPI_SST25VF080B_ID3 0x8E 136 #define SF_DEVICE_ID0_25VF064C 0x25 137 #define SF_DEVICE_ID1_25VF064C 0x4B 138 139 // 140 // SST 16Mbit part 141 // 142 #define SPI_SST25VF016B_ID1 0xBF 143 #define SPI_SST25VF016B_ID2 0x25 144 #define SPI_SST25V016BF_ID3 0x41 145 146 // 147 // Winbond 32Mbit part 148 // 149 #define SPI_W25X32_ID1 0xEF 150 #define SPI_W25X32_ID2 0x30 // Memory Type 151 #define SPI_W25X32_ID3 0x16 // Capacity 152 153 #define SF_VENDOR_ID_MX 0xC2 154 #define SF_DEVICE_ID0_25L6405D 0x20 155 #define SF_DEVICE_ID1_25L6405D 0x17 156 157 #define SF_VENDOR_ID_NUMONYX 0x20 158 #define SF_DEVICE_ID0_M25PX64 0x71 159 #define SF_DEVICE_ID1_M25PX64 0x17 160 161 // 162 // Spansion 64Mbit part 163 // 164 #define SF_VENDOR_ID_SPANSION 0xEF 165 #define SF_DEVICE_ID0_S25FL064K 0x40 166 #define SF_DEVICE_ID1_S25FL064K 0x00 167 168 // 169 // index for prefix opcodes 170 // 171 #define SPI_WREN_INDEX 0 // Prefix Opcode 0: SPI_COMMAND_WRITE_ENABLE 172 #define SPI_EWSR_INDEX 1 // Prefix Opcode 1: SPI_COMMAND_WRITE_S_EN 173 #define BIOS_CTRL 0xDC 174 175 #define PFAB_CARD_DEVICE_ID 0x5150 176 #define PFAB_CARD_VENDOR_ID 0x8086 177 #define PFAB_CARD_SETUP_REGISTER 0x40 178 #define PFAB_CARD_SETUP_BYTE 0x0d 179 180 181 #endif 182