1// Generated, DO NOT EDIT, 2// but copy it to your own project and rename the package. 3// See more at http://github.com/klauspost/cpuid 4 5package cpuid 6 7import ( 8 "fmt" 9 "testing" 10) 11 12// There is no real way to test a CPU identifier, since results will 13// obviously differ on each machine. 14func TestCPUID(t *testing.T) { 15 n := maxFunctionID() 16 t.Logf("Max Function:0x%x\n", n) 17 n = maxExtendedFunction() 18 t.Logf("Max Extended Function:0x%x\n", n) 19 t.Log("Name:", cpu.brandname) 20 t.Log("PhysicalCores:", cpu.physicalcores) 21 t.Log("ThreadsPerCore:", cpu.threadspercore) 22 t.Log("LogicalCores:", cpu.logicalcores) 23 t.Log("Family", cpu.family, "Model:", cpu.model) 24 t.Log("Features:", cpu.features) 25 t.Log("Cacheline bytes:", cpu.cacheline) 26 t.Log("L1 Instruction Cache:", cpu.cache.l1i, "bytes") 27 t.Log("L1 Data Cache:", cpu.cache.l1d, "bytes") 28 t.Log("L2 Cache:", cpu.cache.l2, "bytes") 29 t.Log("L3 Cache:", cpu.cache.l3, "bytes") 30 31 if cpu.sse2() { 32 t.Log("We have SSE2") 33 } 34} 35 36func TestDumpCPUID(t *testing.T) { 37 n := int(maxFunctionID()) 38 for i := 0; i <= n; i++ { 39 a, b, c, d := cpuidex(uint32(i), 0) 40 t.Logf("CPUID %08x: %08x-%08x-%08x-%08x", i, a, b, c, d) 41 ex := uint32(1) 42 for { 43 a2, b2, c2, d2 := cpuidex(uint32(i), ex) 44 if a2 == a && b2 == b && d2 == d || ex > 50 || a2 == 0 { 45 break 46 } 47 t.Logf("CPUID %08x: %08x-%08x-%08x-%08x", i, a2, b2, c2, d2) 48 a, b, c, d = a2, b2, c2, d2 49 ex++ 50 } 51 } 52 n2 := maxExtendedFunction() 53 for i := uint32(0x80000000); i <= n2; i++ { 54 a, b, c, d := cpuid(i) 55 t.Logf("CPUID %08x: %08x-%08x-%08x-%08x", i, a, b, c, d) 56 } 57} 58 59func example() { 60 // Print basic CPU information: 61 fmt.Println("Name:", cpu.brandname) 62 fmt.Println("PhysicalCores:", cpu.physicalcores) 63 fmt.Println("ThreadsPerCore:", cpu.threadspercore) 64 fmt.Println("LogicalCores:", cpu.logicalcores) 65 fmt.Println("Family", cpu.family, "Model:", cpu.model) 66 fmt.Println("Features:", cpu.features) 67 fmt.Println("Cacheline bytes:", cpu.cacheline) 68 69 // Test if we have a specific feature: 70 if cpu.sse() { 71 fmt.Println("We have Streaming SIMD Extensions") 72 } 73} 74 75func TestBrandNameZero(t *testing.T) { 76 if len(cpu.brandname) > 0 { 77 // Cut out last byte 78 last := []byte(cpu.brandname[len(cpu.brandname)-1:]) 79 if last[0] == 0 { 80 t.Fatal("last byte was zero") 81 } else if last[0] == 32 { 82 t.Fatal("whitespace wasn't trimmed") 83 } 84 } 85} 86 87// Generated here: http://play.golang.org/p/mko-0tFt0Q 88 89// TestCmov tests Cmov() function 90func TestCmov(t *testing.T) { 91 got := cpu.cmov() 92 expected := cpu.features&cmov == cmov 93 if got != expected { 94 t.Fatalf("Cmov: expected %v, got %v", expected, got) 95 } 96 t.Log("CMOV Support:", got) 97} 98 99// TestAmd3dnow tests Amd3dnow() function 100func TestAmd3dnow(t *testing.T) { 101 got := cpu.amd3dnow() 102 expected := cpu.features&amd3dnow == amd3dnow 103 if got != expected { 104 t.Fatalf("Amd3dnow: expected %v, got %v", expected, got) 105 } 106 t.Log("AMD3DNOW Support:", got) 107} 108 109// TestAmd3dnowExt tests Amd3dnowExt() function 110func TestAmd3dnowExt(t *testing.T) { 111 got := cpu.amd3dnowext() 112 expected := cpu.features&amd3dnowext == amd3dnowext 113 if got != expected { 114 t.Fatalf("Amd3dnowExt: expected %v, got %v", expected, got) 115 } 116 t.Log("AMD3DNOWEXT Support:", got) 117} 118 119// TestMMX tests MMX() function 120func TestMMX(t *testing.T) { 121 got := cpu.mmx() 122 expected := cpu.features&mmx == mmx 123 if got != expected { 124 t.Fatalf("MMX: expected %v, got %v", expected, got) 125 } 126 t.Log("MMX Support:", got) 127} 128 129// TestMMXext tests MMXext() function 130func TestMMXext(t *testing.T) { 131 got := cpu.mmxext() 132 expected := cpu.features&mmxext == mmxext 133 if got != expected { 134 t.Fatalf("MMXExt: expected %v, got %v", expected, got) 135 } 136 t.Log("MMXEXT Support:", got) 137} 138 139// TestSSE tests SSE() function 140func TestSSE(t *testing.T) { 141 got := cpu.sse() 142 expected := cpu.features&sse == sse 143 if got != expected { 144 t.Fatalf("SSE: expected %v, got %v", expected, got) 145 } 146 t.Log("SSE Support:", got) 147} 148 149// TestSSE2 tests SSE2() function 150func TestSSE2(t *testing.T) { 151 got := cpu.sse2() 152 expected := cpu.features&sse2 == sse2 153 if got != expected { 154 t.Fatalf("SSE2: expected %v, got %v", expected, got) 155 } 156 t.Log("SSE2 Support:", got) 157} 158 159// TestSSE3 tests SSE3() function 160func TestSSE3(t *testing.T) { 161 got := cpu.sse3() 162 expected := cpu.features&sse3 == sse3 163 if got != expected { 164 t.Fatalf("SSE3: expected %v, got %v", expected, got) 165 } 166 t.Log("SSE3 Support:", got) 167} 168 169// TestSSSE3 tests SSSE3() function 170func TestSSSE3(t *testing.T) { 171 got := cpu.ssse3() 172 expected := cpu.features&ssse3 == ssse3 173 if got != expected { 174 t.Fatalf("SSSE3: expected %v, got %v", expected, got) 175 } 176 t.Log("SSSE3 Support:", got) 177} 178 179// TestSSE4 tests SSE4() function 180func TestSSE4(t *testing.T) { 181 got := cpu.sse4() 182 expected := cpu.features&sse4 == sse4 183 if got != expected { 184 t.Fatalf("SSE4: expected %v, got %v", expected, got) 185 } 186 t.Log("SSE4 Support:", got) 187} 188 189// TestSSE42 tests SSE42() function 190func TestSSE42(t *testing.T) { 191 got := cpu.sse42() 192 expected := cpu.features&sse42 == sse42 193 if got != expected { 194 t.Fatalf("SSE42: expected %v, got %v", expected, got) 195 } 196 t.Log("SSE42 Support:", got) 197} 198 199// TestAVX tests AVX() function 200func TestAVX(t *testing.T) { 201 got := cpu.avx() 202 expected := cpu.features&avx == avx 203 if got != expected { 204 t.Fatalf("AVX: expected %v, got %v", expected, got) 205 } 206 t.Log("AVX Support:", got) 207} 208 209// TestAVX2 tests AVX2() function 210func TestAVX2(t *testing.T) { 211 got := cpu.avx2() 212 expected := cpu.features&avx2 == avx2 213 if got != expected { 214 t.Fatalf("AVX2: expected %v, got %v", expected, got) 215 } 216 t.Log("AVX2 Support:", got) 217} 218 219// TestFMA3 tests FMA3() function 220func TestFMA3(t *testing.T) { 221 got := cpu.fma3() 222 expected := cpu.features&fma3 == fma3 223 if got != expected { 224 t.Fatalf("FMA3: expected %v, got %v", expected, got) 225 } 226 t.Log("FMA3 Support:", got) 227} 228 229// TestFMA4 tests FMA4() function 230func TestFMA4(t *testing.T) { 231 got := cpu.fma4() 232 expected := cpu.features&fma4 == fma4 233 if got != expected { 234 t.Fatalf("FMA4: expected %v, got %v", expected, got) 235 } 236 t.Log("FMA4 Support:", got) 237} 238 239// TestXOP tests XOP() function 240func TestXOP(t *testing.T) { 241 got := cpu.xop() 242 expected := cpu.features&xop == xop 243 if got != expected { 244 t.Fatalf("XOP: expected %v, got %v", expected, got) 245 } 246 t.Log("XOP Support:", got) 247} 248 249// TestF16C tests F16C() function 250func TestF16C(t *testing.T) { 251 got := cpu.f16c() 252 expected := cpu.features&f16c == f16c 253 if got != expected { 254 t.Fatalf("F16C: expected %v, got %v", expected, got) 255 } 256 t.Log("F16C Support:", got) 257} 258 259// TestCX16 tests CX16() function 260func TestCX16(t *testing.T) { 261 got := cpu.cx16() 262 expected := cpu.features&cx16 == cx16 263 if got != expected { 264 t.Fatalf("CX16: expected %v, got %v", expected, got) 265 } 266 t.Log("CX16 Support:", got) 267} 268 269// TestSGX tests SGX() function 270func TestSGX(t *testing.T) { 271 got := cpu.sgx.available 272 expected := cpu.features&sgx == sgx 273 if got != expected { 274 t.Fatalf("SGX: expected %v, got %v", expected, got) 275 } 276 t.Log("SGX Support:", got) 277} 278 279// TestBMI1 tests BMI1() function 280func TestBMI1(t *testing.T) { 281 got := cpu.bmi1() 282 expected := cpu.features&bmi1 == bmi1 283 if got != expected { 284 t.Fatalf("BMI1: expected %v, got %v", expected, got) 285 } 286 t.Log("BMI1 Support:", got) 287} 288 289// TestBMI2 tests BMI2() function 290func TestBMI2(t *testing.T) { 291 got := cpu.bmi2() 292 expected := cpu.features&bmi2 == bmi2 293 if got != expected { 294 t.Fatalf("BMI2: expected %v, got %v", expected, got) 295 } 296 t.Log("BMI2 Support:", got) 297} 298 299// TestTBM tests TBM() function 300func TestTBM(t *testing.T) { 301 got := cpu.tbm() 302 expected := cpu.features&tbm == tbm 303 if got != expected { 304 t.Fatalf("TBM: expected %v, got %v", expected, got) 305 } 306 t.Log("TBM Support:", got) 307} 308 309// TestLzcnt tests Lzcnt() function 310func TestLzcnt(t *testing.T) { 311 got := cpu.lzcnt() 312 expected := cpu.features&lzcnt == lzcnt 313 if got != expected { 314 t.Fatalf("Lzcnt: expected %v, got %v", expected, got) 315 } 316 t.Log("LZCNT Support:", got) 317} 318 319// TestLzcnt tests Lzcnt() function 320func TestPopcnt(t *testing.T) { 321 got := cpu.popcnt() 322 expected := cpu.features&popcnt == popcnt 323 if got != expected { 324 t.Fatalf("Popcnt: expected %v, got %v", expected, got) 325 } 326 t.Log("POPCNT Support:", got) 327} 328 329// TestAesNi tests AesNi() function 330func TestAesNi(t *testing.T) { 331 got := cpu.aesni() 332 expected := cpu.features&aesni == aesni 333 if got != expected { 334 t.Fatalf("AesNi: expected %v, got %v", expected, got) 335 } 336 t.Log("AESNI Support:", got) 337} 338 339// TestHTT tests HTT() function 340func TestHTT(t *testing.T) { 341 got := cpu.htt() 342 expected := cpu.features&htt == htt 343 if got != expected { 344 t.Fatalf("HTT: expected %v, got %v", expected, got) 345 } 346 t.Log("HTT Support:", got) 347} 348 349// TestClmul tests Clmul() function 350func TestClmul(t *testing.T) { 351 got := cpu.clmul() 352 expected := cpu.features&clmul == clmul 353 if got != expected { 354 t.Fatalf("Clmul: expected %v, got %v", expected, got) 355 } 356 t.Log("CLMUL Support:", got) 357} 358 359// TestSSE2Slow tests SSE2Slow() function 360func TestSSE2Slow(t *testing.T) { 361 got := cpu.sse2slow() 362 expected := cpu.features&sse2slow == sse2slow 363 if got != expected { 364 t.Fatalf("SSE2Slow: expected %v, got %v", expected, got) 365 } 366 t.Log("SSE2SLOW Support:", got) 367} 368 369// TestSSE3Slow tests SSE3slow() function 370func TestSSE3Slow(t *testing.T) { 371 got := cpu.sse3slow() 372 expected := cpu.features&sse3slow == sse3slow 373 if got != expected { 374 t.Fatalf("SSE3slow: expected %v, got %v", expected, got) 375 } 376 t.Log("SSE3SLOW Support:", got) 377} 378 379// TestAtom tests Atom() function 380func TestAtom(t *testing.T) { 381 got := cpu.atom() 382 expected := cpu.features&atom == atom 383 if got != expected { 384 t.Fatalf("Atom: expected %v, got %v", expected, got) 385 } 386 t.Log("ATOM Support:", got) 387} 388 389// TestNX tests NX() function (NX (No-Execute) bit) 390func TestNX(t *testing.T) { 391 got := cpu.nx() 392 expected := cpu.features&nx == nx 393 if got != expected { 394 t.Fatalf("NX: expected %v, got %v", expected, got) 395 } 396 t.Log("NX Support:", got) 397} 398 399// TestSSE4A tests SSE4A() function (AMD Barcelona microarchitecture SSE4a instructions) 400func TestSSE4A(t *testing.T) { 401 got := cpu.sse4a() 402 expected := cpu.features&sse4a == sse4a 403 if got != expected { 404 t.Fatalf("SSE4A: expected %v, got %v", expected, got) 405 } 406 t.Log("SSE4A Support:", got) 407} 408 409// TestHLE tests HLE() function (Hardware Lock Elision) 410func TestHLE(t *testing.T) { 411 got := cpu.hle() 412 expected := cpu.features&hle == hle 413 if got != expected { 414 t.Fatalf("HLE: expected %v, got %v", expected, got) 415 } 416 t.Log("HLE Support:", got) 417} 418 419// TestRTM tests RTM() function (Restricted Transactional Memory) 420func TestRTM(t *testing.T) { 421 got := cpu.rtm() 422 expected := cpu.features&rtm == rtm 423 if got != expected { 424 t.Fatalf("RTM: expected %v, got %v", expected, got) 425 } 426 t.Log("RTM Support:", got) 427} 428 429// TestRdrand tests RDRAND() function (RDRAND instruction is available) 430func TestRdrand(t *testing.T) { 431 got := cpu.rdrand() 432 expected := cpu.features&rdrand == rdrand 433 if got != expected { 434 t.Fatalf("Rdrand: expected %v, got %v", expected, got) 435 } 436 t.Log("Rdrand Support:", got) 437} 438 439// TestRdseed tests RDSEED() function (RDSEED instruction is available) 440func TestRdseed(t *testing.T) { 441 got := cpu.rdseed() 442 expected := cpu.features&rdseed == rdseed 443 if got != expected { 444 t.Fatalf("Rdseed: expected %v, got %v", expected, got) 445 } 446 t.Log("Rdseed Support:", got) 447} 448 449// TestADX tests ADX() function (Intel ADX (Multi-Precision Add-Carry Instruction Extensions)) 450func TestADX(t *testing.T) { 451 got := cpu.adx() 452 expected := cpu.features&adx == adx 453 if got != expected { 454 t.Fatalf("ADX: expected %v, got %v", expected, got) 455 } 456 t.Log("ADX Support:", got) 457} 458 459// TestSHA tests SHA() function (Intel SHA Extensions) 460func TestSHA(t *testing.T) { 461 got := cpu.sha() 462 expected := cpu.features&sha == sha 463 if got != expected { 464 t.Fatalf("SHA: expected %v, got %v", expected, got) 465 } 466 t.Log("SHA Support:", got) 467} 468 469// TestAVX512F tests AVX512F() function (AVX-512 Foundation) 470func TestAVX512F(t *testing.T) { 471 got := cpu.avx512f() 472 expected := cpu.features&avx512f == avx512f 473 if got != expected { 474 t.Fatalf("AVX512F: expected %v, got %v", expected, got) 475 } 476 t.Log("AVX512F Support:", got) 477} 478 479// TestAVX512DQ tests AVX512DQ() function (AVX-512 Doubleword and Quadword Instructions) 480func TestAVX512DQ(t *testing.T) { 481 got := cpu.avx512dq() 482 expected := cpu.features&avx512dq == avx512dq 483 if got != expected { 484 t.Fatalf("AVX512DQ: expected %v, got %v", expected, got) 485 } 486 t.Log("AVX512DQ Support:", got) 487} 488 489// TestAVX512IFMA tests AVX512IFMA() function (AVX-512 Integer Fused Multiply-Add Instructions) 490func TestAVX512IFMA(t *testing.T) { 491 got := cpu.avx512ifma() 492 expected := cpu.features&avx512ifma == avx512ifma 493 if got != expected { 494 t.Fatalf("AVX512IFMA: expected %v, got %v", expected, got) 495 } 496 t.Log("AVX512IFMA Support:", got) 497} 498 499// TestAVX512PF tests AVX512PF() function (AVX-512 Prefetch Instructions) 500func TestAVX512PF(t *testing.T) { 501 got := cpu.avx512pf() 502 expected := cpu.features&avx512pf == avx512pf 503 if got != expected { 504 t.Fatalf("AVX512PF: expected %v, got %v", expected, got) 505 } 506 t.Log("AVX512PF Support:", got) 507} 508 509// TestAVX512ER tests AVX512ER() function (AVX-512 Exponential and Reciprocal Instructions) 510func TestAVX512ER(t *testing.T) { 511 got := cpu.avx512er() 512 expected := cpu.features&avx512er == avx512er 513 if got != expected { 514 t.Fatalf("AVX512ER: expected %v, got %v", expected, got) 515 } 516 t.Log("AVX512ER Support:", got) 517} 518 519// TestAVX512CD tests AVX512CD() function (AVX-512 Conflict Detection Instructions) 520func TestAVX512CD(t *testing.T) { 521 got := cpu.avx512cd() 522 expected := cpu.features&avx512cd == avx512cd 523 if got != expected { 524 t.Fatalf("AVX512CD: expected %v, got %v", expected, got) 525 } 526 t.Log("AVX512CD Support:", got) 527} 528 529// TestAVX512BW tests AVX512BW() function (AVX-512 Byte and Word Instructions) 530func TestAVX512BW(t *testing.T) { 531 got := cpu.avx512bw() 532 expected := cpu.features&avx512bw == avx512bw 533 if got != expected { 534 t.Fatalf("AVX512BW: expected %v, got %v", expected, got) 535 } 536 t.Log("AVX512BW Support:", got) 537} 538 539// TestAVX512VL tests AVX512VL() function (AVX-512 Vector Length Extensions) 540func TestAVX512VL(t *testing.T) { 541 got := cpu.avx512vl() 542 expected := cpu.features&avx512vl == avx512vl 543 if got != expected { 544 t.Fatalf("AVX512VL: expected %v, got %v", expected, got) 545 } 546 t.Log("AVX512VL Support:", got) 547} 548 549// TestAVX512VL tests AVX512VBMI() function (AVX-512 Vector Bit Manipulation Instructions) 550func TestAVX512VBMI(t *testing.T) { 551 got := cpu.avx512vbmi() 552 expected := cpu.features&avx512vbmi == avx512vbmi 553 if got != expected { 554 t.Fatalf("AVX512VBMI: expected %v, got %v", expected, got) 555 } 556 t.Log("AVX512VBMI Support:", got) 557} 558 559// TestMPX tests MPX() function (Intel MPX (Memory Protection Extensions)) 560func TestMPX(t *testing.T) { 561 got := cpu.mpx() 562 expected := cpu.features&mpx == mpx 563 if got != expected { 564 t.Fatalf("MPX: expected %v, got %v", expected, got) 565 } 566 t.Log("MPX Support:", got) 567} 568 569// TestERMS tests ERMS() function (Enhanced REP MOVSB/STOSB) 570func TestERMS(t *testing.T) { 571 got := cpu.erms() 572 expected := cpu.features&erms == erms 573 if got != expected { 574 t.Fatalf("ERMS: expected %v, got %v", expected, got) 575 } 576 t.Log("ERMS Support:", got) 577} 578 579// TestVendor writes the detected vendor. Will be 0 if unknown 580func TestVendor(t *testing.T) { 581 t.Log("Vendor ID:", cpu.vendorid) 582} 583 584// Intel returns true if vendor is recognized as Intel 585func TestIntel(t *testing.T) { 586 got := cpu.intel() 587 expected := cpu.vendorid == intel 588 if got != expected { 589 t.Fatalf("TestIntel: expected %v, got %v", expected, got) 590 } 591 t.Log("TestIntel:", got) 592} 593 594// AMD returns true if vendor is recognized as AMD 595func TestAMD(t *testing.T) { 596 got := cpu.amd() 597 expected := cpu.vendorid == amd 598 if got != expected { 599 t.Fatalf("TestAMD: expected %v, got %v", expected, got) 600 } 601 t.Log("TestAMD:", got) 602} 603 604// Hygon returns true if vendor is recognized as Hygon 605func TestHygon(t *testing.T) { 606 got := cpu.hygon() 607 expected := cpu.vendorid == hygon 608 if got != expected { 609 t.Fatalf("TestHygon: expected %v, got %v", expected, got) 610 } 611 t.Log("TestHygon:", got) 612} 613 614// Transmeta returns true if vendor is recognized as Transmeta 615func TestTransmeta(t *testing.T) { 616 got := cpu.transmeta() 617 expected := cpu.vendorid == transmeta 618 if got != expected { 619 t.Fatalf("TestTransmeta: expected %v, got %v", expected, got) 620 } 621 t.Log("TestTransmeta:", got) 622} 623 624// NSC returns true if vendor is recognized as National Semiconductor 625func TestNSC(t *testing.T) { 626 got := cpu.nsc() 627 expected := cpu.vendorid == nsc 628 if got != expected { 629 t.Fatalf("TestNSC: expected %v, got %v", expected, got) 630 } 631 t.Log("TestNSC:", got) 632} 633 634// VIA returns true if vendor is recognized as VIA 635func TestVIA(t *testing.T) { 636 got := cpu.via() 637 expected := cpu.vendorid == via 638 if got != expected { 639 t.Fatalf("TestVIA: expected %v, got %v", expected, got) 640 } 641 t.Log("TestVIA:", got) 642} 643 644// Test VM function 645func TestVM(t *testing.T) { 646 t.Log("Vendor ID:", cpu.vm()) 647} 648 649// NSC returns true if vendor is recognized as National Semiconductor 650func TestCPUInfo_TSX(t *testing.T) { 651 got := cpu.tsx() 652 expected := cpu.hle() && cpu.rtm() 653 if got != expected { 654 t.Fatalf("TestNSC: expected %v, got %v", expected, got) 655 } 656 t.Log("TestNSC:", got) 657} 658 659// Test RTCounter function 660func TestRtCounter(t *testing.T) { 661 a := cpu.rtcounter() 662 b := cpu.rtcounter() 663 t.Log("CPU Counter:", a, b, b-a) 664} 665 666// Prints the value of Ia32TscAux() 667func TestIa32TscAux(t *testing.T) { 668 ecx := cpu.ia32tscaux() 669 t.Logf("Ia32TscAux:0x%x\n", ecx) 670 if ecx != 0 { 671 chip := (ecx & 0xFFF000) >> 12 672 core := ecx & 0xFFF 673 t.Log("Likely chip, core:", chip, core) 674 } 675} 676 677func TestThreadsPerCoreNZ(t *testing.T) { 678 if cpu.threadspercore == 0 { 679 t.Fatal("threads per core is zero") 680 } 681} 682 683// Prints the value of LogicalCPU() 684func TestLogicalCPU(t *testing.T) { 685 t.Log("Currently executing on cpu:", cpu.logicalcpu()) 686} 687 688func TestMaxFunction(t *testing.T) { 689 expect := maxFunctionID() 690 if cpu.maxFunc != expect { 691 t.Fatal("Max function does not match, expected", expect, "but got", cpu.maxFunc) 692 } 693 expect = maxExtendedFunction() 694 if cpu.maxExFunc != expect { 695 t.Fatal("Max Extended function does not match, expected", expect, "but got", cpu.maxFunc) 696 } 697} 698 699// This example will calculate the chip/core number on Linux 700// Linux encodes numa id (<<12) and core id (8bit) into TSC_AUX. 701func examplecpuinfo_ia32tscaux() { 702 ecx := cpu.ia32tscaux() 703 if ecx == 0 { 704 fmt.Println("Unknown CPU ID") 705 return 706 } 707 chip := (ecx & 0xFFF000) >> 12 708 core := ecx & 0xFFF 709 fmt.Println("Chip, Core:", chip, core) 710} 711 712/* 713func TestPhysical(t *testing.T) { 714 var test16 = "CPUID 00000000: 0000000d-756e6547-6c65746e-49656e69 \nCPUID 00000001: 000206d7-03200800-1fbee3ff-bfebfbff \nCPUID 00000002: 76035a01-00f0b2ff-00000000-00ca0000 \nCPUID 00000003: 00000000-00000000-00000000-00000000 \nCPUID 00000004: 3c004121-01c0003f-0000003f-00000000 \nCPUID 00000004: 3c004122-01c0003f-0000003f-00000000 \nCPUID 00000004: 3c004143-01c0003f-000001ff-00000000 \nCPUID 00000004: 3c07c163-04c0003f-00003fff-00000006 \nCPUID 00000005: 00000040-00000040-00000003-00021120 \nCPUID 00000006: 00000075-00000002-00000009-00000000 \nCPUID 00000007: 00000000-00000000-00000000-00000000 \nCPUID 00000008: 00000000-00000000-00000000-00000000 \nCPUID 00000009: 00000001-00000000-00000000-00000000 \nCPUID 0000000a: 07300403-00000000-00000000-00000603 \nCPUID 0000000b: 00000000-00000000-00000003-00000003 \nCPUID 0000000b: 00000005-00000010-00000201-00000003 \nCPUID 0000000c: 00000000-00000000-00000000-00000000 \nCPUID 0000000d: 00000007-00000340-00000340-00000000 \nCPUID 0000000d: 00000001-00000000-00000000-00000000 \nCPUID 0000000d: 00000100-00000240-00000000-00000000 \nCPUID 80000000: 80000008-00000000-00000000-00000000 \nCPUID 80000001: 00000000-00000000-00000001-2c100800 \nCPUID 80000002: 20202020-49202020-6c65746e-20295228 \nCPUID 80000003: 6e6f6558-20295228-20555043-322d3545 \nCPUID 80000004: 20303636-20402030-30322e32-007a4847 \nCPUID 80000005: 00000000-00000000-00000000-00000000 \nCPUID 80000006: 00000000-00000000-01006040-00000000 \nCPUID 80000007: 00000000-00000000-00000000-00000100 \nCPUID 80000008: 0000302e-00000000-00000000-00000000" 715 restore := mockCPU([]byte(test16)) 716 Detect() 717 t.Log("Name:", CPU.BrandName) 718 n := maxFunctionID() 719 t.Logf("Max Function:0x%x\n", n) 720 n = maxExtendedFunction() 721 t.Logf("Max Extended Function:0x%x\n", n) 722 t.Log("PhysicalCores:", CPU.PhysicalCores) 723 t.Log("ThreadsPerCore:", CPU.ThreadsPerCore) 724 t.Log("LogicalCores:", CPU.LogicalCores) 725 t.Log("Family", CPU.Family, "Model:", CPU.Model) 726 t.Log("Features:", CPU.Features) 727 t.Log("Cacheline bytes:", CPU.CacheLine) 728 t.Log("L1 Instruction Cache:", CPU.Cache.L1I, "bytes") 729 t.Log("L1 Data Cache:", CPU.Cache.L1D, "bytes") 730 t.Log("L2 Cache:", CPU.Cache.L2, "bytes") 731 t.Log("L3 Cache:", CPU.Cache.L3, "bytes") 732 if CPU.LogicalCores > 0 && CPU.PhysicalCores > 0 { 733 if CPU.LogicalCores != CPU.PhysicalCores*CPU.ThreadsPerCore { 734 t.Fatalf("Core count mismatch, LogicalCores (%d) != PhysicalCores (%d) * CPU.ThreadsPerCore (%d)", 735 CPU.LogicalCores, CPU.PhysicalCores, CPU.ThreadsPerCore) 736 } 737 } 738 739 if CPU.ThreadsPerCore > 1 && !CPU.HTT() { 740 t.Fatalf("Hyperthreading not detected") 741 } 742 if CPU.ThreadsPerCore == 1 && CPU.HTT() { 743 t.Fatalf("Hyperthreading detected, but only 1 Thread per core") 744 } 745 restore() 746 Detect() 747 TestCPUID(t) 748} 749*/ 750