1 // SPDX-License-Identifier: GPL-2.0+
2 /*
3  * Copyright (C) 2020 Engicam s.r.l.
4  * Copyright (C) 2020 Amarula Solutions(India)
5  * Author: Jagan Teki <jagan@amarulasolutions.com>
6  */
7 
8 #include <common.h>
9 #include <hang.h>
10 #include <init.h>
11 #include <log.h>
12 #include <spl.h>
13 #include <asm/mach-imx/iomux-v3.h>
14 #include <asm/arch/clock.h>
15 #include <asm/arch/imx8mm_pins.h>
16 #include <asm/arch/sys_proto.h>
17 #include <asm/mach-imx/boot_mode.h>
18 #include <asm/arch/ddr.h>
19 
20 DECLARE_GLOBAL_DATA_PTR;
21 
spl_board_boot_device(enum boot_device boot_dev_spl)22 int spl_board_boot_device(enum boot_device boot_dev_spl)
23 {
24 	switch (boot_dev_spl) {
25 	case SD1_BOOT:
26 	case SD2_BOOT:
27 	case MMC2_BOOT:
28 		return BOOT_DEVICE_MMC1;
29 	case SD3_BOOT:
30 	case MMC3_BOOT:
31 		return BOOT_DEVICE_MMC2;
32 	default:
33 		return BOOT_DEVICE_NONE;
34 	}
35 }
36 
spl_dram_init(void)37 static void spl_dram_init(void)
38 {
39 	ddr_init(&dram_timing);
40 }
41 
spl_board_init(void)42 void spl_board_init(void)
43 {
44 	debug("Normal Boot\n");
45 }
46 
47 #ifdef CONFIG_SPL_LOAD_FIT
board_fit_config_name_match(const char * name)48 int board_fit_config_name_match(const char *name)
49 {
50 	/* Just empty function now - can't decide what to choose */
51 	debug("%s: %s\n", __func__, name);
52 
53 	return 0;
54 }
55 #endif
56 
57 #define UART_PAD_CTRL	(PAD_CTL_DSE6 | PAD_CTL_FSEL1)
58 #define WDOG_PAD_CTRL	(PAD_CTL_DSE6 | PAD_CTL_ODE | PAD_CTL_PUE | PAD_CTL_PE)
59 
60 static iomux_v3_cfg_t const uart_pads[] = {
61 	IMX8MM_PAD_UART2_RXD_UART2_RX | MUX_PAD_CTRL(UART_PAD_CTRL),
62 	IMX8MM_PAD_UART2_TXD_UART2_TX | MUX_PAD_CTRL(UART_PAD_CTRL),
63 };
64 
board_early_init_f(void)65 int board_early_init_f(void)
66 {
67 	imx_iomux_v3_setup_multiple_pads(uart_pads, ARRAY_SIZE(uart_pads));
68 
69 	return 0;
70 }
71 
board_init_f(ulong dummy)72 void board_init_f(ulong dummy)
73 {
74 	int ret;
75 
76 	arch_cpu_init();
77 
78 	init_uart_clk(1);
79 
80 	board_early_init_f();
81 
82 	timer_init();
83 
84 	preloader_console_init();
85 
86 	/* Clear the BSS. */
87 	memset(__bss_start, 0, __bss_end - __bss_start);
88 
89 	ret = spl_early_init();
90 	if (ret) {
91 		debug("spl_early_init() failed: %d\n", ret);
92 		hang();
93 	}
94 
95 	enable_tzc380();
96 
97 	/* DDR initialization */
98 	spl_dram_init();
99 
100 	board_init_r(NULL, 0);
101 }
102