1 // SPDX-License-Identifier: GPL-2.0+
2 /*
3  * Copyright (C) 2014 Gateworks Corporation
4  * Copyright 2019 NXP
5  * Author: Tim Harvey <tharvey@gateworks.com>
6  */
7 #include <common.h>
8 #include <log.h>
9 #include <nand.h>
10 #include <malloc.h>
11 #include <mxs_nand.h>
12 #include <asm/cache.h>
13 #include <linux/bitops.h>
14 #include <linux/delay.h>
15 #include <linux/err.h>
16 
17 static struct mtd_info *mtd;
18 static struct nand_chip nand_chip;
19 
mxs_nand_command(struct mtd_info * mtd,unsigned int command,int column,int page_addr)20 static void mxs_nand_command(struct mtd_info *mtd, unsigned int command,
21 			     int column, int page_addr)
22 {
23 	register struct nand_chip *chip = mtd_to_nand(mtd);
24 	u32 timeo, time_start;
25 
26 	/* write out the command to the device */
27 	chip->cmd_ctrl(mtd, command, NAND_CLE);
28 
29 	/* Serially input address */
30 	if (column != -1) {
31 		chip->cmd_ctrl(mtd, column, NAND_ALE);
32 		chip->cmd_ctrl(mtd, column >> 8, NAND_ALE);
33 	}
34 	if (page_addr != -1) {
35 		chip->cmd_ctrl(mtd, page_addr, NAND_ALE);
36 		chip->cmd_ctrl(mtd, page_addr >> 8, NAND_ALE);
37 		/* One more address cycle for devices > 128MiB */
38 		if (chip->chipsize > (128 << 20))
39 			chip->cmd_ctrl(mtd, page_addr >> 16, NAND_ALE);
40 	}
41 	chip->cmd_ctrl(mtd, NAND_CMD_NONE, 0);
42 
43 	if (command == NAND_CMD_READ0) {
44 		chip->cmd_ctrl(mtd, NAND_CMD_READSTART, NAND_CLE);
45 		chip->cmd_ctrl(mtd, NAND_CMD_NONE, 0);
46 	} else if (command == NAND_CMD_RNDOUT) {
47 		/* No ready / busy check necessary */
48 		chip->cmd_ctrl(mtd, NAND_CMD_RNDOUTSTART,
49 			       NAND_NCE | NAND_CLE);
50 		chip->cmd_ctrl(mtd, NAND_CMD_NONE,
51 			       NAND_NCE);
52 	}
53 
54 	/* wait for nand ready */
55 	ndelay(100);
56 	timeo = (CONFIG_SYS_HZ * 20) / 1000;
57 	time_start = get_timer(0);
58 	while (get_timer(time_start) < timeo) {
59 		if (chip->dev_ready(mtd))
60 			break;
61 	}
62 }
63 
64 #if defined (CONFIG_SPL_NAND_IDENT)
65 
66 /* Trying to detect the NAND flash using ONFi, JEDEC, and (extended) IDs */
mxs_flash_full_ident(struct mtd_info * mtd)67 static int mxs_flash_full_ident(struct mtd_info *mtd)
68 {
69 	int nand_maf_id, nand_dev_id;
70 	struct nand_chip *chip = mtd_to_nand(mtd);
71 	struct nand_flash_dev *type;
72 
73 	type = nand_get_flash_type(mtd, chip, &nand_maf_id, &nand_dev_id, NULL);
74 
75 	if (IS_ERR(type)) {
76 		chip->select_chip(mtd, -1);
77 		return PTR_ERR(type);
78 	}
79 
80 	return 0;
81 }
82 
83 #else
84 
85 /* Trying to detect the NAND flash using ONFi only */
mxs_flash_onfi_ident(struct mtd_info * mtd)86 static int mxs_flash_onfi_ident(struct mtd_info *mtd)
87 {
88 	register struct nand_chip *chip = mtd_to_nand(mtd);
89 	int i;
90 	u8 mfg_id, dev_id;
91 	u8 id_data[8];
92 	struct nand_onfi_params *p = &chip->onfi_params;
93 
94 	/* Reset the chip */
95 	chip->cmdfunc(mtd, NAND_CMD_RESET, -1, -1);
96 
97 	/* Send the command for reading device ID */
98 	chip->cmdfunc(mtd, NAND_CMD_READID, 0x00, -1);
99 
100 	/* Read manufacturer and device IDs */
101 	mfg_id = chip->read_byte(mtd);
102 	dev_id = chip->read_byte(mtd);
103 
104 	/* Try again to make sure */
105 	chip->cmdfunc(mtd, NAND_CMD_READID, 0x00, -1);
106 	for (i = 0; i < 8; i++)
107 		id_data[i] = chip->read_byte(mtd);
108 	if (id_data[0] != mfg_id || id_data[1] != dev_id) {
109 		printf("second ID read did not match");
110 		return -1;
111 	}
112 	debug("0x%02x:0x%02x ", mfg_id, dev_id);
113 
114 	/* read ONFI */
115 	chip->onfi_version = 0;
116 	chip->cmdfunc(mtd, NAND_CMD_READID, 0x20, -1);
117 	if (chip->read_byte(mtd) != 'O' || chip->read_byte(mtd) != 'N' ||
118 	    chip->read_byte(mtd) != 'F' || chip->read_byte(mtd) != 'I') {
119 		return -2;
120 	}
121 
122 	/* we have ONFI, probe it */
123 	chip->cmdfunc(mtd, NAND_CMD_PARAM, 0, -1);
124 	chip->read_buf(mtd, (uint8_t *)p, sizeof(*p));
125 	mtd->name = p->model;
126 	mtd->writesize = le32_to_cpu(p->byte_per_page);
127 	mtd->erasesize = le32_to_cpu(p->pages_per_block) * mtd->writesize;
128 	mtd->oobsize = le16_to_cpu(p->spare_bytes_per_page);
129 	chip->chipsize = le32_to_cpu(p->blocks_per_lun);
130 	chip->chipsize *= (uint64_t)mtd->erasesize * p->lun_count;
131 	/* Calculate the address shift from the page size */
132 	chip->page_shift = ffs(mtd->writesize) - 1;
133 	chip->phys_erase_shift = ffs(mtd->erasesize) - 1;
134 	/* Convert chipsize to number of pages per chip -1 */
135 	chip->pagemask = (chip->chipsize >> chip->page_shift) - 1;
136 	chip->badblockbits = 8;
137 
138 	debug("erasesize=%d (>>%d)\n", mtd->erasesize, chip->phys_erase_shift);
139 	debug("writesize=%d (>>%d)\n", mtd->writesize, chip->page_shift);
140 	debug("oobsize=%d\n", mtd->oobsize);
141 	debug("chipsize=%lld\n", chip->chipsize);
142 
143 	return 0;
144 }
145 
146 #endif /* CONFIG_SPL_NAND_IDENT */
147 
mxs_flash_ident(struct mtd_info * mtd)148 static int mxs_flash_ident(struct mtd_info *mtd)
149 {
150 	int ret;
151 #if defined (CONFIG_SPL_NAND_IDENT)
152 	ret = mxs_flash_full_ident(mtd);
153 #else
154 	ret = mxs_flash_onfi_ident(mtd);
155 #endif
156 	return ret;
157 }
158 
mxs_read_page_ecc(struct mtd_info * mtd,void * buf,unsigned int page)159 static int mxs_read_page_ecc(struct mtd_info *mtd, void *buf, unsigned int page)
160 {
161 	register struct nand_chip *chip = mtd_to_nand(mtd);
162 	int ret;
163 
164 	chip->cmdfunc(mtd, NAND_CMD_READ0, 0x0, page);
165 	ret = nand_chip.ecc.read_page(mtd, chip, buf, 1, page);
166 	if (ret < 0) {
167 		printf("read_page failed %d\n", ret);
168 		return -1;
169 	}
170 	return 0;
171 }
172 
is_badblock(struct mtd_info * mtd,loff_t offs,int allowbbt)173 static int is_badblock(struct mtd_info *mtd, loff_t offs, int allowbbt)
174 {
175 	register struct nand_chip *chip = mtd_to_nand(mtd);
176 	unsigned int block = offs >> chip->phys_erase_shift;
177 	unsigned int page = offs >> chip->page_shift;
178 
179 	debug("%s offs=0x%08x block:%d page:%d\n", __func__, (int)offs, block,
180 	      page);
181 	chip->cmdfunc(mtd, NAND_CMD_READ0, mtd->writesize, page);
182 	memset(chip->oob_poi, 0, mtd->oobsize);
183 	chip->read_buf(mtd, chip->oob_poi, mtd->oobsize);
184 
185 	return chip->oob_poi[0] != 0xff;
186 }
187 
188 /* setup mtd and nand structs and init mxs_nand driver */
nand_init(void)189 void nand_init(void)
190 {
191 	/* return if already initalized */
192 	if (nand_chip.numchips)
193 		return;
194 
195 	/* init mxs nand driver */
196 	mxs_nand_init_spl(&nand_chip);
197 	mtd = nand_to_mtd(&nand_chip);
198 	/* set mtd functions */
199 	nand_chip.cmdfunc = mxs_nand_command;
200 	nand_chip.scan_bbt = nand_default_bbt;
201 	nand_chip.numchips = 1;
202 
203 	/* identify flash device */
204 	if (mxs_flash_ident(mtd)) {
205 		printf("Failed to identify\n");
206 		nand_chip.numchips = 0; /* If fail, don't use nand */
207 		return;
208 	}
209 
210 	/* allocate and initialize buffers */
211 	nand_chip.buffers = memalign(ARCH_DMA_MINALIGN,
212 				     sizeof(*nand_chip.buffers));
213 	nand_chip.oob_poi = nand_chip.buffers->databuf + mtd->writesize;
214 	/* setup flash layout (does not scan as we override that) */
215 	mtd->size = nand_chip.chipsize;
216 	nand_chip.scan_bbt(mtd);
217 	mxs_nand_setup_ecc(mtd);
218 }
219 
nand_spl_load_image(uint32_t offs,unsigned int size,void * buf)220 int nand_spl_load_image(uint32_t offs, unsigned int size, void *buf)
221 {
222 	struct nand_chip *chip;
223 	unsigned int page;
224 	unsigned int nand_page_per_block;
225 	unsigned int sz = 0;
226 	u8 *page_buf = NULL;
227 	u32 page_off;
228 
229 	chip = mtd_to_nand(mtd);
230 	if (!chip->numchips)
231 		return -ENODEV;
232 
233 	page_buf = malloc(mtd->writesize);
234 	if (!page_buf)
235 		return -ENOMEM;
236 
237 	page = offs >> chip->page_shift;
238 	page_off = offs & (mtd->writesize - 1);
239 	nand_page_per_block = mtd->erasesize / mtd->writesize;
240 
241 	debug("%s offset:0x%08x len:%d page:%x\n", __func__, offs, size, page);
242 
243 	while (size) {
244 		if (mxs_read_page_ecc(mtd, page_buf, page) < 0)
245 			return -1;
246 
247 		if (size > (mtd->writesize - page_off))
248 			sz = (mtd->writesize - page_off);
249 		else
250 			sz = size;
251 
252 		memcpy(buf, page_buf + page_off, sz);
253 
254 		offs += mtd->writesize;
255 		page++;
256 		buf += (mtd->writesize - page_off);
257 		page_off = 0;
258 		size -= sz;
259 
260 		/*
261 		 * Check if we have crossed a block boundary, and if so
262 		 * check for bad block.
263 		 */
264 		if (!(page % nand_page_per_block)) {
265 			/*
266 			 * Yes, new block. See if this block is good. If not,
267 			 * loop until we find a good block.
268 			 */
269 			while (is_badblock(mtd, offs, 1)) {
270 				page = page + nand_page_per_block;
271 				/* Check i we've reached the end of flash. */
272 				if (page >= mtd->size >> chip->page_shift) {
273 					free(page_buf);
274 					return -ENOMEM;
275 				}
276 			}
277 		}
278 	}
279 
280 	free(page_buf);
281 
282 	return 0;
283 }
284 
nand_get_mtd(void)285 struct mtd_info *nand_get_mtd(void)
286 {
287 	return mtd;
288 }
289 
nand_default_bbt(struct mtd_info * mtd)290 int nand_default_bbt(struct mtd_info *mtd)
291 {
292 	return 0;
293 }
294 
nand_deselect(void)295 void nand_deselect(void)
296 {
297 }
298 
299