1 // SPDX-License-Identifier: GPL-2.0+
2 /*
3 * Power and Sleep Controller (PSC) functions.
4 *
5 * Copyright (C) 2007 Sergey Kubushyn <ksi@koi8.net>
6 * Copyright (C) 2008 Lyrtech <www.lyrtech.com>
7 * Copyright (C) 2004 Texas Instruments.
8 */
9
10 #include <common.h>
11 #include <asm/arch/hardware.h>
12 #include <asm/io.h>
13
14 /*
15 * The PSC manages three inputs to a "module" which may be a peripheral or
16 * CPU. Those inputs are the module's: clock; reset signal; and sometimes
17 * its power domain. For our purposes, we only care whether clock and power
18 * are active, and the module is out of reset.
19 *
20 * DaVinci chips may include two separate power domains: "Always On" and "DSP".
21 * Chips without a DSP generally have only one domain.
22 *
23 * The "Always On" power domain is always on when the chip is on, and is
24 * powered by the VDD pins (on DM644X). The majority of DaVinci modules
25 * lie within the "Always On" power domain.
26 *
27 * A separate domain called the "DSP" domain houses the C64x+ and other video
28 * hardware such as VICP. In some chips, the "DSP" domain is not always on.
29 * The "DSP" power domain is powered by the CVDDDSP pins (on DM644X).
30 */
31
32 /* Works on Always On power domain only (no PD argument) */
lpsc_transition(unsigned int id,unsigned int state)33 static void lpsc_transition(unsigned int id, unsigned int state)
34 {
35 dv_reg_p mdstat, mdctl, ptstat, ptcmd;
36 struct davinci_psc_regs *psc_regs;
37
38 if (id < DAVINCI_LPSC_PSC1_BASE) {
39 if (id >= PSC_PSC0_MODULE_ID_CNT)
40 return;
41 psc_regs = davinci_psc0_regs;
42 mdstat = &psc_regs->psc0.mdstat[id];
43 mdctl = &psc_regs->psc0.mdctl[id];
44 } else {
45 id -= DAVINCI_LPSC_PSC1_BASE;
46 if (id >= PSC_PSC1_MODULE_ID_CNT)
47 return;
48 psc_regs = davinci_psc1_regs;
49 mdstat = &psc_regs->psc1.mdstat[id];
50 mdctl = &psc_regs->psc1.mdctl[id];
51 }
52 ptstat = &psc_regs->ptstat;
53 ptcmd = &psc_regs->ptcmd;
54
55 while (readl(ptstat) & 0x01)
56 continue;
57
58 if ((readl(mdstat) & PSC_MDSTAT_STATE) == state)
59 return; /* Already in that state */
60
61 writel((readl(mdctl) & ~PSC_MDCTL_NEXT) | state, mdctl);
62 writel(0x01, ptcmd);
63
64 while (readl(ptstat) & 0x01)
65 continue;
66 while ((readl(mdstat) & PSC_MDSTAT_STATE) != state)
67 continue;
68 }
69
lpsc_on(unsigned int id)70 void lpsc_on(unsigned int id)
71 {
72 lpsc_transition(id, 0x03);
73 }
74
lpsc_syncreset(unsigned int id)75 void lpsc_syncreset(unsigned int id)
76 {
77 lpsc_transition(id, 0x01);
78 }
79
lpsc_disable(unsigned int id)80 void lpsc_disable(unsigned int id)
81 {
82 lpsc_transition(id, 0x0);
83 }
84