1/* SPDX-License-Identifier: GPL-2.0+ */
2/*
3 * Copyright (C) 2016 Intel Corp.
4 * (Written by Lance Zhao <lijian.zhao@intel.com> for Intel Corp.)
5 */
6
7	Name(_HID, EISAID("PNP0A08"))	/* PCIe */
8	Name(_CID, EISAID("PNP0A03"))	/* PCI */
9	Name(_BBN, 0)
10
11Device (MCHC)
12{
13	Name (_ADR, 0x00000000)		/*Dev0 Func0 */
14
15		OperationRegion (MCHP, PCI_Config, 0x00, 0x100)
16		Field (MCHP, DWordAcc, NoLock, Preserve)
17		{
18			Offset(0x60),
19			MCNF,	32,	/* PCI MMCONF base */
20			Offset (0xA8),
21			TUUD, 64,	/* Top of Upper Used Memory */
22			Offset(0xB4),
23			BGSM,   32,	/* Base of Graphics Stolen Memory */
24			Offset(0xBC),
25			TLUD,   32,	/* Top of Low Useable DRAM */
26		}
27}
28Name (MCRS, ResourceTemplate()
29{
30	/* Bus Numbers */
31	WordBusNumber (ResourceProducer, MinFixed, MaxFixed, PosDecode,
32			0x0000, 0x0000, 0x00ff, 0x0000, 0x0100,,,)
33
34	/* IO Region 0 */
35	DWordIO (ResourceProducer, MinFixed, MaxFixed, PosDecode, EntireRange,
36			0x0000, 0x0000, 0x0cf7, 0x0000, 0x0cf8,,,)
37
38	/* PCI Config Space */
39	Io (Decode16, 0x0cf8, 0x0cf8, 0x0001, 0x0008)
40
41	/* IO Region 1 */
42	DWordIO (ResourceProducer, MinFixed, MaxFixed, PosDecode, EntireRange,
43			0x0000, 0x01000, 0xffff, 0x0000, 0xf000,,,)
44
45	/* VGA memory (0xa0000-0xbffff) */
46	DWordMemory (ResourceProducer, PosDecode, MinFixed, MaxFixed,
47			Cacheable, ReadWrite,
48			0x00000000, 0x000a0000, 0x000bffff, 0x00000000,
49			0x00020000,,,)
50
51	/* Data and GFX stolen memory */
52	DWordMemory (ResourceProducer, PosDecode, MinFixed, MaxFixed,
53			Cacheable, ReadWrite,
54			0x00000000, 0x3be00000, 0x3fffffff, 0x00000000,
55			0x04200000,,, STOM)
56
57	/*
58	 * PCI MMIO Region (TOLUD - PCI extended base MMCONF)
59	 * This assumes that MMCONF is placed after PCI config space,
60	 * and that no resources are allocated after the MMCONF region.
61	 * This works, sicne MMCONF is hardcoded to 0xe00000000.
62	 */
63	DWordMemory (ResourceProducer, PosDecode, MinFixed, MaxFixed,
64			NonCacheable, ReadWrite,
65			0x00000000, 0x00000000, 0x00000000, 0x00000000,
66			0x00000000,,, PM01)
67
68	/* PCI Memory Region (TOUUD - (TOUUD + ABOVE_4G_MMIO_SIZE)) */
69	QWordMemory (ResourceProducer, PosDecode, MinFixed, MaxFixed,
70			NonCacheable, ReadWrite,
71			0x00000000, 0x10000, 0x1ffff, 0x00000000,
72			0x10000,,, PM02)
73})
74
75/* Current Resource Settings */
76Method (_CRS, 0, Serialized)
77{
78
79	/* Find PCI resource area in MCRS */
80	CreateDwordField (MCRS, ^PM01._MIN, PMIN)
81	CreateDwordField (MCRS, ^PM01._MAX, PMAX)
82	CreateDwordField (MCRS, ^PM01._LEN, PLEN)
83
84	/* Read C-Unit PCI CFG Reg. 0xBC for TOLUD (shadow from B-Unit) */
85	And(^MCHC.TLUD, 0xFFF00000, PMIN)
86	/* Read MMCONF base */
87	And(^MCHC.MCNF, 0xF0000000, PMAX)
88
89	/* Calculate PCI MMIO Length */
90	Add(Subtract(PMAX, PMIN), 1, PLEN)
91
92	/* Find GFX resource area in GCRS */
93	CreateDwordField(MCRS, ^STOM._MIN, GMIN)
94	CreateDwordField(MCRS, ^STOM._MAX, GMAX)
95	CreateDwordField(MCRS, ^STOM._LEN, GLEN)
96
97	/* Read BGSM */
98	And(^MCHC.BGSM, 0xFFF00000, GMIN)
99
100	/* Read TOLUD */
101	And(^MCHC.TLUD, 0xFFF00000, GMAX)
102	Decrement(GMAX)
103	Add(Subtract(GMAX, GMIN), 1, GLEN)
104
105	/* Patch PM02 range based on Memory Size */
106	CreateQwordField (MCRS, ^PM02._MIN, MMIN)
107	CreateQwordField (MCRS, ^PM02._MAX, MMAX)
108	CreateQwordField (MCRS, ^PM02._LEN, MLEN)
109
110	Store (^MCHC.TUUD, Local0)
111
112	If (LLessEqual (Local0, 0x1000000000))
113	{
114		Store (0, MMIN)
115		Store (0, MLEN)
116	}
117	Subtract (Add (MMIN, MLEN), 1, MMAX)
118
119	Return (MCRS)
120}
121