1 // SPDX-License-Identifier: GPL-2.0+
2 /*
3 * Bluewater Systems Snapper 9260/9G20 modules
4 *
5 * (C) Copyright 2011 Bluewater Systems
6 * Author: Andre Renaud <andre@bluewatersys.com>
7 * Author: Ryan Mallon <ryan@bluewatersys.com>
8 */
9
10 #include <common.h>
11 #include <dm.h>
12 #include <init.h>
13 #include <asm/global_data.h>
14 #include <asm/io.h>
15 #include <asm/gpio.h>
16 #include <asm/mach-types.h>
17 #include <asm/arch/at91sam9260_matrix.h>
18 #include <asm/arch/at91sam9_smc.h>
19 #include <asm/arch/at91_common.h>
20 #include <asm/arch/clk.h>
21 #include <asm/arch/gpio.h>
22 #include <asm/arch/atmel_serial.h>
23 #include <net.h>
24 #include <netdev.h>
25 #include <i2c.h>
26 #include <pca953x.h>
27 #include <linux/delay.h>
28
29 DECLARE_GLOBAL_DATA_PTR;
30
31 /* IO Expander pins */
32 #define IO_EXP_ETH_RESET (0 << 1)
33 #define IO_EXP_ETH_POWER (1 << 1)
34
macb_hw_init(void)35 static void macb_hw_init(void)
36 {
37 struct at91_port *pioa = (struct at91_port *)ATMEL_BASE_PIOA;
38
39 at91_periph_clk_enable(ATMEL_ID_EMAC0);
40
41 /* Disable pull-ups to prevent PHY going into test mode */
42 writel(pin_to_mask(AT91_PIN_PA14) |
43 pin_to_mask(AT91_PIN_PA15) |
44 pin_to_mask(AT91_PIN_PA18),
45 &pioa->pudr);
46
47 /* Power down ethernet */
48 pca953x_set_dir(0x28, IO_EXP_ETH_POWER, PCA953X_DIR_OUT);
49 pca953x_set_val(0x28, IO_EXP_ETH_POWER, 1);
50
51 /* Hold ethernet in reset */
52 pca953x_set_dir(0x28, IO_EXP_ETH_RESET, PCA953X_DIR_OUT);
53 pca953x_set_val(0x28, IO_EXP_ETH_RESET, 0);
54
55 /* Enable ethernet power */
56 pca953x_set_val(0x28, IO_EXP_ETH_POWER, 0);
57
58 at91_phy_reset();
59
60 /* Bring the ethernet out of reset */
61 pca953x_set_val(0x28, IO_EXP_ETH_RESET, 1);
62
63 /* The phy internal reset take 21ms */
64 udelay(21 * 1000);
65
66 /* Re-enable pull-up */
67 writel(pin_to_mask(AT91_PIN_PA14) |
68 pin_to_mask(AT91_PIN_PA15) |
69 pin_to_mask(AT91_PIN_PA18),
70 &pioa->puer);
71
72 at91_macb_hw_init();
73 }
74
nand_hw_init(void)75 static void nand_hw_init(void)
76 {
77 struct at91_smc *smc = (struct at91_smc *)ATMEL_BASE_SMC;
78 struct at91_matrix *matrix = (struct at91_matrix *)ATMEL_BASE_MATRIX;
79 unsigned long csa;
80
81 /* Enable CS3 as NAND/SmartMedia */
82 csa = readl(&matrix->ebicsa);
83 csa |= AT91_MATRIX_CS3A_SMC_SMARTMEDIA;
84 writel(csa, &matrix->ebicsa);
85
86 /* Configure SMC CS3 for NAND/SmartMedia */
87 writel(AT91_SMC_SETUP_NWE(2) | AT91_SMC_SETUP_NCS_WR(0) |
88 AT91_SMC_SETUP_NRD(2) | AT91_SMC_SETUP_NCS_RD(0),
89 &smc->cs[3].setup);
90 writel(AT91_SMC_PULSE_NWE(4) | AT91_SMC_PULSE_NCS_WR(4) |
91 AT91_SMC_PULSE_NRD(4) | AT91_SMC_PULSE_NCS_RD(4),
92 &smc->cs[3].pulse);
93 writel(AT91_SMC_CYCLE_NWE(7) | AT91_SMC_CYCLE_NRD(7),
94 &smc->cs[3].cycle);
95 writel(AT91_SMC_MODE_RM_NRD | AT91_SMC_MODE_WM_NWE |
96 AT91_SMC_MODE_EXNW_DISABLE |
97 AT91_SMC_MODE_DBW_8 |
98 AT91_SMC_MODE_TDF_CYCLE(3),
99 &smc->cs[3].mode);
100
101 /* Configure RDY/BSY */
102 gpio_request(CONFIG_SYS_NAND_READY_PIN, "nand_rdy");
103 gpio_direction_input(CONFIG_SYS_NAND_READY_PIN);
104
105 /* Enable NandFlash */
106 gpio_request(CONFIG_SYS_NAND_ENABLE_PIN, "nand_ce");
107 gpio_direction_output(CONFIG_SYS_NAND_ENABLE_PIN, 1);
108 }
109
board_init(void)110 int board_init(void)
111 {
112 at91_periph_clk_enable(ATMEL_ID_PIOA);
113 at91_periph_clk_enable(ATMEL_ID_PIOB);
114 at91_periph_clk_enable(ATMEL_ID_PIOC);
115
116 /* The mach-type is the same for both Snapper 9260 and 9G20 */
117 gd->bd->bi_arch_number = MACH_TYPE_SNAPPER_9260;
118
119 /* Address of boot parameters */
120 gd->bd->bi_boot_params = CONFIG_SYS_SDRAM_BASE + 0x100;
121
122 /* Initialise peripherals */
123 at91_seriald_hw_init();
124 i2c_set_bus_num(0);
125 nand_hw_init();
126 macb_hw_init();
127
128 return 0;
129 }
130
board_eth_init(struct bd_info * bis)131 int board_eth_init(struct bd_info *bis)
132 {
133 return macb_eth_initialize(0, (void *)ATMEL_BASE_EMAC0, 0x1f);
134 }
135
dram_init(void)136 int dram_init(void)
137 {
138 gd->ram_size = get_ram_size((void *)CONFIG_SYS_SDRAM_BASE,
139 CONFIG_SYS_SDRAM_SIZE);
140 return 0;
141 }
142
reset_phy(void)143 void reset_phy(void)
144 {
145 }
146
147 static struct atmel_serial_plat at91sam9260_serial_plat = {
148 .base_addr = ATMEL_BASE_DBGU,
149 };
150
151 U_BOOT_DRVINFO(at91sam9260_serial) = {
152 .name = "serial_atmel",
153 .plat = &at91sam9260_serial_plat,
154 };
155