1 // SPDX-License-Identifier: GPL-2.0
2 /*
3 * Copyright (C) STMicroelectronics 2019 - All Rights Reserved
4 */
5
6 #define LOG_CATEGORY UCLASS_MAILBOX
7
8 #include <common.h>
9 #include <clk.h>
10 #include <dm.h>
11 #include <log.h>
12 #include <mailbox-uclass.h>
13 #include <malloc.h>
14 #include <asm/io.h>
15 #include <dm/device_compat.h>
16 #include <linux/bitops.h>
17
18 /*
19 * IPCC has one set of registers per CPU
20 * IPCC_PROC_OFFST allows to define cpu registers set base address
21 * according to the assigned proc_id.
22 */
23
24 #define IPCC_PROC_OFFST 0x010
25
26 #define IPCC_XSCR 0x008
27 #define IPCC_XTOYSR 0x00c
28
29 #define IPCC_HWCFGR 0x3f0
30 #define IPCFGR_CHAN_MASK GENMASK(7, 0)
31
32 #define RX_BIT_CHAN(chan) BIT(chan)
33 #define TX_BIT_SHIFT 16
34 #define TX_BIT_CHAN(chan) BIT(TX_BIT_SHIFT + (chan))
35
36 #define STM32_MAX_PROCS 2
37
38 struct stm32_ipcc {
39 void __iomem *reg_base;
40 void __iomem *reg_proc;
41 u32 proc_id;
42 u32 n_chans;
43 };
44
stm32_ipcc_request(struct mbox_chan * chan)45 static int stm32_ipcc_request(struct mbox_chan *chan)
46 {
47 struct stm32_ipcc *ipcc = dev_get_priv(chan->dev);
48
49 dev_dbg(chan->dev, "chan=%p\n", chan);
50
51 if (chan->id >= ipcc->n_chans) {
52 dev_dbg(chan->dev, "failed to request channel: %ld\n",
53 chan->id);
54 return -EINVAL;
55 }
56
57 return 0;
58 }
59
stm32_ipcc_free(struct mbox_chan * chan)60 static int stm32_ipcc_free(struct mbox_chan *chan)
61 {
62 dev_dbg(chan->dev, "chan=%p\n", chan);
63
64 return 0;
65 }
66
stm32_ipcc_send(struct mbox_chan * chan,const void * data)67 static int stm32_ipcc_send(struct mbox_chan *chan, const void *data)
68 {
69 struct stm32_ipcc *ipcc = dev_get_priv(chan->dev);
70
71 dev_dbg(chan->dev, "chan=%p, data=%p\n", chan, data);
72
73 if (readl(ipcc->reg_proc + IPCC_XTOYSR) & BIT(chan->id))
74 return -EBUSY;
75
76 /* set channel n occupied */
77 setbits_le32(ipcc->reg_proc + IPCC_XSCR, TX_BIT_CHAN(chan->id));
78
79 return 0;
80 }
81
stm32_ipcc_recv(struct mbox_chan * chan,void * data)82 static int stm32_ipcc_recv(struct mbox_chan *chan, void *data)
83 {
84 struct stm32_ipcc *ipcc = dev_get_priv(chan->dev);
85 u32 val;
86 int proc_offset;
87
88 dev_dbg(chan->dev, "chan=%p, data=%p\n", chan, data);
89
90 /* read 'channel occupied' status from other proc */
91 proc_offset = ipcc->proc_id ? -IPCC_PROC_OFFST : IPCC_PROC_OFFST;
92 val = readl(ipcc->reg_proc + proc_offset + IPCC_XTOYSR);
93
94 if (!(val & BIT(chan->id)))
95 return -ENODATA;
96
97 setbits_le32(ipcc->reg_proc + IPCC_XSCR, RX_BIT_CHAN(chan->id));
98
99 return 0;
100 }
101
stm32_ipcc_probe(struct udevice * dev)102 static int stm32_ipcc_probe(struct udevice *dev)
103 {
104 struct stm32_ipcc *ipcc = dev_get_priv(dev);
105 fdt_addr_t addr;
106 struct clk clk;
107 int ret;
108
109 dev_dbg(dev, "\n");
110
111 addr = dev_read_addr(dev);
112 if (addr == FDT_ADDR_T_NONE)
113 return -EINVAL;
114
115 ipcc->reg_base = (void __iomem *)addr;
116
117 /* proc_id */
118 ret = dev_read_u32_index(dev, "st,proc_id", 1, &ipcc->proc_id);
119 if (ret) {
120 dev_dbg(dev, "Missing st,proc_id\n");
121 return -EINVAL;
122 }
123
124 if (ipcc->proc_id >= STM32_MAX_PROCS) {
125 dev_err(dev, "Invalid proc_id (%d)\n", ipcc->proc_id);
126 return -EINVAL;
127 }
128
129 ipcc->reg_proc = ipcc->reg_base + ipcc->proc_id * IPCC_PROC_OFFST;
130
131 ret = clk_get_by_index(dev, 0, &clk);
132 if (ret)
133 return ret;
134
135 ret = clk_enable(&clk);
136 if (ret)
137 goto clk_free;
138
139 /* get channel number */
140 ipcc->n_chans = readl(ipcc->reg_base + IPCC_HWCFGR);
141 ipcc->n_chans &= IPCFGR_CHAN_MASK;
142
143 return 0;
144
145 clk_free:
146 clk_free(&clk);
147
148 return ret;
149 }
150
151 static const struct udevice_id stm32_ipcc_ids[] = {
152 { .compatible = "st,stm32mp1-ipcc" },
153 { }
154 };
155
156 struct mbox_ops stm32_ipcc_mbox_ops = {
157 .request = stm32_ipcc_request,
158 .rfree = stm32_ipcc_free,
159 .send = stm32_ipcc_send,
160 .recv = stm32_ipcc_recv,
161 };
162
163 U_BOOT_DRIVER(stm32_ipcc) = {
164 .name = "stm32_ipcc",
165 .id = UCLASS_MAILBOX,
166 .of_match = stm32_ipcc_ids,
167 .probe = stm32_ipcc_probe,
168 .priv_auto = sizeof(struct stm32_ipcc),
169 .ops = &stm32_ipcc_mbox_ops,
170 };
171