1# SPDX-License-Identifier: GPL-2.0
2# ==========================================================================
3# Building
4# ==========================================================================
5
6# Modified for U-Boot
7prefix := tpl
8src := $(patsubst $(prefix)/%,%,$(obj))
9ifeq ($(obj),$(src))
10prefix := spl
11src := $(patsubst $(prefix)/%,%,$(obj))
12ifeq ($(obj),$(src))
13prefix := .
14endif
15endif
16
17PHONY := __build
18__build:
19
20# Init all relevant variables used in kbuild files so
21# 1) they have correct type
22# 2) they do not inherit any value from the environment
23obj-y :=
24obj-m :=
25lib-y :=
26lib-m :=
27always :=
28targets :=
29subdir-y :=
30subdir-m :=
31EXTRA_AFLAGS   :=
32EXTRA_CFLAGS   :=
33EXTRA_CPPFLAGS :=
34EXTRA_LDFLAGS  :=
35asflags-y  :=
36ccflags-y  :=
37cppflags-y :=
38ldflags-y  :=
39
40subdir-asflags-y :=
41subdir-ccflags-y :=
42
43# Read auto.conf if it exists, otherwise ignore
44# Modified for U-Boot
45-include include/config/auto.conf
46-include $(prefix)/include/autoconf.mk
47include scripts/Makefile.uncmd_spl
48
49include scripts/Kbuild.include
50
51# For backward compatibility check that these variables do not change
52save-cflags := $(CFLAGS)
53
54# The filename Kbuild has precedence over Makefile
55kbuild-dir := $(if $(filter /%,$(src)),$(src),$(srctree)/$(src))
56kbuild-file := $(if $(wildcard $(kbuild-dir)/Kbuild),$(kbuild-dir)/Kbuild,$(kbuild-dir)/Makefile)
57include $(kbuild-file)
58
59# Added for U-Boot
60asflags-y  += $(PLATFORM_CPPFLAGS)
61ccflags-y  += $(PLATFORM_CPPFLAGS)
62cppflags-y += $(PLATFORM_CPPFLAGS)
63
64# If the save-* variables changed error out
65ifeq ($(KBUILD_NOPEDANTIC),)
66        ifneq ("$(save-cflags)","$(CFLAGS)")
67                $(error CFLAGS was changed in "$(kbuild-file)". Fix it to use ccflags-y)
68        endif
69endif
70
71include scripts/Makefile.lib
72
73# Do not include host rules unless needed
74ifneq ($(hostprogs-y)$(hostprogs-m)$(hostlibs-y)$(hostlibs-m)$(hostcxxlibs-y)$(hostcxxlibs-m),)
75include scripts/Makefile.host
76endif
77
78ifndef obj
79$(warning kbuild: Makefile.build is included improperly)
80endif
81
82# ===========================================================================
83
84ifneq ($(strip $(lib-y) $(lib-m) $(lib-)),)
85lib-target := $(obj)/lib.a
86endif
87
88ifneq ($(strip $(obj-y) $(obj-m) $(obj-) $(subdir-m) $(lib-target)),)
89builtin-target := $(obj)/built-in.o
90endif
91
92modorder-target := $(obj)/modules.order
93
94# We keep a list of all modules in $(MODVERDIR)
95
96__build: $(if $(KBUILD_BUILTIN),$(builtin-target) $(lib-target) $(extra-y)) \
97	 $(if $(KBUILD_MODULES),$(obj-m) $(modorder-target)) \
98	 $(subdir-ym) $(always)
99	@:
100
101# Linus' kernel sanity checking tool
102ifneq ($(KBUILD_CHECKSRC),0)
103  ifeq ($(KBUILD_CHECKSRC),2)
104    quiet_cmd_force_checksrc = CHECK   $<
105          cmd_force_checksrc = $(CHECK) $(CHECKFLAGS) $(c_flags) $< ;
106  else
107      quiet_cmd_checksrc     = CHECK   $<
108            cmd_checksrc     = $(CHECK) $(CHECKFLAGS) $(c_flags) $< ;
109  endif
110endif
111
112# Do section mismatch analysis for each module/built-in.o
113ifdef CONFIG_DEBUG_SECTION_MISMATCH
114  cmd_secanalysis = ; scripts/mod/modpost $@
115endif
116
117# Compile C sources (.c)
118# ---------------------------------------------------------------------------
119
120# Default is built-in, unless we know otherwise
121modkern_cflags =                                          \
122	$(if $(part-of-module),                           \
123		$(KBUILD_CFLAGS_MODULE) $(CFLAGS_MODULE), \
124		$(KBUILD_CFLAGS_KERNEL) $(CFLAGS_KERNEL))
125quiet_modtag := $(empty)   $(empty)
126
127$(real-objs-m)        : part-of-module := y
128$(real-objs-m:.o=.i)  : part-of-module := y
129$(real-objs-m:.o=.s)  : part-of-module := y
130$(real-objs-m:.o=.lst): part-of-module := y
131
132$(real-objs-m)        : quiet_modtag := [M]
133$(real-objs-m:.o=.i)  : quiet_modtag := [M]
134$(real-objs-m:.o=.s)  : quiet_modtag := [M]
135$(real-objs-m:.o=.lst): quiet_modtag := [M]
136
137$(obj-m)              : quiet_modtag := [M]
138
139# Default for not multi-part modules
140modname = $(basetarget)
141
142$(multi-objs-m)         : modname = $(modname-multi)
143$(multi-objs-m:.o=.i)   : modname = $(modname-multi)
144$(multi-objs-m:.o=.s)   : modname = $(modname-multi)
145$(multi-objs-m:.o=.lst) : modname = $(modname-multi)
146$(multi-objs-y)         : modname = $(modname-multi)
147$(multi-objs-y:.o=.i)   : modname = $(modname-multi)
148$(multi-objs-y:.o=.s)   : modname = $(modname-multi)
149$(multi-objs-y:.o=.lst) : modname = $(modname-multi)
150
151quiet_cmd_cc_s_c = CC $(quiet_modtag)  $@
152cmd_cc_s_c       = $(CC) $(c_flags) $(DISABLE_LTO) -fverbose-asm -S -o $@ $<
153
154$(obj)/%.s: $(src)/%.c FORCE
155	$(call if_changed_dep,cc_s_c)
156
157quiet_cmd_cc_i_c = CPP $(quiet_modtag) $@
158cmd_cc_i_c       = $(CPP) $(c_flags)   -o $@ $<
159
160$(obj)/%.i: $(src)/%.c FORCE
161	$(call if_changed_dep,cc_i_c)
162
163cmd_gensymtypes =                                                           \
164    $(CPP) -D__GENKSYMS__ $(c_flags) $< |                                   \
165    $(GENKSYMS) $(if $(1), -T $(2))                                         \
166     $(if $(KBUILD_PRESERVE),-p)                                            \
167     -r $(firstword $(wildcard $(2:.symtypes=.symref) /dev/null))
168
169quiet_cmd_cc_symtypes_c = SYM $(quiet_modtag) $@
170cmd_cc_symtypes_c =                                                         \
171    set -e;                                                                 \
172    $(call cmd_gensymtypes,true,$@) >/dev/null;                             \
173    test -s $@ || rm -f $@
174
175$(obj)/%.symtypes : $(src)/%.c FORCE
176	$(call cmd,cc_symtypes_c)
177
178# C (.c) files
179# The C file is compiled and updated dependency information is generated.
180# (See cmd_cc_o_c + relevant part of rule_cc_o_c)
181
182quiet_cmd_cc_o_c = CC $(quiet_modtag)  $@
183
184ifndef CONFIG_MODVERSIONS
185cmd_cc_o_c = $(CC) $(c_flags) -c -o $@ $<
186
187else
188# When module versioning is enabled the following steps are executed:
189# o compile a .tmp_<file>.o from <file>.c
190# o if .tmp_<file>.o doesn't contain a __ksymtab version, i.e. does
191#   not export symbols, we just rename .tmp_<file>.o to <file>.o and
192#   are done.
193# o otherwise, we calculate symbol versions using the good old
194#   genksyms on the preprocessed source and postprocess them in a way
195#   that they are usable as a linker script
196# o generate <file>.o from .tmp_<file>.o using the linker to
197#   replace the unresolved symbols __crc_exported_symbol with
198#   the actual value of the checksum generated by genksyms
199
200cmd_cc_o_c = $(CC) $(c_flags) -c -o $(@D)/.tmp_$(@F) $<
201cmd_modversions =								\
202	if $(OBJDUMP) -h $(@D)/.tmp_$(@F) | grep -q __ksymtab; then		\
203		$(call cmd_gensymtypes,$(KBUILD_SYMTYPES),$(@:.o=.symtypes))	\
204		    > $(@D)/.tmp_$(@F:.o=.ver);					\
205										\
206		$(LD) $(KBUILD_LDFLAGS) -r -o $@ $(@D)/.tmp_$(@F) 		\
207			-T $(@D)/.tmp_$(@F:.o=.ver);				\
208		rm -f $(@D)/.tmp_$(@F) $(@D)/.tmp_$(@F:.o=.ver);		\
209	else									\
210		mv -f $(@D)/.tmp_$(@F) $@;					\
211	fi;
212endif
213
214ifdef CONFIG_FTRACE_MCOUNT_RECORD
215# gcc 5 supports generating the mcount tables directly
216ifneq ($(call cc-option,-mrecord-mcount,y),y)
217KBUILD_CFLAGS += -mrecord-mcount
218else
219# else do it all manually
220ifdef BUILD_C_RECORDMCOUNT
221ifeq ("$(origin RECORDMCOUNT_WARN)", "command line")
222  RECORDMCOUNT_FLAGS = -w
223endif
224# Due to recursion, we must skip empty.o.
225# The empty.o file is created in the make process in order to determine
226#  the target endianness and word size. It is made before all other C
227#  files, including recordmcount.
228sub_cmd_record_mcount =					\
229	if [ $(@) != "scripts/mod/empty.o" ]; then	\
230		$(objtree)/scripts/recordmcount $(RECORDMCOUNT_FLAGS) "$(@)";	\
231	fi;
232recordmcount_source := $(srctree)/scripts/recordmcount.c \
233		    $(srctree)/scripts/recordmcount.h
234else
235sub_cmd_record_mcount = set -e ; perl $(srctree)/scripts/recordmcount.pl "$(ARCH)" \
236	"$(if $(CONFIG_CPU_BIG_ENDIAN),big,little)" \
237	"$(if $(CONFIG_64BIT),64,32)" \
238	"$(OBJDUMP)" "$(OBJCOPY)" "$(CC) $(KBUILD_CPPFLAGS) $(KBUILD_CFLAGS)" \
239	"$(LD) $(KBUILD_LDFLAGS)" "$(NM)" "$(RM)" "$(MV)" \
240	"$(if $(part-of-module),1,0)" "$(@)";
241recordmcount_source := $(srctree)/scripts/recordmcount.pl
242endif
243cmd_record_mcount =						\
244	if [ "$(findstring $(CC_FLAGS_FTRACE),$(_c_flags))" =	\
245	     "$(CC_FLAGS_FTRACE)" ]; then			\
246		$(sub_cmd_record_mcount)			\
247	fi;
248endif # -record-mcount
249endif
250
251define rule_cc_o_c
252	$(call echo-cmd,checksrc) $(cmd_checksrc)			  \
253	$(call echo-cmd,cc_o_c) $(cmd_cc_o_c);				  \
254	$(cmd_modversions)						  \
255	$(call echo-cmd,record_mcount)					  \
256	$(cmd_record_mcount)						  \
257	scripts/basic/fixdep $(depfile) $@ '$(call make-cmd,cc_o_c)' >    \
258	                                              $(dot-target).tmp;  \
259	rm -f $(depfile);						  \
260	mv -f $(dot-target).tmp $(dot-target).cmd
261endef
262
263# Built-in and composite module parts
264$(obj)/%.o: $(src)/%.c $(recordmcount_source) FORCE
265	$(call cmd,force_checksrc)
266	$(call if_changed_rule,cc_o_c)
267
268# Single-part modules are special since we need to mark them in $(MODVERDIR)
269
270$(single-used-m): $(obj)/%.o: $(src)/%.c $(recordmcount_source) FORCE
271	$(call cmd,force_checksrc)
272	$(call if_changed_rule,cc_o_c)
273	@{ echo $(@:.o=.ko); echo $@; } > $(MODVERDIR)/$(@F:.o=.mod)
274
275quiet_cmd_cc_lst_c = MKLST   $@
276      cmd_cc_lst_c = $(CC) $(c_flags) -g -c -o $*.o $< && \
277		     $(CONFIG_SHELL) $(srctree)/scripts/makelst $*.o \
278				     System.map $(OBJDUMP) > $@
279
280$(obj)/%.lst: $(src)/%.c FORCE
281	$(call if_changed_dep,cc_lst_c)
282
283# Compile assembler sources (.S)
284# ---------------------------------------------------------------------------
285
286modkern_aflags := $(KBUILD_AFLAGS_KERNEL) $(AFLAGS_KERNEL)
287
288$(real-objs-m)      : modkern_aflags := $(KBUILD_AFLAGS_MODULE) $(AFLAGS_MODULE)
289$(real-objs-m:.o=.s): modkern_aflags := $(KBUILD_AFLAGS_MODULE) $(AFLAGS_MODULE)
290
291quiet_cmd_as_s_S = CPP $(quiet_modtag) $@
292cmd_as_s_S       = $(CPP) $(a_flags)   -o $@ $<
293
294$(obj)/%.s: $(src)/%.S FORCE
295	$(call if_changed_dep,as_s_S)
296
297quiet_cmd_as_o_S = AS $(quiet_modtag)  $@
298cmd_as_o_S       = $(CC) $(a_flags) -c -o $@ $<
299
300$(obj)/%.o: $(src)/%.S FORCE
301	$(call if_changed_dep,as_o_S)
302
303targets += $(real-objs-y) $(real-objs-m) $(lib-y)
304targets += $(extra-y) $(MAKECMDGOALS) $(always)
305
306# Linker scripts preprocessor (.lds.S -> .lds)
307# ---------------------------------------------------------------------------
308quiet_cmd_cpp_lds_S = LDS     $@
309      cmd_cpp_lds_S = $(CPP) $(cpp_flags) -P -C -U$(ARCH) \
310	                     -D__ASSEMBLY__ -DLINKER_SCRIPT -o $@ $<
311
312$(obj)/%.lds: $(src)/%.lds.S FORCE
313	$(call if_changed_dep,cpp_lds_S)
314
315# ASN.1 grammar
316# ---------------------------------------------------------------------------
317quiet_cmd_asn1_compiler = ASN.1   $@
318      cmd_asn1_compiler = $(objtree)/tools/asn1_compiler $< \
319				$(subst .h,.c,$@) $(subst .c,.h,$@)
320
321$(obj)/%.asn1.c $(obj)/%.asn1.h: $(src)/%.asn1 $(objtree)/tools/asn1_compiler
322	$(call cmd,asn1_compiler)
323
324# Build the compiled-in targets
325# ---------------------------------------------------------------------------
326
327# To build objects in subdirs, we need to descend into the directories
328$(sort $(subdir-obj-y)): $(subdir-ym) ;
329
330#
331# Rule to compile a set of .o files into one .o file
332#
333ifdef builtin-target
334quiet_cmd_link_o_target = AR      $@
335# If the list of objects to link is empty, just create an empty built-in.o
336cmd_link_o_target = $(if $(strip $(obj-y)),\
337		      rm -f $@; $(AR) cDPrsT $@ $(filter $(obj-y), $^), \
338		      rm -f $@; $(AR) cDPrsT$(KBUILD_ARFLAGS) $@)
339
340$(builtin-target): $(obj-y) FORCE
341	$(call if_changed,link_o_target)
342
343targets += $(builtin-target)
344endif # builtin-target
345
346#
347# Rule to create modules.order file
348#
349# Create commands to either record .ko file or cat modules.order from
350# a subdirectory
351modorder-cmds =						\
352	$(foreach m, $(modorder),			\
353		$(if $(filter %/modules.order, $m),	\
354			cat $m;, echo kernel/$m;))
355
356$(modorder-target): $(subdir-ym) FORCE
357	$(Q)(cat /dev/null; $(modorder-cmds)) > $@
358
359#
360# Rule to compile a set of .o files into one .a file
361#
362ifdef lib-target
363quiet_cmd_link_l_target = AR      $@
364cmd_link_l_target = rm -f $@; $(AR) cDPrsT$(KBUILD_ARFLAGS) $@ $(lib-y)
365
366$(lib-target): $(lib-y) FORCE
367	$(call if_changed,link_l_target)
368
369targets += $(lib-target)
370endif
371
372#
373# Rule to link composite objects
374#
375#  Composite objects are specified in kbuild makefile as follows:
376#    <composite-object>-objs := <list of .o files>
377#  or
378#    <composite-object>-y    := <list of .o files>
379link_multi_deps =                     \
380$(filter $(addprefix $(obj)/,         \
381$($(subst $(obj)/,,$(@:.o=-objs)))    \
382$($(subst $(obj)/,,$(@:.o=-y)))), $^)
383
384
385quiet_cmd_link_multi-y = AR      $@
386cmd_link_multi-y = rm -f $@; $(AR) cDPrsT$(KBUILD_ARFLAGS) $@ $(link_multi_deps)
387
388quiet_cmd_link_multi-m = AR [M]  $@
389cmd_link_multi-m = $(cmd_link_multi-y)
390
391$(multi-used-y): FORCE
392	$(call if_changed,link_multi-y)
393$(call multi_depend, $(multi-used-y), .o, -objs -y)
394
395$(multi-used-m): FORCE
396	$(call if_changed,link_multi-m)
397	@{ echo $(@:.o=.ko); echo $(link_multi_deps); } > $(MODVERDIR)/$(@F:.o=.mod)
398$(call multi_depend, $(multi-used-m), .o, -objs -y)
399
400targets += $(multi-used-y) $(multi-used-m)
401
402
403# Add intermediate targets:
404# When building objects with specific suffix patterns, add intermediate
405# targets that the final targets are derived from.
406intermediate_targets = $(foreach sfx, $(2), \
407				$(patsubst %$(strip $(1)),%$(sfx), \
408					$(filter %$(strip $(1)), $(targets))))
409# %.lex.o <- %.lex.c <- %.l
410# %.tab.o <- %.tab.[ch] <- %.y
411targets += $(call intermediate_targets, .lex.o, .lex.c) \
412	   $(call intermediate_targets, .tab.o, .tab.c .tab.h)
413
414# Descending
415# ---------------------------------------------------------------------------
416
417PHONY += $(subdir-ym)
418$(subdir-ym):
419	$(Q)$(MAKE) $(build)=$@
420
421# Add FORCE to the prequisites of a target to force it to be always rebuilt.
422# ---------------------------------------------------------------------------
423
424PHONY += FORCE
425
426FORCE:
427
428# Read all saved command lines and dependencies for the $(targets) we
429# may be building above, using $(if_changed{,_dep}). As an
430# optimization, we don't need to read them if the target does not
431# exist, we will rebuild anyway in that case.
432
433cmd_files := $(wildcard $(foreach f,$(sort $(targets)),$(dir $(f)).$(notdir $(f)).cmd))
434
435ifneq ($(cmd_files),)
436  include $(cmd_files)
437endif
438
439# Create directories for object files if they do not exist
440obj-dirs := $(sort $(obj) $(patsubst %/,%, $(dir $(targets))))
441$(shell mkdir -p $(obj-dirs))
442
443.PHONY: $(PHONY)
444