1 // SPDX-License-Identifier: GPL-2.0+ OR BSD-3-Clause
2 /*
3 * Copyright (C) 2020, STMicroelectronics - All Rights Reserved
4 */
5
6 #include <command.h>
7 #include <console.h>
8 #include <dfu.h>
9 #include <malloc.h>
10 #include <misc.h>
11 #include <mmc.h>
12 #include <part.h>
13 #include <asm/arch/stm32mp1_smc.h>
14 #include <asm/global_data.h>
15 #include <dm/uclass.h>
16 #include <jffs2/load_kernel.h>
17 #include <linux/list.h>
18 #include <linux/list_sort.h>
19 #include <linux/mtd/mtd.h>
20 #include <linux/sizes.h>
21
22 #include "stm32prog.h"
23
24 /* Primary GPT header size for 128 entries : 17kB = 34 LBA of 512B */
25 #define GPT_HEADER_SZ 34
26
27 #define OPT_SELECT BIT(0)
28 #define OPT_EMPTY BIT(1)
29 #define OPT_DELETE BIT(2)
30
31 #define IS_SELECT(part) ((part)->option & OPT_SELECT)
32 #define IS_EMPTY(part) ((part)->option & OPT_EMPTY)
33 #define IS_DELETE(part) ((part)->option & OPT_DELETE)
34
35 #define ALT_BUF_LEN SZ_1K
36
37 #define ROOTFS_MMC0_UUID \
38 EFI_GUID(0xE91C4E10, 0x16E6, 0x4C0E, \
39 0xBD, 0x0E, 0x77, 0xBE, 0xCF, 0x4A, 0x35, 0x82)
40
41 #define ROOTFS_MMC1_UUID \
42 EFI_GUID(0x491F6117, 0x415D, 0x4F53, \
43 0x88, 0xC9, 0x6E, 0x0D, 0xE5, 0x4D, 0xEA, 0xC6)
44
45 #define ROOTFS_MMC2_UUID \
46 EFI_GUID(0xFD58F1C7, 0xBE0D, 0x4338, \
47 0x88, 0xE9, 0xAD, 0x8F, 0x05, 0x0A, 0xEB, 0x18)
48
49 /* RAW parttion (binary / bootloader) used Linux - reserved UUID */
50 #define LINUX_RESERVED_UUID "8DA63339-0007-60C0-C436-083AC8230908"
51
52 /*
53 * unique partition guid (uuid) for partition named "rootfs"
54 * on each MMC instance = SD Card or eMMC
55 * allow fixed kernel bootcmd: "rootf=PARTUID=e91c4e10-..."
56 */
57 static const efi_guid_t uuid_mmc[3] = {
58 ROOTFS_MMC0_UUID,
59 ROOTFS_MMC1_UUID,
60 ROOTFS_MMC2_UUID
61 };
62
63 /* order of column in flash layout file */
64 enum stm32prog_col_t {
65 COL_OPTION,
66 COL_ID,
67 COL_NAME,
68 COL_TYPE,
69 COL_IP,
70 COL_OFFSET,
71 COL_NB_STM32
72 };
73
74 #define FIP_TOC_HEADER_NAME 0xAA640001
75
76 struct fip_toc_header {
77 u32 name;
78 u32 serial_number;
79 u64 flags;
80 };
81
82 DECLARE_GLOBAL_DATA_PTR;
83
84 /* partition handling routines : CONFIG_CMD_MTDPARTS */
85 int mtdparts_init(void);
86 int find_dev_and_part(const char *id, struct mtd_device **dev,
87 u8 *part_num, struct part_info **part);
88
stm32prog_get_error(struct stm32prog_data * data)89 char *stm32prog_get_error(struct stm32prog_data *data)
90 {
91 static const char error_msg[] = "Unspecified";
92
93 if (strlen(data->error) == 0)
94 strcpy(data->error, error_msg);
95
96 return data->error;
97 }
98
stm32prog_is_fip_header(struct fip_toc_header * header)99 static bool stm32prog_is_fip_header(struct fip_toc_header *header)
100 {
101 return (header->name == FIP_TOC_HEADER_NAME) && header->serial_number;
102 }
103
stm32prog_header_check(struct raw_header_s * raw_header,struct image_header_s * header)104 void stm32prog_header_check(struct raw_header_s *raw_header,
105 struct image_header_s *header)
106 {
107 unsigned int i;
108
109 if (!raw_header || !header) {
110 log_debug("%s:no header data\n", __func__);
111 return;
112 }
113
114 header->type = HEADER_NONE;
115 header->image_checksum = 0x0;
116 header->image_length = 0x0;
117
118 if (stm32prog_is_fip_header((struct fip_toc_header *)raw_header)) {
119 header->type = HEADER_FIP;
120 return;
121 }
122
123 if (raw_header->magic_number !=
124 (('S' << 0) | ('T' << 8) | ('M' << 16) | (0x32 << 24))) {
125 log_debug("%s:invalid magic number : 0x%x\n",
126 __func__, raw_header->magic_number);
127 return;
128 }
129 /* only header v1.0 supported */
130 if (raw_header->header_version != 0x00010000) {
131 log_debug("%s:invalid header version : 0x%x\n",
132 __func__, raw_header->header_version);
133 return;
134 }
135 if (raw_header->reserved1 != 0x0 || raw_header->reserved2) {
136 log_debug("%s:invalid reserved field\n", __func__);
137 return;
138 }
139 for (i = 0; i < (sizeof(raw_header->padding) / 4); i++) {
140 if (raw_header->padding[i] != 0) {
141 log_debug("%s:invalid padding field\n", __func__);
142 return;
143 }
144 }
145 header->type = HEADER_STM32IMAGE;
146 header->image_checksum = le32_to_cpu(raw_header->image_checksum);
147 header->image_length = le32_to_cpu(raw_header->image_length);
148
149 return;
150 }
151
stm32prog_header_checksum(u32 addr,struct image_header_s * header)152 static u32 stm32prog_header_checksum(u32 addr, struct image_header_s *header)
153 {
154 u32 i, checksum;
155 u8 *payload;
156
157 /* compute checksum on payload */
158 payload = (u8 *)addr;
159 checksum = 0;
160 for (i = header->image_length; i > 0; i--)
161 checksum += *(payload++);
162
163 return checksum;
164 }
165
166 /* FLASHLAYOUT PARSING *****************************************/
parse_option(struct stm32prog_data * data,int i,char * p,struct stm32prog_part_t * part)167 static int parse_option(struct stm32prog_data *data,
168 int i, char *p, struct stm32prog_part_t *part)
169 {
170 int result = 0;
171 char *c = p;
172
173 part->option = 0;
174 if (!strcmp(p, "-"))
175 return 0;
176
177 while (*c) {
178 switch (*c) {
179 case 'P':
180 part->option |= OPT_SELECT;
181 break;
182 case 'E':
183 part->option |= OPT_EMPTY;
184 break;
185 case 'D':
186 part->option |= OPT_DELETE;
187 break;
188 default:
189 result = -EINVAL;
190 stm32prog_err("Layout line %d: invalid option '%c' in %s)",
191 i, *c, p);
192 return -EINVAL;
193 }
194 c++;
195 }
196 if (!(part->option & OPT_SELECT)) {
197 stm32prog_err("Layout line %d: missing 'P' in option %s", i, p);
198 return -EINVAL;
199 }
200
201 return result;
202 }
203
parse_id(struct stm32prog_data * data,int i,char * p,struct stm32prog_part_t * part)204 static int parse_id(struct stm32prog_data *data,
205 int i, char *p, struct stm32prog_part_t *part)
206 {
207 int result = 0;
208 unsigned long value;
209
210 result = strict_strtoul(p, 0, &value);
211 part->id = value;
212 if (result || value > PHASE_LAST_USER) {
213 stm32prog_err("Layout line %d: invalid phase value = %s", i, p);
214 result = -EINVAL;
215 }
216
217 return result;
218 }
219
parse_name(struct stm32prog_data * data,int i,char * p,struct stm32prog_part_t * part)220 static int parse_name(struct stm32prog_data *data,
221 int i, char *p, struct stm32prog_part_t *part)
222 {
223 int result = 0;
224
225 if (strlen(p) < sizeof(part->name)) {
226 strcpy(part->name, p);
227 } else {
228 stm32prog_err("Layout line %d: partition name too long [%d]: %s",
229 i, strlen(p), p);
230 result = -EINVAL;
231 }
232
233 return result;
234 }
235
parse_type(struct stm32prog_data * data,int i,char * p,struct stm32prog_part_t * part)236 static int parse_type(struct stm32prog_data *data,
237 int i, char *p, struct stm32prog_part_t *part)
238 {
239 int result = 0;
240 int len = 0;
241
242 part->bin_nb = 0;
243 if (!strncmp(p, "Binary", 6)) {
244 part->part_type = PART_BINARY;
245
246 /* search for Binary(X) case */
247 len = strlen(p);
248 part->bin_nb = 1;
249 if (len > 6) {
250 if (len < 8 ||
251 (p[6] != '(') ||
252 (p[len - 1] != ')'))
253 result = -EINVAL;
254 else
255 part->bin_nb =
256 simple_strtoul(&p[7], NULL, 10);
257 }
258 } else if (!strcmp(p, "System")) {
259 part->part_type = PART_SYSTEM;
260 } else if (!strcmp(p, "FileSystem")) {
261 part->part_type = PART_FILESYSTEM;
262 } else if (!strcmp(p, "RawImage")) {
263 part->part_type = RAW_IMAGE;
264 } else {
265 result = -EINVAL;
266 }
267 if (result)
268 stm32prog_err("Layout line %d: type parsing error : '%s'",
269 i, p);
270
271 return result;
272 }
273
parse_ip(struct stm32prog_data * data,int i,char * p,struct stm32prog_part_t * part)274 static int parse_ip(struct stm32prog_data *data,
275 int i, char *p, struct stm32prog_part_t *part)
276 {
277 int result = 0;
278 unsigned int len = 0;
279
280 part->dev_id = 0;
281 if (!strcmp(p, "none")) {
282 part->target = STM32PROG_NONE;
283 } else if (!strncmp(p, "mmc", 3)) {
284 part->target = STM32PROG_MMC;
285 len = 3;
286 } else if (!strncmp(p, "nor", 3)) {
287 part->target = STM32PROG_NOR;
288 len = 3;
289 } else if (!strncmp(p, "nand", 4)) {
290 part->target = STM32PROG_NAND;
291 len = 4;
292 } else if (!strncmp(p, "spi-nand", 8)) {
293 part->target = STM32PROG_SPI_NAND;
294 len = 8;
295 } else if (!strncmp(p, "ram", 3)) {
296 part->target = STM32PROG_RAM;
297 len = 0;
298 } else {
299 result = -EINVAL;
300 }
301 if (len) {
302 /* only one digit allowed for device id */
303 if (strlen(p) != len + 1) {
304 result = -EINVAL;
305 } else {
306 part->dev_id = p[len] - '0';
307 if (part->dev_id > 9)
308 result = -EINVAL;
309 }
310 }
311 if (result)
312 stm32prog_err("Layout line %d: ip parsing error: '%s'", i, p);
313
314 return result;
315 }
316
parse_offset(struct stm32prog_data * data,int i,char * p,struct stm32prog_part_t * part)317 static int parse_offset(struct stm32prog_data *data,
318 int i, char *p, struct stm32prog_part_t *part)
319 {
320 int result = 0;
321 char *tail;
322
323 part->part_id = 0;
324 part->addr = 0;
325 part->size = 0;
326 /* eMMC boot parttion */
327 if (!strncmp(p, "boot", 4)) {
328 if (strlen(p) != 5) {
329 result = -EINVAL;
330 } else {
331 if (p[4] == '1')
332 part->part_id = -1;
333 else if (p[4] == '2')
334 part->part_id = -2;
335 else
336 result = -EINVAL;
337 }
338 if (result)
339 stm32prog_err("Layout line %d: invalid part '%s'",
340 i, p);
341 } else {
342 part->addr = simple_strtoull(p, &tail, 0);
343 if (tail == p || *tail != '\0') {
344 stm32prog_err("Layout line %d: invalid offset '%s'",
345 i, p);
346 result = -EINVAL;
347 }
348 }
349
350 return result;
351 }
352
353 static
354 int (* const parse[COL_NB_STM32])(struct stm32prog_data *data, int i, char *p,
355 struct stm32prog_part_t *part) = {
356 [COL_OPTION] = parse_option,
357 [COL_ID] = parse_id,
358 [COL_NAME] = parse_name,
359 [COL_TYPE] = parse_type,
360 [COL_IP] = parse_ip,
361 [COL_OFFSET] = parse_offset,
362 };
363
parse_flash_layout(struct stm32prog_data * data,ulong addr,ulong size)364 static int parse_flash_layout(struct stm32prog_data *data,
365 ulong addr,
366 ulong size)
367 {
368 int column = 0, part_nb = 0, ret;
369 bool end_of_line, eof;
370 char *p, *start, *last, *col;
371 struct stm32prog_part_t *part;
372 int part_list_size;
373 int i;
374
375 data->part_nb = 0;
376
377 /* check if STM32image is detected */
378 stm32prog_header_check((struct raw_header_s *)addr, &data->header);
379 if (data->header.type == HEADER_STM32IMAGE) {
380 u32 checksum;
381
382 addr = addr + BL_HEADER_SIZE;
383 size = data->header.image_length;
384
385 checksum = stm32prog_header_checksum(addr, &data->header);
386 if (checksum != data->header.image_checksum) {
387 stm32prog_err("Layout: invalid checksum : 0x%x expected 0x%x",
388 checksum, data->header.image_checksum);
389 return -EIO;
390 }
391 }
392 if (!size)
393 return -EINVAL;
394
395 start = (char *)addr;
396 last = start + size;
397
398 *last = 0x0; /* force null terminated string */
399 log_debug("flash layout =\n%s\n", start);
400
401 /* calculate expected number of partitions */
402 part_list_size = 1;
403 p = start;
404 while (*p && (p < last)) {
405 if (*p++ == '\n') {
406 part_list_size++;
407 if (p < last && *p == '#')
408 part_list_size--;
409 }
410 }
411 if (part_list_size > PHASE_LAST_USER) {
412 stm32prog_err("Layout: too many partition (%d)",
413 part_list_size);
414 return -1;
415 }
416 part = calloc(sizeof(struct stm32prog_part_t), part_list_size);
417 if (!part) {
418 stm32prog_err("Layout: alloc failed");
419 return -ENOMEM;
420 }
421 data->part_array = part;
422
423 /* main parsing loop */
424 i = 1;
425 eof = false;
426 p = start;
427 col = start; /* 1st column */
428 end_of_line = false;
429 while (!eof) {
430 switch (*p) {
431 /* CR is ignored and replaced by NULL character */
432 case '\r':
433 *p = '\0';
434 p++;
435 continue;
436 case '\0':
437 end_of_line = true;
438 eof = true;
439 break;
440 case '\n':
441 end_of_line = true;
442 break;
443 case '\t':
444 break;
445 case '#':
446 /* comment line is skipped */
447 if (column == 0 && p == col) {
448 while ((p < last) && *p)
449 if (*p++ == '\n')
450 break;
451 col = p;
452 i++;
453 if (p >= last || !*p) {
454 eof = true;
455 end_of_line = true;
456 }
457 continue;
458 }
459 /* fall through */
460 /* by default continue with the next character */
461 default:
462 p++;
463 continue;
464 }
465
466 /* replace by \0: allow string parsing for each column */
467 *p = '\0';
468 p++;
469 if (p >= last) {
470 eof = true;
471 end_of_line = true;
472 }
473
474 /* skip empty line and multiple TAB in tsv file */
475 if (strlen(col) == 0) {
476 col = p;
477 /* skip empty line */
478 if (column == 0 && end_of_line) {
479 end_of_line = false;
480 i++;
481 }
482 continue;
483 }
484
485 if (column < COL_NB_STM32) {
486 ret = parse[column](data, i, col, part);
487 if (ret)
488 return ret;
489 }
490
491 /* save the beginning of the next column */
492 column++;
493 col = p;
494
495 if (!end_of_line)
496 continue;
497
498 /* end of the line detected */
499 end_of_line = false;
500
501 if (column < COL_NB_STM32) {
502 stm32prog_err("Layout line %d: no enought column", i);
503 return -EINVAL;
504 }
505 column = 0;
506 part_nb++;
507 part++;
508 i++;
509 if (part_nb >= part_list_size) {
510 part = NULL;
511 if (!eof) {
512 stm32prog_err("Layout: no enought memory for %d part",
513 part_nb);
514 return -EINVAL;
515 }
516 }
517 }
518 data->part_nb = part_nb;
519 if (data->part_nb == 0) {
520 stm32prog_err("Layout: no partition found");
521 return -ENODEV;
522 }
523
524 return 0;
525 }
526
part_cmp(void * priv,struct list_head * a,struct list_head * b)527 static int __init part_cmp(void *priv, struct list_head *a, struct list_head *b)
528 {
529 struct stm32prog_part_t *parta, *partb;
530
531 parta = container_of(a, struct stm32prog_part_t, list);
532 partb = container_of(b, struct stm32prog_part_t, list);
533
534 if (parta->part_id != partb->part_id)
535 return parta->part_id - partb->part_id;
536 else
537 return parta->addr > partb->addr ? 1 : -1;
538 }
539
get_mtd_by_target(char * string,enum stm32prog_target target,int dev_id)540 static void get_mtd_by_target(char *string, enum stm32prog_target target,
541 int dev_id)
542 {
543 const char *dev_str;
544
545 switch (target) {
546 case STM32PROG_NOR:
547 dev_str = "nor";
548 break;
549 case STM32PROG_NAND:
550 dev_str = "nand";
551 break;
552 case STM32PROG_SPI_NAND:
553 dev_str = "spi-nand";
554 break;
555 default:
556 dev_str = "invalid";
557 break;
558 }
559 sprintf(string, "%s%d", dev_str, dev_id);
560 }
561
init_device(struct stm32prog_data * data,struct stm32prog_dev_t * dev)562 static int init_device(struct stm32prog_data *data,
563 struct stm32prog_dev_t *dev)
564 {
565 struct mmc *mmc = NULL;
566 struct blk_desc *block_dev = NULL;
567 struct mtd_info *mtd = NULL;
568 char mtd_id[16];
569 int part_id;
570 int ret;
571 u64 first_addr = 0, last_addr = 0;
572 struct stm32prog_part_t *part, *next_part;
573 u64 part_addr, part_size;
574 bool part_found;
575 const char *part_name;
576
577 switch (dev->target) {
578 case STM32PROG_MMC:
579 if (!IS_ENABLED(CONFIG_MMC)) {
580 stm32prog_err("unknown device type = %d", dev->target);
581 return -ENODEV;
582 }
583 mmc = find_mmc_device(dev->dev_id);
584 if (!mmc || mmc_init(mmc)) {
585 stm32prog_err("mmc device %d not found", dev->dev_id);
586 return -ENODEV;
587 }
588 block_dev = mmc_get_blk_desc(mmc);
589 if (!block_dev) {
590 stm32prog_err("mmc device %d not probed", dev->dev_id);
591 return -ENODEV;
592 }
593 dev->erase_size = mmc->erase_grp_size * block_dev->blksz;
594 dev->mmc = mmc;
595
596 /* reserve a full erase group for each GTP headers */
597 if (mmc->erase_grp_size > GPT_HEADER_SZ) {
598 first_addr = dev->erase_size;
599 last_addr = (u64)(block_dev->lba -
600 mmc->erase_grp_size) *
601 block_dev->blksz;
602 } else {
603 first_addr = (u64)GPT_HEADER_SZ * block_dev->blksz;
604 last_addr = (u64)(block_dev->lba - GPT_HEADER_SZ - 1) *
605 block_dev->blksz;
606 }
607 log_debug("MMC %d: lba=%ld blksz=%ld\n", dev->dev_id,
608 block_dev->lba, block_dev->blksz);
609 log_debug(" available address = 0x%llx..0x%llx\n",
610 first_addr, last_addr);
611 log_debug(" full_update = %d\n", dev->full_update);
612 break;
613 case STM32PROG_NOR:
614 case STM32PROG_NAND:
615 case STM32PROG_SPI_NAND:
616 if (!IS_ENABLED(CONFIG_MTD)) {
617 stm32prog_err("unknown device type = %d", dev->target);
618 return -ENODEV;
619 }
620 get_mtd_by_target(mtd_id, dev->target, dev->dev_id);
621 log_debug("%s\n", mtd_id);
622
623 mtdparts_init();
624 mtd = get_mtd_device_nm(mtd_id);
625 if (IS_ERR(mtd)) {
626 stm32prog_err("MTD device %s not found", mtd_id);
627 return -ENODEV;
628 }
629 first_addr = 0;
630 last_addr = mtd->size;
631 dev->erase_size = mtd->erasesize;
632 log_debug("MTD device %s: size=%lld erasesize=%d\n",
633 mtd_id, mtd->size, mtd->erasesize);
634 log_debug(" available address = 0x%llx..0x%llx\n",
635 first_addr, last_addr);
636 dev->mtd = mtd;
637 break;
638 case STM32PROG_RAM:
639 first_addr = gd->bd->bi_dram[0].start;
640 last_addr = first_addr + gd->bd->bi_dram[0].size;
641 dev->erase_size = 1;
642 break;
643 default:
644 stm32prog_err("unknown device type = %d", dev->target);
645 return -ENODEV;
646 }
647 log_debug(" erase size = 0x%x\n", dev->erase_size);
648 log_debug(" full_update = %d\n", dev->full_update);
649
650 /* order partition list in offset order */
651 list_sort(NULL, &dev->part_list, &part_cmp);
652 part_id = 1;
653 log_debug("id : Opt Phase Name target.n dev.n addr size part_off part_size\n");
654 list_for_each_entry(part, &dev->part_list, list) {
655 if (part->bin_nb > 1) {
656 if ((dev->target != STM32PROG_NAND &&
657 dev->target != STM32PROG_SPI_NAND) ||
658 part->id >= PHASE_FIRST_USER ||
659 strncmp(part->name, "fsbl", 4)) {
660 stm32prog_err("%s (0x%x): multiple binary %d not supported",
661 part->name, part->id,
662 part->bin_nb);
663 return -EINVAL;
664 }
665 }
666 if (part->part_type == RAW_IMAGE) {
667 part->part_id = 0x0;
668 part->addr = 0x0;
669 if (block_dev)
670 part->size = block_dev->lba * block_dev->blksz;
671 else
672 part->size = last_addr;
673 log_debug("-- : %1d %02x %14s %02d.%d %02d.%02d %08llx %08llx\n",
674 part->option, part->id, part->name,
675 part->part_type, part->bin_nb, part->target,
676 part->dev_id, part->addr, part->size);
677 continue;
678 }
679 if (part->part_id < 0) { /* boot hw partition for eMMC */
680 if (mmc) {
681 part->size = mmc->capacity_boot;
682 } else {
683 stm32prog_err("%s (0x%x): hw partition not expected : %d",
684 part->name, part->id,
685 part->part_id);
686 return -ENODEV;
687 }
688 } else {
689 part->part_id = part_id++;
690
691 /* last partition : size to the end of the device */
692 if (part->list.next != &dev->part_list) {
693 next_part =
694 container_of(part->list.next,
695 struct stm32prog_part_t,
696 list);
697 if (part->addr < next_part->addr) {
698 part->size = next_part->addr -
699 part->addr;
700 } else {
701 stm32prog_err("%s (0x%x): same address : 0x%llx == %s (0x%x): 0x%llx",
702 part->name, part->id,
703 part->addr,
704 next_part->name,
705 next_part->id,
706 next_part->addr);
707 return -EINVAL;
708 }
709 } else {
710 if (part->addr <= last_addr) {
711 part->size = last_addr - part->addr;
712 } else {
713 stm32prog_err("%s (0x%x): invalid address 0x%llx (max=0x%llx)",
714 part->name, part->id,
715 part->addr, last_addr);
716 return -EINVAL;
717 }
718 }
719 if (part->addr < first_addr) {
720 stm32prog_err("%s (0x%x): invalid address 0x%llx (min=0x%llx)",
721 part->name, part->id,
722 part->addr, first_addr);
723 return -EINVAL;
724 }
725 }
726 if ((part->addr & ((u64)part->dev->erase_size - 1)) != 0) {
727 stm32prog_err("%s (0x%x): not aligned address : 0x%llx on erase size 0x%x",
728 part->name, part->id, part->addr,
729 part->dev->erase_size);
730 return -EINVAL;
731 }
732 log_debug("%02d : %1d %02x %14s %02d.%d %02d.%02d %08llx %08llx",
733 part->part_id, part->option, part->id, part->name,
734 part->part_type, part->bin_nb, part->target,
735 part->dev_id, part->addr, part->size);
736
737 part_addr = 0;
738 part_size = 0;
739 part_found = false;
740
741 /* check coherency with existing partition */
742 if (block_dev) {
743 /*
744 * block devices with GPT: check user partition size
745 * only for partial update, the GPT partions are be
746 * created for full update
747 */
748 if (dev->full_update || part->part_id < 0) {
749 log_debug("\n");
750 continue;
751 }
752 struct disk_partition partinfo;
753
754 ret = part_get_info(block_dev, part->part_id,
755 &partinfo);
756
757 if (ret) {
758 stm32prog_err("%s (0x%x):Couldn't find part %d on device mmc %d",
759 part->name, part->id,
760 part_id, part->dev_id);
761 return -ENODEV;
762 }
763 part_addr = (u64)partinfo.start * partinfo.blksz;
764 part_size = (u64)partinfo.size * partinfo.blksz;
765 part_name = (char *)partinfo.name;
766 part_found = true;
767 }
768
769 if (IS_ENABLED(CONFIG_MTD) && mtd) {
770 char mtd_part_id[32];
771 struct part_info *mtd_part;
772 struct mtd_device *mtd_dev;
773 u8 part_num;
774
775 sprintf(mtd_part_id, "%s,%d", mtd_id,
776 part->part_id - 1);
777 ret = find_dev_and_part(mtd_part_id, &mtd_dev,
778 &part_num, &mtd_part);
779 if (ret != 0) {
780 stm32prog_err("%s (0x%x): Invalid MTD partition %s",
781 part->name, part->id,
782 mtd_part_id);
783 return -ENODEV;
784 }
785 part_addr = mtd_part->offset;
786 part_size = mtd_part->size;
787 part_name = mtd_part->name;
788 part_found = true;
789 }
790
791 /* no partition for this device */
792 if (!part_found) {
793 log_debug("\n");
794 continue;
795 }
796
797 log_debug(" %08llx %08llx\n", part_addr, part_size);
798
799 if (part->addr != part_addr) {
800 stm32prog_err("%s (0x%x): Bad address for partition %d (%s) = 0x%llx <> 0x%llx expected",
801 part->name, part->id, part->part_id,
802 part_name, part->addr, part_addr);
803 return -ENODEV;
804 }
805 if (part->size != part_size) {
806 stm32prog_err("%s (0x%x): Bad size for partition %d (%s) at 0x%llx = 0x%llx <> 0x%llx expected",
807 part->name, part->id, part->part_id,
808 part_name, part->addr, part->size,
809 part_size);
810 return -ENODEV;
811 }
812 }
813 return 0;
814 }
815
treat_partition_list(struct stm32prog_data * data)816 static int treat_partition_list(struct stm32prog_data *data)
817 {
818 int i, j;
819 struct stm32prog_part_t *part;
820
821 for (j = 0; j < STM32PROG_MAX_DEV; j++) {
822 data->dev[j].target = STM32PROG_NONE;
823 INIT_LIST_HEAD(&data->dev[j].part_list);
824 }
825
826 data->tee_detected = false;
827 data->fsbl_nor_detected = false;
828 for (i = 0; i < data->part_nb; i++) {
829 part = &data->part_array[i];
830 part->alt_id = -1;
831
832 /* skip partition with IP="none" */
833 if (part->target == STM32PROG_NONE) {
834 if (IS_SELECT(part)) {
835 stm32prog_err("Layout: selected none phase = 0x%x",
836 part->id);
837 return -EINVAL;
838 }
839 continue;
840 }
841
842 if (part->id == PHASE_FLASHLAYOUT ||
843 part->id > PHASE_LAST_USER) {
844 stm32prog_err("Layout: invalid phase = 0x%x",
845 part->id);
846 return -EINVAL;
847 }
848 for (j = i + 1; j < data->part_nb; j++) {
849 if (part->id == data->part_array[j].id) {
850 stm32prog_err("Layout: duplicated phase 0x%x at line %d and %d",
851 part->id, i, j);
852 return -EINVAL;
853 }
854 }
855 for (j = 0; j < STM32PROG_MAX_DEV; j++) {
856 if (data->dev[j].target == STM32PROG_NONE) {
857 /* new device found */
858 data->dev[j].target = part->target;
859 data->dev[j].dev_id = part->dev_id;
860 data->dev[j].full_update = true;
861 data->dev_nb++;
862 break;
863 } else if ((part->target == data->dev[j].target) &&
864 (part->dev_id == data->dev[j].dev_id)) {
865 break;
866 }
867 }
868 if (j == STM32PROG_MAX_DEV) {
869 stm32prog_err("Layout: too many device");
870 return -EINVAL;
871 }
872 switch (part->target) {
873 case STM32PROG_NOR:
874 if (!data->fsbl_nor_detected &&
875 !strncmp(part->name, "fsbl", 4))
876 data->fsbl_nor_detected = true;
877 /* fallthrough */
878 case STM32PROG_NAND:
879 case STM32PROG_SPI_NAND:
880 if (!data->tee_detected &&
881 !strncmp(part->name, "tee", 3))
882 data->tee_detected = true;
883 break;
884 default:
885 break;
886 }
887 part->dev = &data->dev[j];
888 if (!IS_SELECT(part))
889 part->dev->full_update = false;
890 list_add_tail(&part->list, &data->dev[j].part_list);
891 }
892
893 return 0;
894 }
895
create_gpt_partitions(struct stm32prog_data * data)896 static int create_gpt_partitions(struct stm32prog_data *data)
897 {
898 int offset = 0;
899 const int buflen = SZ_8K;
900 char *buf;
901 char uuid[UUID_STR_LEN + 1];
902 unsigned char *uuid_bin;
903 unsigned int mmc_id;
904 int i;
905 bool rootfs_found;
906 struct stm32prog_part_t *part;
907
908 buf = malloc(buflen);
909 if (!buf)
910 return -ENOMEM;
911
912 puts("partitions : ");
913 /* initialize the selected device */
914 for (i = 0; i < data->dev_nb; i++) {
915 /* create gpt partition support only for full update on MMC */
916 if (data->dev[i].target != STM32PROG_MMC ||
917 !data->dev[i].full_update)
918 continue;
919
920 offset = 0;
921 rootfs_found = false;
922 memset(buf, 0, buflen);
923
924 list_for_each_entry(part, &data->dev[i].part_list, list) {
925 /* skip eMMC boot partitions */
926 if (part->part_id < 0)
927 continue;
928 /* skip Raw Image */
929 if (part->part_type == RAW_IMAGE)
930 continue;
931
932 if (offset + 100 > buflen) {
933 log_debug("\n%s: buffer too small, %s skippped",
934 __func__, part->name);
935 continue;
936 }
937
938 if (!offset)
939 offset += sprintf(buf, "gpt write mmc %d \"",
940 data->dev[i].dev_id);
941
942 offset += snprintf(buf + offset, buflen - offset,
943 "name=%s,start=0x%llx,size=0x%llx",
944 part->name,
945 part->addr,
946 part->size);
947
948 if (part->part_type == PART_BINARY)
949 offset += snprintf(buf + offset,
950 buflen - offset,
951 ",type="
952 LINUX_RESERVED_UUID);
953 else
954 offset += snprintf(buf + offset,
955 buflen - offset,
956 ",type=linux");
957
958 if (part->part_type == PART_SYSTEM)
959 offset += snprintf(buf + offset,
960 buflen - offset,
961 ",bootable");
962
963 if (!rootfs_found && !strcmp(part->name, "rootfs")) {
964 mmc_id = part->dev_id;
965 rootfs_found = true;
966 if (mmc_id < ARRAY_SIZE(uuid_mmc)) {
967 uuid_bin =
968 (unsigned char *)uuid_mmc[mmc_id].b;
969 uuid_bin_to_str(uuid_bin, uuid,
970 UUID_STR_FORMAT_GUID);
971 offset += snprintf(buf + offset,
972 buflen - offset,
973 ",uuid=%s", uuid);
974 }
975 }
976
977 offset += snprintf(buf + offset, buflen - offset, ";");
978 }
979
980 if (offset) {
981 offset += snprintf(buf + offset, buflen - offset, "\"");
982 log_debug("\ncmd: %s\n", buf);
983 if (run_command(buf, 0)) {
984 stm32prog_err("GPT partitionning fail: %s",
985 buf);
986 free(buf);
987
988 return -1;
989 }
990 }
991
992 if (data->dev[i].mmc)
993 part_init(mmc_get_blk_desc(data->dev[i].mmc));
994
995 #ifdef DEBUG
996 sprintf(buf, "gpt verify mmc %d", data->dev[i].dev_id);
997 log_debug("\ncmd: %s", buf);
998 if (run_command(buf, 0))
999 printf("fail !\n");
1000 else
1001 printf("OK\n");
1002
1003 sprintf(buf, "part list mmc %d", data->dev[i].dev_id);
1004 run_command(buf, 0);
1005 #endif
1006 }
1007 puts("done\n");
1008
1009 #ifdef DEBUG
1010 run_command("mtd list", 0);
1011 #endif
1012 free(buf);
1013
1014 return 0;
1015 }
1016
stm32prog_alt_add(struct stm32prog_data * data,struct dfu_entity * dfu,struct stm32prog_part_t * part)1017 static int stm32prog_alt_add(struct stm32prog_data *data,
1018 struct dfu_entity *dfu,
1019 struct stm32prog_part_t *part)
1020 {
1021 int ret = 0;
1022 int offset = 0;
1023 char devstr[10];
1024 char dfustr[10];
1025 char buf[ALT_BUF_LEN];
1026 u32 size;
1027 char multiplier, type;
1028
1029 /* max 3 digit for sector size */
1030 if (part->size > SZ_1M) {
1031 size = (u32)(part->size / SZ_1M);
1032 multiplier = 'M';
1033 } else if (part->size > SZ_1K) {
1034 size = (u32)(part->size / SZ_1K);
1035 multiplier = 'K';
1036 } else {
1037 size = (u32)part->size;
1038 multiplier = 'B';
1039 }
1040 if (IS_SELECT(part) && !IS_EMPTY(part))
1041 type = 'e'; /*Readable and Writeable*/
1042 else
1043 type = 'a';/*Readable*/
1044
1045 memset(buf, 0, sizeof(buf));
1046 offset = snprintf(buf, ALT_BUF_LEN - offset,
1047 "@%s/0x%02x/1*%d%c%c ",
1048 part->name, part->id,
1049 size, multiplier, type);
1050
1051 if (part->target == STM32PROG_RAM) {
1052 offset += snprintf(buf + offset, ALT_BUF_LEN - offset,
1053 "ram 0x%llx 0x%llx",
1054 part->addr, part->size);
1055 } else if (part->part_type == RAW_IMAGE) {
1056 u64 dfu_size;
1057
1058 if (part->dev->target == STM32PROG_MMC)
1059 dfu_size = part->size / part->dev->mmc->read_bl_len;
1060 else
1061 dfu_size = part->size;
1062 offset += snprintf(buf + offset, ALT_BUF_LEN - offset,
1063 "raw 0x0 0x%llx", dfu_size);
1064 } else if (part->part_id < 0) {
1065 u64 nb_blk = part->size / part->dev->mmc->read_bl_len;
1066
1067 offset += snprintf(buf + offset, ALT_BUF_LEN - offset,
1068 "raw 0x%llx 0x%llx",
1069 part->addr, nb_blk);
1070 offset += snprintf(buf + offset, ALT_BUF_LEN - offset,
1071 " mmcpart %d;", -(part->part_id));
1072 } else {
1073 if (part->part_type == PART_SYSTEM &&
1074 (part->target == STM32PROG_NAND ||
1075 part->target == STM32PROG_NOR ||
1076 part->target == STM32PROG_SPI_NAND))
1077 offset += snprintf(buf + offset,
1078 ALT_BUF_LEN - offset,
1079 "partubi");
1080 else
1081 offset += snprintf(buf + offset,
1082 ALT_BUF_LEN - offset,
1083 "part");
1084 /* dev_id requested by DFU MMC */
1085 if (part->target == STM32PROG_MMC)
1086 offset += snprintf(buf + offset, ALT_BUF_LEN - offset,
1087 " %d", part->dev_id);
1088 offset += snprintf(buf + offset, ALT_BUF_LEN - offset,
1089 " %d;", part->part_id);
1090 }
1091 ret = -ENODEV;
1092 switch (part->target) {
1093 case STM32PROG_MMC:
1094 if (IS_ENABLED(CONFIG_MMC)) {
1095 ret = 0;
1096 sprintf(dfustr, "mmc");
1097 sprintf(devstr, "%d", part->dev_id);
1098 }
1099 break;
1100 case STM32PROG_NAND:
1101 case STM32PROG_NOR:
1102 case STM32PROG_SPI_NAND:
1103 if (IS_ENABLED(CONFIG_MTD)) {
1104 ret = 0;
1105 sprintf(dfustr, "mtd");
1106 get_mtd_by_target(devstr, part->target, part->dev_id);
1107 }
1108 break;
1109 case STM32PROG_RAM:
1110 ret = 0;
1111 sprintf(dfustr, "ram");
1112 sprintf(devstr, "0");
1113 break;
1114 default:
1115 break;
1116 }
1117 if (ret) {
1118 stm32prog_err("invalid target: %d", part->target);
1119 return ret;
1120 }
1121 log_debug("dfu_alt_add(%s,%s,%s)\n", dfustr, devstr, buf);
1122 ret = dfu_alt_add(dfu, dfustr, devstr, buf);
1123 log_debug("dfu_alt_add(%s,%s,%s) result %d\n",
1124 dfustr, devstr, buf, ret);
1125
1126 return ret;
1127 }
1128
stm32prog_alt_add_virt(struct dfu_entity * dfu,char * name,int phase,int size)1129 static int stm32prog_alt_add_virt(struct dfu_entity *dfu,
1130 char *name, int phase, int size)
1131 {
1132 int ret = 0;
1133 char devstr[4];
1134 char buf[ALT_BUF_LEN];
1135
1136 sprintf(devstr, "%d", phase);
1137 sprintf(buf, "@%s/0x%02x/1*%dBe", name, phase, size);
1138 ret = dfu_alt_add(dfu, "virt", devstr, buf);
1139 log_debug("dfu_alt_add(virt,%s,%s) result %d\n", devstr, buf, ret);
1140
1141 return ret;
1142 }
1143
dfu_init_entities(struct stm32prog_data * data)1144 static int dfu_init_entities(struct stm32prog_data *data)
1145 {
1146 int ret = 0;
1147 int phase, i, alt_id;
1148 struct stm32prog_part_t *part;
1149 struct dfu_entity *dfu;
1150 int alt_nb;
1151
1152 alt_nb = 3; /* number of virtual = CMD, OTP, PMIC*/
1153 if (data->part_nb == 0)
1154 alt_nb++; /* +1 for FlashLayout */
1155 else
1156 for (i = 0; i < data->part_nb; i++) {
1157 if (data->part_array[i].target != STM32PROG_NONE)
1158 alt_nb++;
1159 }
1160
1161 if (dfu_alt_init(alt_nb, &dfu))
1162 return -ENODEV;
1163
1164 puts("DFU alt info setting: ");
1165 if (data->part_nb) {
1166 alt_id = 0;
1167 for (phase = 1;
1168 (phase <= PHASE_LAST_USER) &&
1169 (alt_id < alt_nb) && !ret;
1170 phase++) {
1171 /* ordering alt setting by phase id */
1172 part = NULL;
1173 for (i = 0; i < data->part_nb; i++) {
1174 if (phase == data->part_array[i].id) {
1175 part = &data->part_array[i];
1176 break;
1177 }
1178 }
1179 if (!part)
1180 continue;
1181 if (part->target == STM32PROG_NONE)
1182 continue;
1183 part->alt_id = alt_id;
1184 alt_id++;
1185
1186 ret = stm32prog_alt_add(data, dfu, part);
1187 }
1188 } else {
1189 char buf[ALT_BUF_LEN];
1190
1191 sprintf(buf, "@FlashLayout/0x%02x/1*256Ke ram %x 40000",
1192 PHASE_FLASHLAYOUT, STM32_DDR_BASE);
1193 ret = dfu_alt_add(dfu, "ram", NULL, buf);
1194 log_debug("dfu_alt_add(ram, NULL,%s) result %d\n", buf, ret);
1195 }
1196
1197 if (!ret)
1198 ret = stm32prog_alt_add_virt(dfu, "virtual", PHASE_CMD, 512);
1199
1200 if (!ret)
1201 ret = stm32prog_alt_add_virt(dfu, "OTP", PHASE_OTP, 512);
1202
1203 if (!ret && CONFIG_IS_ENABLED(DM_PMIC))
1204 ret = stm32prog_alt_add_virt(dfu, "PMIC", PHASE_PMIC, 8);
1205
1206 if (ret)
1207 stm32prog_err("dfu init failed: %d", ret);
1208 puts("done\n");
1209
1210 #ifdef DEBUG
1211 dfu_show_entities();
1212 #endif
1213 return ret;
1214 }
1215
stm32prog_otp_write(struct stm32prog_data * data,u32 offset,u8 * buffer,long * size)1216 int stm32prog_otp_write(struct stm32prog_data *data, u32 offset, u8 *buffer,
1217 long *size)
1218 {
1219 log_debug("%s: %x %lx\n", __func__, offset, *size);
1220
1221 if (!data->otp_part) {
1222 data->otp_part = memalign(CONFIG_SYS_CACHELINE_SIZE, OTP_SIZE);
1223 if (!data->otp_part)
1224 return -ENOMEM;
1225 }
1226
1227 if (!offset)
1228 memset(data->otp_part, 0, OTP_SIZE);
1229
1230 if (offset + *size > OTP_SIZE)
1231 *size = OTP_SIZE - offset;
1232
1233 memcpy((void *)((u32)data->otp_part + offset), buffer, *size);
1234
1235 return 0;
1236 }
1237
stm32prog_otp_read(struct stm32prog_data * data,u32 offset,u8 * buffer,long * size)1238 int stm32prog_otp_read(struct stm32prog_data *data, u32 offset, u8 *buffer,
1239 long *size)
1240 {
1241 int result = 0;
1242
1243 if (!IS_ENABLED(CONFIG_ARM_SMCCC)) {
1244 stm32prog_err("OTP update not supported");
1245
1246 return -1;
1247 }
1248
1249 log_debug("%s: %x %lx\n", __func__, offset, *size);
1250 /* alway read for first packet */
1251 if (!offset) {
1252 if (!data->otp_part)
1253 data->otp_part =
1254 memalign(CONFIG_SYS_CACHELINE_SIZE, OTP_SIZE);
1255
1256 if (!data->otp_part) {
1257 result = -ENOMEM;
1258 goto end_otp_read;
1259 }
1260
1261 /* init struct with 0 */
1262 memset(data->otp_part, 0, OTP_SIZE);
1263
1264 /* call the service */
1265 result = stm32_smc_exec(STM32_SMC_BSEC, STM32_SMC_READ_ALL,
1266 (u32)data->otp_part, 0);
1267 if (result)
1268 goto end_otp_read;
1269 }
1270
1271 if (!data->otp_part) {
1272 result = -ENOMEM;
1273 goto end_otp_read;
1274 }
1275
1276 if (offset + *size > OTP_SIZE)
1277 *size = OTP_SIZE - offset;
1278 memcpy(buffer, (void *)((u32)data->otp_part + offset), *size);
1279
1280 end_otp_read:
1281 log_debug("%s: result %i\n", __func__, result);
1282
1283 return result;
1284 }
1285
stm32prog_otp_start(struct stm32prog_data * data)1286 int stm32prog_otp_start(struct stm32prog_data *data)
1287 {
1288 int result = 0;
1289 struct arm_smccc_res res;
1290
1291 if (!IS_ENABLED(CONFIG_ARM_SMCCC)) {
1292 stm32prog_err("OTP update not supported");
1293
1294 return -1;
1295 }
1296
1297 if (!data->otp_part) {
1298 stm32prog_err("start OTP without data");
1299 return -1;
1300 }
1301
1302 arm_smccc_smc(STM32_SMC_BSEC, STM32_SMC_WRITE_ALL,
1303 (u32)data->otp_part, 0, 0, 0, 0, 0, &res);
1304
1305 if (!res.a0) {
1306 switch (res.a1) {
1307 case 0:
1308 result = 0;
1309 break;
1310 case 1:
1311 stm32prog_err("Provisioning");
1312 result = 0;
1313 break;
1314 default:
1315 log_err("%s: OTP incorrect value (err = %ld)\n",
1316 __func__, res.a1);
1317 result = -EINVAL;
1318 break;
1319 }
1320 } else {
1321 log_err("%s: Failed to exec svc=%x op=%x in secure mode (err = %ld)\n",
1322 __func__, STM32_SMC_BSEC, STM32_SMC_WRITE_ALL, res.a0);
1323 result = -EINVAL;
1324 }
1325
1326 free(data->otp_part);
1327 data->otp_part = NULL;
1328 log_debug("%s: result %i\n", __func__, result);
1329
1330 return result;
1331 }
1332
stm32prog_pmic_write(struct stm32prog_data * data,u32 offset,u8 * buffer,long * size)1333 int stm32prog_pmic_write(struct stm32prog_data *data, u32 offset, u8 *buffer,
1334 long *size)
1335 {
1336 log_debug("%s: %x %lx\n", __func__, offset, *size);
1337
1338 if (!offset)
1339 memset(data->pmic_part, 0, PMIC_SIZE);
1340
1341 if (offset + *size > PMIC_SIZE)
1342 *size = PMIC_SIZE - offset;
1343
1344 memcpy(&data->pmic_part[offset], buffer, *size);
1345
1346 return 0;
1347 }
1348
stm32prog_pmic_read(struct stm32prog_data * data,u32 offset,u8 * buffer,long * size)1349 int stm32prog_pmic_read(struct stm32prog_data *data, u32 offset, u8 *buffer,
1350 long *size)
1351 {
1352 int result = 0, ret;
1353 struct udevice *dev;
1354
1355 if (!CONFIG_IS_ENABLED(PMIC_STPMIC1)) {
1356 stm32prog_err("PMIC update not supported");
1357
1358 return -EOPNOTSUPP;
1359 }
1360
1361 log_debug("%s: %x %lx\n", __func__, offset, *size);
1362 ret = uclass_get_device_by_driver(UCLASS_MISC,
1363 DM_DRIVER_GET(stpmic1_nvm),
1364 &dev);
1365 if (ret)
1366 return ret;
1367
1368 /* alway request PMIC for first packet */
1369 if (!offset) {
1370 /* init struct with 0 */
1371 memset(data->pmic_part, 0, PMIC_SIZE);
1372
1373 ret = uclass_get_device_by_driver(UCLASS_MISC,
1374 DM_DRIVER_GET(stpmic1_nvm),
1375 &dev);
1376 if (ret)
1377 return ret;
1378
1379 ret = misc_read(dev, 0xF8, data->pmic_part, PMIC_SIZE);
1380 if (ret < 0) {
1381 result = ret;
1382 goto end_pmic_read;
1383 }
1384 if (ret != PMIC_SIZE) {
1385 result = -EACCES;
1386 goto end_pmic_read;
1387 }
1388 }
1389
1390 if (offset + *size > PMIC_SIZE)
1391 *size = PMIC_SIZE - offset;
1392
1393 memcpy(buffer, &data->pmic_part[offset], *size);
1394
1395 end_pmic_read:
1396 log_debug("%s: result %i\n", __func__, result);
1397 return result;
1398 }
1399
stm32prog_pmic_start(struct stm32prog_data * data)1400 int stm32prog_pmic_start(struct stm32prog_data *data)
1401 {
1402 int ret;
1403 struct udevice *dev;
1404
1405 if (!CONFIG_IS_ENABLED(PMIC_STPMIC1)) {
1406 stm32prog_err("PMIC update not supported");
1407
1408 return -EOPNOTSUPP;
1409 }
1410
1411 ret = uclass_get_device_by_driver(UCLASS_MISC,
1412 DM_DRIVER_GET(stpmic1_nvm),
1413 &dev);
1414 if (ret)
1415 return ret;
1416
1417 return misc_write(dev, 0xF8, data->pmic_part, PMIC_SIZE);
1418 }
1419
1420 /* copy FSBL on NAND to improve reliability on NAND */
stm32prog_copy_fsbl(struct stm32prog_part_t * part)1421 static int stm32prog_copy_fsbl(struct stm32prog_part_t *part)
1422 {
1423 int ret, i;
1424 void *fsbl;
1425 struct image_header_s header;
1426 struct raw_header_s raw_header;
1427 struct dfu_entity *dfu;
1428 long size, offset;
1429
1430 if (part->target != STM32PROG_NAND &&
1431 part->target != STM32PROG_SPI_NAND)
1432 return -EINVAL;
1433
1434 dfu = dfu_get_entity(part->alt_id);
1435
1436 /* read header */
1437 dfu_transaction_cleanup(dfu);
1438 size = BL_HEADER_SIZE;
1439 ret = dfu->read_medium(dfu, 0, (void *)&raw_header, &size);
1440 if (ret)
1441 return ret;
1442
1443 stm32prog_header_check(&raw_header, &header);
1444 if (header.type != HEADER_STM32IMAGE)
1445 return -ENOENT;
1446
1447 /* read header + payload */
1448 size = header.image_length + BL_HEADER_SIZE;
1449 size = round_up(size, part->dev->mtd->erasesize);
1450 fsbl = calloc(1, size);
1451 if (!fsbl)
1452 return -ENOMEM;
1453 ret = dfu->read_medium(dfu, 0, fsbl, &size);
1454 log_debug("%s read size=%lx ret=%d\n", __func__, size, ret);
1455 if (ret)
1456 goto error;
1457
1458 dfu_transaction_cleanup(dfu);
1459 offset = 0;
1460 for (i = part->bin_nb - 1; i > 0; i--) {
1461 offset += size;
1462 /* write to the next erase block */
1463 ret = dfu->write_medium(dfu, offset, fsbl, &size);
1464 log_debug("%s copy at ofset=%lx size=%lx ret=%d",
1465 __func__, offset, size, ret);
1466 if (ret)
1467 goto error;
1468 }
1469
1470 error:
1471 free(fsbl);
1472 return ret;
1473 }
1474
stm32prog_end_phase(struct stm32prog_data * data)1475 static void stm32prog_end_phase(struct stm32prog_data *data)
1476 {
1477 if (data->phase == PHASE_FLASHLAYOUT) {
1478 if (parse_flash_layout(data, STM32_DDR_BASE, 0))
1479 stm32prog_err("Layout: invalid FlashLayout");
1480 return;
1481 }
1482
1483 if (!data->cur_part)
1484 return;
1485
1486 if (data->cur_part->target == STM32PROG_RAM) {
1487 if (data->cur_part->part_type == PART_SYSTEM)
1488 data->uimage = data->cur_part->addr;
1489 if (data->cur_part->part_type == PART_FILESYSTEM)
1490 data->dtb = data->cur_part->addr;
1491 }
1492
1493 if (CONFIG_IS_ENABLED(MMC) &&
1494 data->cur_part->part_id < 0) {
1495 char cmdbuf[60];
1496
1497 sprintf(cmdbuf, "mmc bootbus %d 0 0 0; mmc partconf %d 1 %d 0",
1498 data->cur_part->dev_id, data->cur_part->dev_id,
1499 -(data->cur_part->part_id));
1500 if (run_command(cmdbuf, 0)) {
1501 stm32prog_err("commands '%s' failed", cmdbuf);
1502 return;
1503 }
1504 }
1505
1506 if (CONFIG_IS_ENABLED(MTD) &&
1507 data->cur_part->bin_nb > 1) {
1508 if (stm32prog_copy_fsbl(data->cur_part)) {
1509 stm32prog_err("%s (0x%x): copy of fsbl failed",
1510 data->cur_part->name, data->cur_part->id);
1511 return;
1512 }
1513 }
1514 }
1515
stm32prog_do_reset(struct stm32prog_data * data)1516 void stm32prog_do_reset(struct stm32prog_data *data)
1517 {
1518 if (data->phase == PHASE_RESET) {
1519 data->phase = PHASE_DO_RESET;
1520 puts("Reset requested\n");
1521 }
1522 }
1523
stm32prog_next_phase(struct stm32prog_data * data)1524 void stm32prog_next_phase(struct stm32prog_data *data)
1525 {
1526 int phase, i;
1527 struct stm32prog_part_t *part;
1528 bool found;
1529
1530 phase = data->phase;
1531 switch (phase) {
1532 case PHASE_RESET:
1533 case PHASE_END:
1534 case PHASE_DO_RESET:
1535 return;
1536 }
1537
1538 /* found next selected partition */
1539 data->dfu_seq = 0;
1540 data->cur_part = NULL;
1541 data->phase = PHASE_END;
1542 found = false;
1543 do {
1544 phase++;
1545 if (phase > PHASE_LAST_USER)
1546 break;
1547 for (i = 0; i < data->part_nb; i++) {
1548 part = &data->part_array[i];
1549 if (part->id == phase) {
1550 if (IS_SELECT(part) && !IS_EMPTY(part)) {
1551 data->cur_part = part;
1552 data->phase = phase;
1553 found = true;
1554 }
1555 break;
1556 }
1557 }
1558 } while (!found);
1559
1560 if (data->phase == PHASE_END)
1561 puts("Phase=END\n");
1562 }
1563
part_delete(struct stm32prog_data * data,struct stm32prog_part_t * part)1564 static int part_delete(struct stm32prog_data *data,
1565 struct stm32prog_part_t *part)
1566 {
1567 int ret = 0;
1568 unsigned long blks, blks_offset, blks_size;
1569 struct blk_desc *block_dev = NULL;
1570 char cmdbuf[40];
1571 char devstr[10];
1572
1573 printf("Erasing %s ", part->name);
1574 switch (part->target) {
1575 case STM32PROG_MMC:
1576 if (!IS_ENABLED(CONFIG_MMC)) {
1577 ret = -1;
1578 stm32prog_err("%s (0x%x): erase invalid",
1579 part->name, part->id);
1580 break;
1581 }
1582 printf("on mmc %d: ", part->dev->dev_id);
1583 block_dev = mmc_get_blk_desc(part->dev->mmc);
1584 blks_offset = lldiv(part->addr, part->dev->mmc->read_bl_len);
1585 blks_size = lldiv(part->size, part->dev->mmc->read_bl_len);
1586 /* -1 or -2 : delete boot partition of MMC
1587 * need to switch to associated hwpart 1 or 2
1588 */
1589 if (part->part_id < 0)
1590 if (blk_select_hwpart_devnum(IF_TYPE_MMC,
1591 part->dev->dev_id,
1592 -part->part_id))
1593 return -1;
1594
1595 blks = blk_derase(block_dev, blks_offset, blks_size);
1596
1597 /* return to user partition */
1598 if (part->part_id < 0)
1599 blk_select_hwpart_devnum(IF_TYPE_MMC,
1600 part->dev->dev_id, 0);
1601 if (blks != blks_size) {
1602 ret = -1;
1603 stm32prog_err("%s (0x%x): MMC erase failed",
1604 part->name, part->id);
1605 }
1606 break;
1607 case STM32PROG_NOR:
1608 case STM32PROG_NAND:
1609 case STM32PROG_SPI_NAND:
1610 if (!IS_ENABLED(CONFIG_MTD)) {
1611 ret = -1;
1612 stm32prog_err("%s (0x%x): erase invalid",
1613 part->name, part->id);
1614 break;
1615 }
1616 get_mtd_by_target(devstr, part->target, part->dev->dev_id);
1617 printf("on %s: ", devstr);
1618 sprintf(cmdbuf, "mtd erase %s 0x%llx 0x%llx",
1619 devstr, part->addr, part->size);
1620 if (run_command(cmdbuf, 0)) {
1621 ret = -1;
1622 stm32prog_err("%s (0x%x): MTD erase commands failed (%s)",
1623 part->name, part->id, cmdbuf);
1624 }
1625 break;
1626 case STM32PROG_RAM:
1627 printf("on ram: ");
1628 memset((void *)(uintptr_t)part->addr, 0, (size_t)part->size);
1629 break;
1630 default:
1631 ret = -1;
1632 stm32prog_err("%s (0x%x): erase invalid", part->name, part->id);
1633 break;
1634 }
1635 if (!ret)
1636 printf("done\n");
1637
1638 return ret;
1639 }
1640
stm32prog_devices_init(struct stm32prog_data * data)1641 static void stm32prog_devices_init(struct stm32prog_data *data)
1642 {
1643 int i;
1644 int ret;
1645 struct stm32prog_part_t *part;
1646
1647 ret = treat_partition_list(data);
1648 if (ret)
1649 goto error;
1650
1651 /* initialize the selected device */
1652 for (i = 0; i < data->dev_nb; i++) {
1653 ret = init_device(data, &data->dev[i]);
1654 if (ret)
1655 goto error;
1656 }
1657
1658 /* delete RAW partition before create partition */
1659 for (i = 0; i < data->part_nb; i++) {
1660 part = &data->part_array[i];
1661
1662 if (part->part_type != RAW_IMAGE)
1663 continue;
1664
1665 if (!IS_SELECT(part) || !IS_DELETE(part))
1666 continue;
1667
1668 ret = part_delete(data, part);
1669 if (ret)
1670 goto error;
1671 }
1672
1673 if (IS_ENABLED(CONFIG_MMC)) {
1674 ret = create_gpt_partitions(data);
1675 if (ret)
1676 goto error;
1677 }
1678
1679 /* delete partition GPT or MTD */
1680 for (i = 0; i < data->part_nb; i++) {
1681 part = &data->part_array[i];
1682
1683 if (part->part_type == RAW_IMAGE)
1684 continue;
1685
1686 if (!IS_SELECT(part) || !IS_DELETE(part))
1687 continue;
1688
1689 ret = part_delete(data, part);
1690 if (ret)
1691 goto error;
1692 }
1693
1694 return;
1695
1696 error:
1697 data->part_nb = 0;
1698 }
1699
stm32prog_dfu_init(struct stm32prog_data * data)1700 int stm32prog_dfu_init(struct stm32prog_data *data)
1701 {
1702 /* init device if no error */
1703 if (data->part_nb)
1704 stm32prog_devices_init(data);
1705
1706 if (data->part_nb)
1707 stm32prog_next_phase(data);
1708
1709 /* prepare DFU for device read/write */
1710 dfu_free_entities();
1711 return dfu_init_entities(data);
1712 }
1713
stm32prog_init(struct stm32prog_data * data,ulong addr,ulong size)1714 int stm32prog_init(struct stm32prog_data *data, ulong addr, ulong size)
1715 {
1716 memset(data, 0x0, sizeof(*data));
1717 data->read_phase = PHASE_RESET;
1718 data->phase = PHASE_FLASHLAYOUT;
1719
1720 return parse_flash_layout(data, addr, size);
1721 }
1722
stm32prog_clean(struct stm32prog_data * data)1723 void stm32prog_clean(struct stm32prog_data *data)
1724 {
1725 /* clean */
1726 dfu_free_entities();
1727 free(data->part_array);
1728 free(data->otp_part);
1729 free(data->buffer);
1730 free(data->header_data);
1731 }
1732
1733 /* DFU callback: used after serial and direct DFU USB access */
dfu_flush_callback(struct dfu_entity * dfu)1734 void dfu_flush_callback(struct dfu_entity *dfu)
1735 {
1736 if (!stm32prog_data)
1737 return;
1738
1739 if (dfu->dev_type == DFU_DEV_VIRT) {
1740 if (dfu->data.virt.dev_num == PHASE_OTP)
1741 stm32prog_otp_start(stm32prog_data);
1742 else if (dfu->data.virt.dev_num == PHASE_PMIC)
1743 stm32prog_pmic_start(stm32prog_data);
1744 return;
1745 }
1746
1747 if (dfu->dev_type == DFU_DEV_RAM) {
1748 if (dfu->alt == 0 &&
1749 stm32prog_data->phase == PHASE_FLASHLAYOUT) {
1750 stm32prog_end_phase(stm32prog_data);
1751 /* waiting DFU DETACH for reenumeration */
1752 }
1753 }
1754
1755 if (!stm32prog_data->cur_part)
1756 return;
1757
1758 if (dfu->alt == stm32prog_data->cur_part->alt_id) {
1759 stm32prog_end_phase(stm32prog_data);
1760 stm32prog_next_phase(stm32prog_data);
1761 }
1762 }
1763
dfu_initiated_callback(struct dfu_entity * dfu)1764 void dfu_initiated_callback(struct dfu_entity *dfu)
1765 {
1766 if (!stm32prog_data)
1767 return;
1768
1769 if (!stm32prog_data->cur_part)
1770 return;
1771
1772 /* force the saved offset for the current partition */
1773 if (dfu->alt == stm32prog_data->cur_part->alt_id) {
1774 dfu->offset = stm32prog_data->offset;
1775 stm32prog_data->dfu_seq = 0;
1776 log_debug("dfu offset = 0x%llx\n", dfu->offset);
1777 }
1778 }
1779