1 /* SPDX-License-Identifier: GPL-2.0 */ 2 /* 3 * Copyright (C) 2020 Marvell International Ltd. 4 * 5 * Typedefs and defines for working with Octeon physical addresses. 6 */ 7 8 #ifndef __CVMX_ADDRESS_H__ 9 #define __CVMX_ADDRESS_H__ 10 11 typedef enum { 12 CVMX_MIPS_SPACE_XKSEG = 3LL, 13 CVMX_MIPS_SPACE_XKPHYS = 2LL, 14 CVMX_MIPS_SPACE_XSSEG = 1LL, 15 CVMX_MIPS_SPACE_XUSEG = 0LL 16 } cvmx_mips_space_t; 17 18 typedef enum { 19 CVMX_MIPS_XKSEG_SPACE_KSEG0 = 0LL, 20 CVMX_MIPS_XKSEG_SPACE_KSEG1 = 1LL, 21 CVMX_MIPS_XKSEG_SPACE_SSEG = 2LL, 22 CVMX_MIPS_XKSEG_SPACE_KSEG3 = 3LL 23 } cvmx_mips_xkseg_space_t; 24 25 /* decodes <14:13> of a kseg3 window address */ 26 typedef enum { 27 CVMX_ADD_WIN_SCR = 0L, 28 CVMX_ADD_WIN_DMA = 1L, 29 CVMX_ADD_WIN_UNUSED = 2L, 30 CVMX_ADD_WIN_UNUSED2 = 3L 31 } cvmx_add_win_dec_t; 32 33 /* decode within DMA space */ 34 typedef enum { 35 CVMX_ADD_WIN_DMA_ADD = 0L, 36 CVMX_ADD_WIN_DMA_SENDMEM = 1L, 37 /* store data must be normal DRAM memory space address in this case */ 38 CVMX_ADD_WIN_DMA_SENDDMA = 2L, 39 /* see CVMX_ADD_WIN_DMA_SEND_DEC for data contents */ 40 CVMX_ADD_WIN_DMA_SENDIO = 3L, 41 /* store data must be normal IO space address in this case */ 42 CVMX_ADD_WIN_DMA_SENDSINGLE = 4L, 43 /* no write buffer data needed/used */ 44 } cvmx_add_win_dma_dec_t; 45 46 /** 47 * Physical Address Decode 48 * 49 * Octeon-I HW never interprets this X (<39:36> reserved 50 * for future expansion), software should set to 0. 51 * 52 * - 0x0 XXX0 0000 0000 to DRAM Cached 53 * - 0x0 XXX0 0FFF FFFF 54 * 55 * - 0x0 XXX0 1000 0000 to Boot Bus Uncached (Converted to 0x1 00X0 1000 0000 56 * - 0x0 XXX0 1FFF FFFF + EJTAG to 0x1 00X0 1FFF FFFF) 57 * 58 * - 0x0 XXX0 2000 0000 to DRAM Cached 59 * - 0x0 XXXF FFFF FFFF 60 * 61 * - 0x1 00X0 0000 0000 to Boot Bus Uncached 62 * - 0x1 00XF FFFF FFFF 63 * 64 * - 0x1 01X0 0000 0000 to Other NCB Uncached 65 * - 0x1 FFXF FFFF FFFF devices 66 * 67 * Decode of all Octeon addresses 68 */ 69 typedef union { 70 u64 u64; 71 struct { 72 cvmx_mips_space_t R : 2; 73 u64 offset : 62; 74 } sva; 75 76 struct { 77 u64 zeroes : 33; 78 u64 offset : 31; 79 } suseg; 80 81 struct { 82 u64 ones : 33; 83 cvmx_mips_xkseg_space_t sp : 2; 84 u64 offset : 29; 85 } sxkseg; 86 87 struct { 88 cvmx_mips_space_t R : 2; 89 u64 cca : 3; 90 u64 mbz : 10; 91 u64 pa : 49; 92 } sxkphys; 93 94 struct { 95 u64 mbz : 15; 96 u64 is_io : 1; 97 u64 did : 8; 98 u64 unaddr : 4; 99 u64 offset : 36; 100 } sphys; 101 102 struct { 103 u64 zeroes : 24; 104 u64 unaddr : 4; 105 u64 offset : 36; 106 } smem; 107 108 struct { 109 u64 mem_region : 2; 110 u64 mbz : 13; 111 u64 is_io : 1; 112 u64 did : 8; 113 u64 unaddr : 4; 114 u64 offset : 36; 115 } sio; 116 117 struct { 118 u64 ones : 49; 119 cvmx_add_win_dec_t csrdec : 2; 120 u64 addr : 13; 121 } sscr; 122 123 /* there should only be stores to IOBDMA space, no loads */ 124 struct { 125 u64 ones : 49; 126 cvmx_add_win_dec_t csrdec : 2; 127 u64 unused2 : 3; 128 cvmx_add_win_dma_dec_t type : 3; 129 u64 addr : 7; 130 } sdma; 131 132 struct { 133 u64 didspace : 24; 134 u64 unused : 40; 135 } sfilldidspace; 136 } cvmx_addr_t; 137 138 /* These macros for used by 32 bit applications */ 139 140 #define CVMX_MIPS32_SPACE_KSEG0 1l 141 #define CVMX_ADD_SEG32(segment, add) (((s32)segment << 31) | (s32)(add)) 142 143 /* 144 * Currently all IOs are performed using XKPHYS addressing. Linux uses the 145 * CvmMemCtl register to enable XKPHYS addressing to IO space from user mode. 146 * Future OSes may need to change the upper bits of IO addresses. The 147 * following define controls the upper two bits for all IO addresses generated 148 * by the simple executive library 149 */ 150 #define CVMX_IO_SEG CVMX_MIPS_SPACE_XKPHYS 151 152 /* These macros simplify the process of creating common IO addresses */ 153 #define CVMX_ADD_SEG(segment, add) ((((u64)segment) << 62) | (add)) 154 155 #define CVMX_ADD_IO_SEG(add) (add) 156 157 #define CVMX_ADDR_DIDSPACE(did) (((CVMX_IO_SEG) << 22) | ((1ULL) << 8) | (did)) 158 #define CVMX_ADDR_DID(did) (CVMX_ADDR_DIDSPACE(did) << 40) 159 #define CVMX_FULL_DID(did, subdid) (((did) << 3) | (subdid)) 160 161 /* from include/ncb_rsl_id.v */ 162 #define CVMX_OCT_DID_MIS 0ULL /* misc stuff */ 163 #define CVMX_OCT_DID_GMX0 1ULL 164 #define CVMX_OCT_DID_GMX1 2ULL 165 #define CVMX_OCT_DID_PCI 3ULL 166 #define CVMX_OCT_DID_KEY 4ULL 167 #define CVMX_OCT_DID_FPA 5ULL 168 #define CVMX_OCT_DID_DFA 6ULL 169 #define CVMX_OCT_DID_ZIP 7ULL 170 #define CVMX_OCT_DID_RNG 8ULL 171 #define CVMX_OCT_DID_IPD 9ULL 172 #define CVMX_OCT_DID_PKT 10ULL 173 #define CVMX_OCT_DID_TIM 11ULL 174 #define CVMX_OCT_DID_TAG 12ULL 175 /* the rest are not on the IO bus */ 176 #define CVMX_OCT_DID_L2C 16ULL 177 #define CVMX_OCT_DID_LMC 17ULL 178 #define CVMX_OCT_DID_SPX0 18ULL 179 #define CVMX_OCT_DID_SPX1 19ULL 180 #define CVMX_OCT_DID_PIP 20ULL 181 #define CVMX_OCT_DID_ASX0 22ULL 182 #define CVMX_OCT_DID_ASX1 23ULL 183 #define CVMX_OCT_DID_IOB 30ULL 184 185 #define CVMX_OCT_DID_PKT_SEND CVMX_FULL_DID(CVMX_OCT_DID_PKT, 2ULL) 186 #define CVMX_OCT_DID_TAG_SWTAG CVMX_FULL_DID(CVMX_OCT_DID_TAG, 0ULL) 187 #define CVMX_OCT_DID_TAG_TAG1 CVMX_FULL_DID(CVMX_OCT_DID_TAG, 1ULL) 188 #define CVMX_OCT_DID_TAG_TAG2 CVMX_FULL_DID(CVMX_OCT_DID_TAG, 2ULL) 189 #define CVMX_OCT_DID_TAG_TAG3 CVMX_FULL_DID(CVMX_OCT_DID_TAG, 3ULL) 190 #define CVMX_OCT_DID_TAG_NULL_RD CVMX_FULL_DID(CVMX_OCT_DID_TAG, 4ULL) 191 #define CVMX_OCT_DID_TAG_TAG5 CVMX_FULL_DID(CVMX_OCT_DID_TAG, 5ULL) 192 #define CVMX_OCT_DID_TAG_CSR CVMX_FULL_DID(CVMX_OCT_DID_TAG, 7ULL) 193 #define CVMX_OCT_DID_FAU_FAI CVMX_FULL_DID(CVMX_OCT_DID_IOB, 0ULL) 194 #define CVMX_OCT_DID_TIM_CSR CVMX_FULL_DID(CVMX_OCT_DID_TIM, 0ULL) 195 #define CVMX_OCT_DID_KEY_RW CVMX_FULL_DID(CVMX_OCT_DID_KEY, 0ULL) 196 #define CVMX_OCT_DID_PCI_6 CVMX_FULL_DID(CVMX_OCT_DID_PCI, 6ULL) 197 #define CVMX_OCT_DID_MIS_BOO CVMX_FULL_DID(CVMX_OCT_DID_MIS, 0ULL) 198 #define CVMX_OCT_DID_PCI_RML CVMX_FULL_DID(CVMX_OCT_DID_PCI, 0ULL) 199 #define CVMX_OCT_DID_IPD_CSR CVMX_FULL_DID(CVMX_OCT_DID_IPD, 7ULL) 200 #define CVMX_OCT_DID_DFA_CSR CVMX_FULL_DID(CVMX_OCT_DID_DFA, 7ULL) 201 #define CVMX_OCT_DID_MIS_CSR CVMX_FULL_DID(CVMX_OCT_DID_MIS, 7ULL) 202 #define CVMX_OCT_DID_ZIP_CSR CVMX_FULL_DID(CVMX_OCT_DID_ZIP, 0ULL) 203 204 /* Cast to unsigned long long, mainly for use in printfs. */ 205 #define CAST_ULL(v) ((unsigned long long)(v)) 206 207 #define UNMAPPED_PTR(x) ((1ULL << 63) | (x)) 208 209 #endif /* __CVMX_ADDRESS_H__ */ 210