1 /* SPDX-License-Identifier: GPL-2.0 */
2 /*
3 * Copyright (C) 2020 Marvell International Ltd.
4 *
5 * Helper functions for common, but complicated tasks.
6 */
7
8 #ifndef __CVMX_HELPER_H__
9 #define __CVMX_HELPER_H__
10
11 #include "cvmx-wqe.h"
12
13 /* Max number of GMXX */
14 #define CVMX_HELPER_MAX_GMX \
15 (OCTEON_IS_MODEL(OCTEON_CN78XX) ? \
16 6 : \
17 (OCTEON_IS_MODEL(OCTEON_CN68XX) ? \
18 5 : \
19 (OCTEON_IS_MODEL(OCTEON_CN73XX) ? \
20 3 : \
21 (OCTEON_IS_MODEL(OCTEON_CNF75XX) ? 1 : 2))))
22
23 #define CVMX_HELPER_CSR_INIT0 \
24 0 /* Do not change as
25 CVMX_HELPER_WRITE_CSR()
26 assumes it */
27 #define CVMX_HELPER_CSR_INIT_READ -1
28
29 /*
30 * CVMX_HELPER_WRITE_CSR--set a field in a CSR with a value.
31 *
32 * @param chcsr_init initial value of the csr (CVMX_HELPER_CSR_INIT_READ
33 * means to use the existing csr value as the
34 * initial value.)
35 * @param chcsr_csr the name of the csr
36 * @param chcsr_type the type of the csr (see the -defs.h)
37 * @param chcsr_chip the chip for the csr/field
38 * @param chcsr_fld the field in the csr
39 * @param chcsr_val the value for field
40 */
41 #define CVMX_HELPER_WRITE_CSR(chcsr_init, chcsr_csr, chcsr_type, chcsr_chip, chcsr_fld, chcsr_val) \
42 do { \
43 chcsr_type csr; \
44 if ((chcsr_init) == CVMX_HELPER_CSR_INIT_READ) \
45 csr.u64 = cvmx_read_csr(chcsr_csr); \
46 else \
47 csr.u64 = (chcsr_init); \
48 csr.chcsr_chip.chcsr_fld = (chcsr_val); \
49 cvmx_write_csr((chcsr_csr), csr.u64); \
50 } while (0)
51
52 /*
53 * CVMX_HELPER_WRITE_CSR0--set a field in a CSR with the initial value of 0
54 */
55 #define CVMX_HELPER_WRITE_CSR0(chcsr_csr, chcsr_type, chcsr_chip, chcsr_fld, chcsr_val) \
56 CVMX_HELPER_WRITE_CSR(CVMX_HELPER_CSR_INIT0, chcsr_csr, chcsr_type, chcsr_chip, chcsr_fld, \
57 chcsr_val)
58
59 /*
60 * CVMX_HELPER_WRITE_CSR1--set a field in a CSR with the initial value of
61 * the CSR's current value.
62 */
63 #define CVMX_HELPER_WRITE_CSR1(chcsr_csr, chcsr_type, chcsr_chip, chcsr_fld, chcsr_val) \
64 CVMX_HELPER_WRITE_CSR(CVMX_HELPER_CSR_INIT_READ, chcsr_csr, chcsr_type, chcsr_chip, \
65 chcsr_fld, chcsr_val)
66
67 /* These flags are passed to __cvmx_helper_packet_hardware_enable */
68
69 typedef enum {
70 CVMX_HELPER_INTERFACE_MODE_DISABLED,
71 CVMX_HELPER_INTERFACE_MODE_RGMII,
72 CVMX_HELPER_INTERFACE_MODE_GMII,
73 CVMX_HELPER_INTERFACE_MODE_SPI,
74 CVMX_HELPER_INTERFACE_MODE_PCIE,
75 CVMX_HELPER_INTERFACE_MODE_XAUI,
76 CVMX_HELPER_INTERFACE_MODE_SGMII,
77 CVMX_HELPER_INTERFACE_MODE_PICMG,
78 CVMX_HELPER_INTERFACE_MODE_NPI,
79 CVMX_HELPER_INTERFACE_MODE_LOOP,
80 CVMX_HELPER_INTERFACE_MODE_SRIO,
81 CVMX_HELPER_INTERFACE_MODE_ILK,
82 CVMX_HELPER_INTERFACE_MODE_RXAUI,
83 CVMX_HELPER_INTERFACE_MODE_QSGMII,
84 CVMX_HELPER_INTERFACE_MODE_AGL,
85 CVMX_HELPER_INTERFACE_MODE_XLAUI,
86 CVMX_HELPER_INTERFACE_MODE_XFI,
87 CVMX_HELPER_INTERFACE_MODE_10G_KR,
88 CVMX_HELPER_INTERFACE_MODE_40G_KR4,
89 CVMX_HELPER_INTERFACE_MODE_MIXED,
90 } cvmx_helper_interface_mode_t;
91
92 typedef union cvmx_helper_link_info {
93 u64 u64;
94 struct {
95 u64 reserved_20_63 : 43;
96 u64 init_success : 1;
97 u64 link_up : 1;
98 u64 full_duplex : 1;
99 u64 speed : 18;
100 } s;
101 } cvmx_helper_link_info_t;
102
103 /**
104 * Sets the back pressure configuration in internal data structure.
105 * @param backpressure_dis disable/enable backpressure
106 */
107 void cvmx_rgmii_set_back_pressure(u64 backpressure_dis);
108
109 #include "cvmx-helper-fpa.h"
110
111 #include "cvmx-helper-agl.h"
112 #include "cvmx-helper-errata.h"
113 #include "cvmx-helper-ilk.h"
114 #include "cvmx-helper-loop.h"
115 #include "cvmx-helper-npi.h"
116 #include "cvmx-helper-rgmii.h"
117 #include "cvmx-helper-sgmii.h"
118 #include "cvmx-helper-spi.h"
119 #include "cvmx-helper-srio.h"
120 #include "cvmx-helper-util.h"
121 #include "cvmx-helper-xaui.h"
122
123 #include "cvmx-fpa3.h"
124
125 enum cvmx_pko_padding {
126 CVMX_PKO_PADDING_NONE = 0,
127 CVMX_PKO_PADDING_60 = 1,
128 };
129
130 /**
131 * This function enables the IPD and also enables the packet interfaces.
132 * The packet interfaces (RGMII and SPI) must be enabled after the
133 * IPD. This should be called by the user program after any additional
134 * IPD configuration changes are made if CVMX_HELPER_ENABLE_IPD
135 * is not set in the executive-config.h file.
136 *
137 * @return 0 on success
138 * -1 on failure
139 */
140 int cvmx_helper_ipd_and_packet_input_enable_node(int node);
141 int cvmx_helper_ipd_and_packet_input_enable(void);
142
143 /**
144 * Initialize and allocate memory for the SSO.
145 *
146 * @param wqe_entries The maximum number of work queue entries to be
147 * supported.
148 *
149 * @return Zero on success, non-zero on failure.
150 */
151 int cvmx_helper_initialize_sso(int wqe_entries);
152
153 /**
154 * Initialize and allocate memory for the SSO on a specific node.
155 *
156 * @param node Node SSO to initialize
157 * @param wqe_entries The maximum number of work queue entries to be
158 * supported.
159 *
160 * @return Zero on success, non-zero on failure.
161 */
162 int cvmx_helper_initialize_sso_node(unsigned int node, int wqe_entries);
163
164 /**
165 * Undo the effect of cvmx_helper_initialize_sso().
166 *
167 * @return Zero on success, non-zero on failure.
168 */
169 int cvmx_helper_uninitialize_sso(void);
170
171 /**
172 * Undo the effect of cvmx_helper_initialize_sso_node().
173 *
174 * @param node Node SSO to initialize
175 *
176 * @return Zero on success, non-zero on failure.
177 */
178 int cvmx_helper_uninitialize_sso_node(unsigned int node);
179
180 /**
181 * Initialize the PIP, IPD, and PKO hardware to support
182 * simple priority based queues for the ethernet ports. Each
183 * port is configured with a number of priority queues based
184 * on CVMX_PKO_QUEUES_PER_PORT_* where each queue is lower
185 * priority than the previous.
186 *
187 * @return Zero on success, non-zero on failure
188 */
189 int cvmx_helper_initialize_packet_io_global(void);
190 /**
191 * Initialize the PIP, IPD, and PKO hardware to support
192 * simple priority based queues for the ethernet ports. Each
193 * port is configured with a number of priority queues based
194 * on CVMX_PKO_QUEUES_PER_PORT_* where each queue is lower
195 * priority than the previous.
196 *
197 * @param node Node on which to initialize packet io hardware
198 *
199 * @return Zero on success, non-zero on failure
200 */
201 int cvmx_helper_initialize_packet_io_node(unsigned int node);
202
203 /**
204 * Does core local initialization for packet io
205 *
206 * @return Zero on success, non-zero on failure
207 */
208 int cvmx_helper_initialize_packet_io_local(void);
209
210 /**
211 * Undo the initialization performed in
212 * cvmx_helper_initialize_packet_io_global(). After calling this routine and the
213 * local version on each core, packet IO for Octeon will be disabled and placed
214 * in the initial reset state. It will then be safe to call the initialize
215 * later on. Note that this routine does not empty the FPA pools. It frees all
216 * buffers used by the packet IO hardware to the FPA so a function emptying the
217 * FPA after shutdown should find all packet buffers in the FPA.
218 *
219 * @return Zero on success, negative on failure.
220 */
221 int cvmx_helper_shutdown_packet_io_global(void);
222
223 /**
224 * Helper function for 78xx global packet IO shutdown
225 */
226 int cvmx_helper_shutdown_packet_io_global_cn78xx(int node);
227
228 /**
229 * Does core local shutdown of packet io
230 *
231 * @return Zero on success, non-zero on failure
232 */
233 int cvmx_helper_shutdown_packet_io_local(void);
234
235 /**
236 * Returns the number of ports on the given interface.
237 * The interface must be initialized before the port count
238 * can be returned.
239 *
240 * @param interface Which interface to return port count for.
241 *
242 * @return Port count for interface
243 * -1 for uninitialized interface
244 */
245 int cvmx_helper_ports_on_interface(int interface);
246
247 /**
248 * Return the number of interfaces the chip has. Each interface
249 * may have multiple ports. Most chips support two interfaces,
250 * but the CNX0XX and CNX1XX are exceptions. These only support
251 * one interface.
252 *
253 * @return Number of interfaces on chip
254 */
255 int cvmx_helper_get_number_of_interfaces(void);
256
257 /**
258 * Get the operating mode of an interface. Depending on the Octeon
259 * chip and configuration, this function returns an enumeration
260 * of the type of packet I/O supported by an interface.
261 *
262 * @param xiface Interface to probe
263 *
264 * @return Mode of the interface. Unknown or unsupported interfaces return
265 * DISABLED.
266 */
267 cvmx_helper_interface_mode_t cvmx_helper_interface_get_mode(int xiface);
268
269 /**
270 * Auto configure an IPD/PKO port link state and speed. This
271 * function basically does the equivalent of:
272 * cvmx_helper_link_set(ipd_port, cvmx_helper_link_get(ipd_port));
273 *
274 * @param ipd_port IPD/PKO port to auto configure
275 *
276 * @return Link state after configure
277 */
278 cvmx_helper_link_info_t cvmx_helper_link_autoconf(int ipd_port);
279
280 /**
281 * Return the link state of an IPD/PKO port as returned by
282 * auto negotiation. The result of this function may not match
283 * Octeon's link config if auto negotiation has changed since
284 * the last call to cvmx_helper_link_set().
285 *
286 * @param ipd_port IPD/PKO port to query
287 *
288 * @return Link state
289 */
290 cvmx_helper_link_info_t cvmx_helper_link_get(int ipd_port);
291
292 /**
293 * Configure an IPD/PKO port for the specified link state. This
294 * function does not influence auto negotiation at the PHY level.
295 * The passed link state must always match the link state returned
296 * by cvmx_helper_link_get(). It is normally best to use
297 * cvmx_helper_link_autoconf() instead.
298 *
299 * @param ipd_port IPD/PKO port to configure
300 * @param link_info The new link state
301 *
302 * @return Zero on success, negative on failure
303 */
304 int cvmx_helper_link_set(int ipd_port, cvmx_helper_link_info_t link_info);
305
306 /**
307 * This function probes an interface to determine the actual number of
308 * hardware ports connected to it. It does some setup the ports but
309 * doesn't enable them. The main goal here is to set the global
310 * interface_port_count[interface] correctly. Final hardware setup of
311 * the ports will be performed later.
312 *
313 * @param xiface Interface to probe
314 *
315 * @return Zero on success, negative on failure
316 */
317 int cvmx_helper_interface_probe(int xiface);
318
319 /**
320 * Determine the actual number of hardware ports connected to an
321 * interface. It doesn't setup the ports or enable them.
322 *
323 * @param xiface Interface to enumerate
324 *
325 * @return Zero on success, negative on failure
326 */
327 int cvmx_helper_interface_enumerate(int xiface);
328
329 /**
330 * Configure a port for internal and/or external loopback. Internal loopback
331 * causes packets sent by the port to be received by Octeon. External loopback
332 * causes packets received from the wire to sent out again.
333 *
334 * @param ipd_port IPD/PKO port to loopback.
335 * @param enable_internal
336 * Non zero if you want internal loopback
337 * @param enable_external
338 * Non zero if you want external loopback
339 *
340 * @return Zero on success, negative on failure.
341 */
342 int cvmx_helper_configure_loopback(int ipd_port, int enable_internal, int enable_external);
343
344 /**
345 * Returns the number of ports on the given interface.
346 *
347 * @param interface Which interface to return port count for.
348 *
349 * @return Port count for interface
350 * -1 for uninitialized interface
351 */
352 int __cvmx_helper_early_ports_on_interface(int interface);
353
354 void cvmx_helper_setup_simulator_io_buffer_counts(int node, int num_packet_buffers,
355 int pko_buffers);
356
357 void cvmx_helper_set_wqe_no_ptr_mode(bool mode);
358 void cvmx_helper_set_pkt_wqe_le_mode(bool mode);
359 int cvmx_helper_shutdown_fpa_pools(int node);
360
361 /**
362 * Convert Ethernet QoS/PCP value to system-level priority
363 *
364 * In OCTEON, highest priority is 0, in Ethernet 802.1p PCP field
365 * the highest priority is 7, lowest is 1. Here is the full conversion
366 * table between QoS (PCP) and OCTEON priority values, per IEEE 802.1Q-2005:
367 *
368 * PCP Priority Acronym Traffic Types
369 * 1 7 (lowest) BK Background
370 * 0 6 BE Best Effort
371 * 2 5 EE Excellent Effort
372 * 3 4 CA Critical Applications
373 * 4 3 VI Video, < 100 ms latency and jitter
374 * 5 2 VO Voice, < 10 ms latency and jitter
375 * 6 1 IC Internetwork Control
376 * 7 0 (highest) NC Network Control
377 */
cvmx_helper_qos2prio(u8 qos)378 static inline u8 cvmx_helper_qos2prio(u8 qos)
379 {
380 static const unsigned int pcp_map = 6 << (4 * 0) | 7 << (4 * 1) | 5 << (4 * 2) |
381 4 << (4 * 3) | 3 << (4 * 4) | 2 << (4 * 5) |
382 1 << (4 * 6) | 0 << (4 * 7);
383
384 return (pcp_map >> ((qos & 0x7) << 2)) & 0x7;
385 }
386
387 /**
388 * Convert system-level priority to Ethernet QoS/PCP value
389 *
390 * Calculate the reverse of cvmx_helper_qos2prio() per IEEE 802.1Q-2005.
391 */
cvmx_helper_prio2qos(u8 prio)392 static inline u8 cvmx_helper_prio2qos(u8 prio)
393 {
394 static const unsigned int prio_map = 7 << (4 * 0) | 6 << (4 * 1) | 5 << (4 * 2) |
395 4 << (4 * 3) | 3 << (4 * 4) | 2 << (4 * 5) |
396 0 << (4 * 6) | 1 << (4 * 7);
397
398 return (prio_map >> ((prio & 0x7) << 2)) & 0x7;
399 }
400
401 /**
402 * @INTERNAL
403 * Get the number of ipd_ports on an interface.
404 *
405 * @param xiface
406 *
407 * @return the number of ipd_ports on the interface and -1 for error.
408 */
409 int __cvmx_helper_get_num_ipd_ports(int xiface);
410
411 enum cvmx_pko_padding __cvmx_helper_get_pko_padding(int xiface);
412
413 /**
414 * @INTERNAL
415 *
416 * @param xiface
417 * @param num_ipd_ports is the number of ipd_ports on the interface
418 * @param has_fcs indicates if PKO does FCS for the ports on this
419 * @param pad The padding that PKO should apply.
420 * interface.
421 *
422 * @return 0 for success and -1 for failure
423 */
424 int __cvmx_helper_init_interface(int xiface, int num_ipd_ports, int has_fcs,
425 enum cvmx_pko_padding pad);
426
427 void __cvmx_helper_shutdown_interfaces(void);
428
429 /*
430 * @INTERNAL
431 * Enable packet input/output from the hardware. This function is
432 * called after all internal setup is complete and IPD is enabled.
433 * After this function completes, packets will be accepted from the
434 * hardware ports. PKO should still be disabled to make sure packets
435 * aren't sent out partially setup hardware.
436 *
437 * @return Zero on success, negative on failure
438 */
439 int __cvmx_helper_packet_hardware_enable(int xiface);
440
441 /*
442 * @INTERNAL
443 *
444 * @return 0 for success and -1 for failure
445 */
446 int __cvmx_helper_set_link_info(int xiface, int index, cvmx_helper_link_info_t link_info);
447
448 /**
449 * @INTERNAL
450 *
451 * @param xiface
452 * @param port
453 *
454 * @return valid link_info on success or -1 on failure
455 */
456 cvmx_helper_link_info_t __cvmx_helper_get_link_info(int xiface, int port);
457
458 /**
459 * @INTERNAL
460 *
461 * @param xiface
462 *
463 * @return 0 if PKO does not do FCS and 1 otherwise.
464 */
465 int __cvmx_helper_get_has_fcs(int xiface);
466
467 void *cvmx_helper_mem_alloc(int node, u64 alloc_size, u64 align);
468 void cvmx_helper_mem_free(void *buffer, u64 size);
469
470 #define CVMX_QOS_NUM 8 /* Number of QoS priority classes */
471
472 typedef enum {
473 CVMX_QOS_PROTO_NONE, /* Disable QOS */
474 CVMX_QOS_PROTO_PAUSE, /* IEEE 802.3 PAUSE */
475 CVMX_QOS_PROTO_PFC /* IEEE 802.1Qbb-2011 PFC/CBFC */
476 } cvmx_qos_proto_t;
477
478 typedef enum {
479 CVMX_QOS_PKT_MODE_HWONLY, /* PAUSE packets processed in Hardware only. */
480 CVMX_QOS_PKT_MODE_SWONLY, /* PAUSE packets processed in Software only. */
481 CVMX_QOS_PKT_MODE_HWSW, /* PAUSE packets processed in both HW and SW. */
482 CVMX_QOS_PKT_MODE_DROP /* Ignore PAUSE packets. */
483 } cvmx_qos_pkt_mode_t;
484
485 typedef enum {
486 CVMX_QOS_POOL_PER_PORT, /* Pool per Physical Port */
487 CVMX_QOS_POOL_PER_CLASS /* Pool per Priority Class */
488 } cvmx_qos_pool_mode_t;
489
490 typedef struct cvmx_qos_config {
491 cvmx_qos_proto_t qos_proto; /* QoS protocol.*/
492 cvmx_qos_pkt_mode_t pkt_mode; /* PAUSE processing mode.*/
493 cvmx_qos_pool_mode_t pool_mode; /* FPA Pool mode.*/
494 int pktbuf_size; /* Packet buffer size */
495 int aura_size; /* Number of buffers */
496 int drop_thresh[CVMX_QOS_NUM]; /* DROP threashold in % */
497 int red_thresh[CVMX_QOS_NUM]; /* RED threashold in % */
498 int bp_thresh[CVMX_QOS_NUM]; /* BP threashold in % */
499 int groups[CVMX_QOS_NUM]; /* Base SSO group for QOS group set. */
500 int group_prio[CVMX_QOS_NUM]; /* SSO group priorities.*/
501 int pko_pfc_en; /* Enable PKO PFC layout. */
502 int vlan_num; /* VLAN number: 0 = 1st or 1 = 2nd. */
503 int p_time; /* PAUSE packets send time (in number of 512 bit-times).*/
504 int p_interval; /* PAUSE packet send interval (in number of 512 bit-times).*/
505 /* Internal parameters (should not be used by application developer): */
506 cvmx_fpa3_pool_t gpools[CVMX_QOS_NUM]; /* Pool to use.*/
507 cvmx_fpa3_gaura_t gauras[CVMX_QOS_NUM]; /* Global auras -- one per priority class. */
508 int bpids[CVMX_QOS_NUM]; /* PKI BPID.*/
509 int qpg_base; /* QPG Table base index.*/
510 } cvmx_qos_config_t;
511
512 /**
513 * Initialize QoS configuraiton with the SDK defaults.
514 *
515 * @param qos_cfg User QOS configuration parameters.
516 * @return Zero on success, negative number otherwise.
517 */
518 int cvmx_helper_qos_config_init(cvmx_qos_proto_t qos_proto, cvmx_qos_config_t *qos_cfg);
519
520 /**
521 * Update the user static processor configuration.
522 * It should be done before any initialization of the DP units is performed.
523 *
524 * @param xipdport Global IPD port
525 * @param qos_cfg User QOS configuration parameters.
526 * @return Zero on success, negative number otherwise.
527 */
528 int cvmx_helper_qos_port_config_update(int xipdport, cvmx_qos_config_t *qos_cfg);
529
530 /**
531 * Configure the Data Path components for QOS function.
532 * This function is called after the global processor initialization is
533 * performed.
534 *
535 * @param xipdport Global IPD port
536 * @param qos_cfg User QOS configuration parameters.
537 * @return Zero on success, negative number otherwise.
538 */
539 int cvmx_helper_qos_port_setup(int xipdport, cvmx_qos_config_t *qos_cfg);
540
541 /**
542 * Configure the SSO for QOS function.
543 * This function is called after the global processor initialization is
544 * performed.
545 *
546 * @param node OCTEON3 node number.
547 * @param qos_cfg User QOS configuration parameters.
548 * @return Zero on success, negative number otherwise.
549 */
550 int cvmx_helper_qos_sso_setup(int node, cvmx_qos_config_t *qos_cfg);
551
552 /**
553 * Return PKI_CHAN_E channel name based on the provided index.
554 * @param chan Channel index.
555 * @param namebuf Name buffer (output).
556 * @param buflen Name maximum length.
557 * @return Length of name (in bytes) on success, negative number otherwise.
558 */
559 int cvmx_helper_get_chan_e_name(int chan, char *namebuf, int buflen);
560
561 #ifdef CVMX_DUMP_DIAGNOSTICS
562 void cvmx_helper_dump_for_diagnostics(int node);
563 #endif
564
565 #endif /* __CVMX_HELPER_H__ */
566