1 /* SPDX-License-Identifier: GPL-2.0 */ 2 /* 3 * Copyright (C) 2017 Intel Corporation. 4 * Take from coreboot project file of the same name 5 */ 6 7 #ifndef _ASM_ARCH_LPC_H 8 #define _ASM_ARCH_LPC_H 9 10 #include <linux/bitops.h> 11 #define LPC_SERIRQ_CTL 0x64 12 #define LPC_SCNT_EN BIT(7) 13 #define LPC_SCNT_MODE BIT(6) 14 #define LPC_IO_DECODE 0x80 15 #define LPC_IOD_COMA_RANGE (0 << 0) /* 0x3F8 - 0x3FF COMA*/ 16 #define LPC_IOD_COMB_RANGE (1 << 4) /* 0x2F8 - 0x2FF COMB*/ 17 /* 18 * Use IO_<peripheral>_<IO port> style macros defined in lpc_lib.h 19 * to enable decoding of I/O locations for a peripheral 20 */ 21 #define LPC_IO_ENABLES 0x82 22 #define LPC_GENERIC_IO_RANGE(n) ((((n) & 0x3) * 4) + 0x84) 23 #define LPC_LGIR_AMASK_MASK (0xfc << 16) 24 #define LPC_LGIR_ADDR_MASK 0xfffc 25 #define LPC_LGIR_EN BIT(0) 26 #define LPC_LGIR_MAX_WINDOW_SIZE 256 27 #define LPC_GENERIC_MEM_RANGE 0x98 28 #define LPC_LGMR_ADDR_MASK 0xffff0000 29 #define LPC_LGMR_EN BIT(0) 30 #define LPC_LGMR_WINDOW_SIZE (64 * KiB) 31 #define LPC_BIOS_CNTL 0xdc 32 #define LPC_BC_BILD BIT(7) 33 #define LPC_BC_LE BIT(1) 34 #define LPC_BC_EISS BIT(5) 35 #define LPC_PCCTL 0xE0 /* PCI Clock Control */ 36 #define LPC_PCCTL_CLKRUN_EN BIT(0) 37 38 /* 39 * IO decode enable macros are in the format IO_<peripheral>_<IO port>. 40 * For example, to open ports 0x60, 0x64 for the keyboard controller, 41 * use IOE_KBC_60_64 macro. For IOE_ macros that do not specify a port range, 42 * the port range is selectable via the IO decodes register. 43 */ 44 #define LPC_IOE_EC_4E_4F BIT(13) 45 #define LPC_IOE_SUPERIO_2E_2F BIT(12) 46 #define LPC_IOE_EC_62_66 BIT(11) 47 #define LPC_IOE_KBC_60_64 BIT(10) 48 #define LPC_IOE_HGE_208 BIT(9) 49 #define LPC_IOE_LGE_200 BIT(8) 50 #define LPC_IOE_FDD_EN BIT(3) 51 #define LPC_IOE_LPT_EN BIT(2) 52 #define LPC_IOE_COMB_EN BIT(1) 53 #define LPC_IOE_COMA_EN BIT(0) 54 #define LPC_NUM_GENERIC_IO_RANGES 4 55 56 #define LPC_IO_ENABLES 0x82 57 58 /** 59 * lpc_enable_fixed_io_ranges() - enable the fixed I/O ranges 60 * 61 * @io_enables: Mask of things to enable (LPC_IOE_.) 62 */ 63 void lpc_enable_fixed_io_ranges(uint io_enables); 64 65 /** 66 * lpc_open_pmio_window() - Open an IO port range 67 * 68 * @base: Base I/O address (e.g. 0x800) 69 * @size: Size of window (e.g. 0x100) 70 * @return 0 if OK, -ENOSPC if there are no more windows available, -EALREADY 71 * if already set up 72 */ 73 int lpc_open_pmio_window(uint base, uint size); 74 75 /** 76 * lpc_io_setup_comm_a_b() - Set up basic serial UARTs 77 * 78 * Set up the LPC to handle I/O to the COMA/COMB serial UART addresses 79 * 2f8-2ff and 3f8-3ff. 80 */ 81 void lpc_io_setup_comm_a_b(void); 82 83 #endif 84