1 // SPDX-License-Identifier: GPL-2.0+
2 /*
3 * Copyright 2021 Google LLC
4 * Written by Simon Glass <sjg@chromium.org>
5 */
6
7 #include <common.h>
8 #include <asm/cb_sysinfo.h>
9 #include <command.h>
10 #include <console.h>
11 #include <asm/global_data.h>
12
13 DECLARE_GLOBAL_DATA_PTR;
14
cbprompt(const char * name)15 static void cbprompt(const char *name)
16 {
17 for (; *name == '>'; name++)
18 puts(" ");
19 printf("%-12s: ", name);
20 }
21
print_dec(const char * name,int value)22 static void print_dec(const char *name, int value)
23 {
24 cbprompt(name);
25 printf(value > 9 ? "0d%d\n" : "%d\n", value);
26 }
27
print_hex(const char * name,int value)28 static void print_hex(const char *name, int value)
29 {
30 cbprompt(name);
31 printf("%x\n", value);
32 }
33
print_addr(const char * name,ulong value)34 static void print_addr(const char *name, ulong value)
35 {
36 cbprompt(name);
37 printf("%08lx\n", value);
38 }
39
print_addr64(const char * name,u64 value)40 static void print_addr64(const char *name, u64 value)
41 {
42 cbprompt(name);
43 printf("%16llx\n", value);
44 }
45
print_ptr(const char * name,const void * value)46 static void print_ptr(const char *name, const void *value)
47 {
48 cbprompt(name);
49 printf("%p\n", value);
50 }
51
print_str(const char * name,const char * value)52 static void print_str(const char *name, const char *value)
53 {
54 if (value) {
55 cbprompt(name);
56 printf("%s\n", value);
57 }
58 }
59
print_idx(const char * name,uint idx,const u8 * strings)60 static void print_idx(const char *name, uint idx, const u8 *strings)
61 {
62 const char *ptr;
63
64 cbprompt(name);
65 ptr = (char *)strings + idx;
66 printf("%d: %s\n", idx, ptr ? ptr : "(unknown)");
67 }
68
69 static const char *const cb_mem_name[] = {
70 NULL,
71 "ram",
72 "reserved",
73 "acpi",
74 "nvs",
75 "unusable",
76 "vendor",
77 };
78
get_mem_name(int tag)79 static const char *get_mem_name(int tag)
80 {
81 if (tag >= CB_MEM_RAM && tag <= CB_MEM_VENDOR_RSVD)
82 return cb_mem_name[tag];
83
84 if (tag == CB_MEM_TABLE)
85 return "table";
86
87 return "(unknown)";
88 }
89
90 static const struct timestamp_id_to_name {
91 uint id;
92 const char *name;
93 } timestamp_ids[] = {
94 /* Marker to report base_time */
95 { 0, "1st timestamp" },
96 { TS_START_ROMSTAGE, "start of romstage" },
97 { TS_BEFORE_INITRAM, "before ram initialization" },
98 { TS_AFTER_INITRAM, "after ram initialization" },
99 { TS_END_ROMSTAGE, "end of romstage" },
100 { TS_START_VBOOT, "start of verified boot" },
101 { TS_END_VBOOT, "end of verified boot" },
102 { TS_START_COPYRAM, "starting to load ramstage" },
103 { TS_END_COPYRAM, "finished loading ramstage" },
104 { TS_START_RAMSTAGE, "start of ramstage" },
105 { TS_START_BOOTBLOCK, "start of bootblock" },
106 { TS_END_BOOTBLOCK, "end of bootblock" },
107 { TS_START_COPYROM, "starting to load romstage" },
108 { TS_END_COPYROM, "finished loading romstage" },
109 { TS_START_ULZMA, "starting LZMA decompress (ignore for x86)" },
110 { TS_END_ULZMA, "finished LZMA decompress (ignore for x86)" },
111 { TS_START_ULZ4F, "starting LZ4 decompress (ignore for x86)" },
112 { TS_END_ULZ4F, "finished LZ4 decompress (ignore for x86)" },
113 { TS_DEVICE_ENUMERATE, "device enumeration" },
114 { TS_DEVICE_CONFIGURE, "device configuration" },
115 { TS_DEVICE_ENABLE, "device enable" },
116 { TS_DEVICE_INITIALIZE, "device initialization" },
117 { TS_DEVICE_DONE, "device setup done" },
118 { TS_CBMEM_POST, "cbmem post" },
119 { TS_WRITE_TABLES, "write tables" },
120 { TS_FINALIZE_CHIPS, "finalize chips" },
121 { TS_LOAD_PAYLOAD, "load payload" },
122 { TS_ACPI_WAKE_JUMP, "ACPI wake jump" },
123 { TS_SELFBOOT_JUMP, "selfboot jump" },
124
125 { TS_START_COPYVER, "starting to load verstage" },
126 { TS_END_COPYVER, "finished loading verstage" },
127 { TS_START_TPMINIT, "starting to initialize TPM" },
128 { TS_END_TPMINIT, "finished TPM initialization" },
129 { TS_START_VERIFY_SLOT, "starting to verify keyblock/preamble (RSA)" },
130 { TS_END_VERIFY_SLOT, "finished verifying keyblock/preamble (RSA)" },
131 { TS_START_HASH_BODY, "starting to verify body (load+SHA2+RSA) " },
132 { TS_DONE_LOADING, "finished loading body (ignore for x86)" },
133 { TS_DONE_HASHING, "finished calculating body hash (SHA2)" },
134 { TS_END_HASH_BODY, "finished verifying body signature (RSA)" },
135
136 { TS_START_COPYVPD, "starting to load Chrome OS VPD" },
137 { TS_END_COPYVPD_RO, "finished loading Chrome OS VPD (RO)" },
138 { TS_END_COPYVPD_RW, "finished loading Chrome OS VPD (RW)" },
139
140 { TS_U_BOOT_INITTED, "U-Boot start" },
141 { TS_RO_PARAMS_INIT, "RO parameter init" },
142 { TS_RO_VB_INIT, "RO vboot init" },
143 { TS_RO_VB_SELECT_FIRMWARE, "RO vboot select firmware" },
144 { TS_RO_VB_SELECT_AND_LOAD_KERNEL, "RO vboot select&load kernel" },
145 { TS_RW_VB_SELECT_AND_LOAD_KERNEL, "RW vboot select&load kernel" },
146 { TS_VB_SELECT_AND_LOAD_KERNEL, "vboot select&load kernel" },
147 { TS_VB_EC_VBOOT_DONE, "finished EC verification" },
148 { TS_VB_STORAGE_INIT_DONE, "finished storage device initialization" },
149 { TS_VB_READ_KERNEL_DONE, "finished reading kernel from disk" },
150 { TS_VB_VBOOT_DONE, "finished vboot kernel verification" },
151 { TS_KERNEL_DECOMPRESSION, "starting kernel decompression/relocation" },
152 { TS_START_KERNEL, "jumping to kernel" },
153 { TS_U_BOOT_START_KERNEL, "just before jump to kernel" },
154
155 /* Intel ME-related timestamps */
156 { TS_ME_INFORM_DRAM_WAIT, "waiting for ME acknowledgment of raminit"},
157 { TS_ME_INFORM_DRAM_DONE, "finished waiting for ME response"},
158
159 /* FSP-related timestamps */
160 { TS_FSP_MEMORY_INIT_START, "calling FspMemoryInit" },
161 { TS_FSP_MEMORY_INIT_END, "returning from FspMemoryInit" },
162 { TS_FSP_TEMP_RAM_EXIT_START, "calling FspTempRamExit" },
163 { TS_FSP_TEMP_RAM_EXIT_END, "returning from FspTempRamExit" },
164 { TS_FSP_SILICON_INIT_START, "calling FspSiliconInit" },
165 { TS_FSP_SILICON_INIT_END, "returning from FspSiliconInit" },
166 { TS_FSP_BEFORE_ENUMERATE, "calling FspNotify(AfterPciEnumeration)" },
167 { TS_FSP_AFTER_ENUMERATE,
168 "returning from FspNotify(AfterPciEnumeration)" },
169 { TS_FSP_BEFORE_FINALIZE, "calling FspNotify(ReadyToBoot)" },
170 { TS_FSP_AFTER_FINALIZE, "returning from FspNotify(ReadyToBoot)" },
171 { TS_FSP_BEFORE_END_OF_FIRMWARE, "calling FspNotify(EndOfFirmware)" },
172 { TS_FSP_AFTER_END_OF_FIRMWARE,
173 "returning from FspNotify(EndOfFirmware)" },
174 };
175
timestamp_name(uint32_t id)176 static const char *timestamp_name(uint32_t id)
177 {
178 int i;
179
180 for (i = 0; i < ARRAY_SIZE(timestamp_ids); i++) {
181 if (timestamp_ids[i].id == id)
182 return timestamp_ids[i].name;
183 }
184
185 return "<unknown>";
186 }
187
show_table(struct sysinfo_t * info,bool verbose)188 static void show_table(struct sysinfo_t *info, bool verbose)
189 {
190 struct cb_serial *ser = info->serial;
191 int i;
192
193 printf("Coreboot table at %lx, decoded to %p",
194 gd->arch.coreboot_table, info);
195 if (info->header)
196 printf(", forwarded to %p\n", info->header);
197 printf("\n");
198
199 print_dec("CPU KHz", info->cpu_khz);
200
201 print_addr("Serial I/O port", info->ser_ioport);
202 print_addr(">base", info->ser_base);
203 print_ptr(">pointer", ser);
204 if (ser) {
205 print_hex(">type", ser->type);
206 print_addr(">base", ser->baseaddr);
207 print_dec(">baud", ser->baud);
208 print_hex(">regwidth", ser->regwidth);
209 print_dec(">input_hz", ser->input_hertz);
210 print_addr(">PCI addr", ser->uart_pci_addr);
211 }
212
213 print_dec("Mem ranges", info->n_memranges);
214 printf("%12s: %-11s || base || size\n", "id", "type");
215 for (i = 0; i < info->n_memranges; i++) {
216 const struct memrange *mr = &info->memrange[i];
217
218 printf("%12d: %02x:%-8s %016llx %016llx\n", i, mr->type,
219 get_mem_name(mr->type), mr->base, mr->size);
220 }
221 print_ptr("option_table", info->option_table);
222
223 print_hex("CMOS start", info->cmos_range_start);
224 if (info->cmos_range_start) {
225 print_hex(">CMOS end", info->cmos_range_end);
226 print_hex(">CMOS csum loc", info->cmos_checksum_location);
227 }
228
229 print_hex("VBNV start", info->vbnv_start);
230 print_hex("VBNV size", info->vbnv_size);
231
232 print_str("CB version", info->cb_version);
233 print_str(">Extra", info->extra_version);
234 print_str(">Build", info->build);
235 print_str(">Time", info->compile_time);
236 print_str(">By", info->compile_by);
237 print_str(">Host", info->compile_host);
238 print_str(">Domain", info->compile_domain);
239 print_str(">Compiler", info->compiler);
240 print_str(">Linker", info->linker);
241 print_str(">Assembler", info->assembler);
242
243 print_ptr("Framebuffer", info->framebuffer);
244 if (info->framebuffer) {
245 struct cb_framebuffer *fb = info->framebuffer;
246
247 print_addr64(">Phys addr", fb->physical_address);
248 print_dec(">X res", fb->x_resolution);
249 print_dec(">X res", fb->y_resolution);
250 print_hex(">Bytes / line", fb->bytes_per_line);
251 print_dec(">Bpp", fb->bits_per_pixel);
252 printf(" %-12s red %d/%d, green %d/%d, blue %d/%d, reserved %d/%d\n",
253 "pos/size", fb->red_mask_pos, fb->red_mask_size,
254 fb->green_mask_pos, fb->green_mask_size,
255 fb->blue_mask_pos, fb->blue_mask_size,
256 fb->reserved_mask_pos, fb->reserved_mask_size);
257 }
258
259 print_dec("GPIOs", info->num_gpios);
260 printf("%12s: %4s %12s %3s %s\n", "id", "port", "polarity", "val",
261 "name");
262 for (i = 0; i < info->num_gpios; i++) {
263 const struct cb_gpio *gpio = &info->gpios[i];
264 char portstr[4];
265
266 if (gpio->port == 0xffffffff)
267 strcpy(portstr, "-");
268 else
269 sprintf(portstr, "%x", gpio->port);
270 printf("%12d: %4s %12s %3d %s\n", i, portstr,
271 gpio->polarity == CB_GPIO_ACTIVE_LOW ? "active-low" :
272 "active-high", gpio->value, gpio->name);
273 }
274 print_dec("MACs", info->num_macs);
275 for (i = 0; i < info->num_macs; i++) {
276 const struct mac_address *mac = &info->macs[i];
277 int j;
278
279 printf("%12d: ", i);
280 for (j = 0; j < sizeof(mac->mac_addr); j++)
281 printf("%s%02x", j ? ":" : "", mac->mac_addr[j]);
282 printf("\n");
283 }
284 print_str(">Serial #", info->serialno);
285 print_ptr("Multiboot tab", info->mbtable);
286 print_ptr("CB header", info->header);
287 print_ptr("CB mainboard", info->mainboard);
288 if (info->mainboard) {
289 struct cb_mainboard *mb = info->mainboard;
290
291 print_idx(">vendor", mb->vendor_idx, mb->strings);
292 print_idx(">part_number", mb->part_number_idx, mb->strings);
293 }
294 print_ptr("vboot handoff", info->vboot_handoff);
295 print_hex(">size", info->vboot_handoff_size);
296 print_ptr(">vdat addr", info->vdat_addr);
297 print_hex(">size", info->vdat_size);
298
299 print_addr64("SMBIOS", info->smbios_start);
300 print_hex(">size", info->smbios_size);
301 print_hex("ROM MTRR", info->x86_rom_var_mtrr_index);
302
303 print_ptr("Tstamp table", info->tstamp_table);
304 if (verbose && info->tstamp_table) {
305 struct timestamp_table *ts = info->tstamp_table;
306
307 printf("%-12s", "Base_time");
308 print_grouped_ull(ts->base_time, 12);
309 printf("\n");
310 print_dec("Tick MHz", ts->tick_freq_mhz);
311 for (i = 0; i < ts->num_entries; i++) {
312 const struct timestamp_entry *tse;
313
314 tse = &ts->entries[i];
315 printf(" ");
316 print_grouped_ull(tse->entry_stamp, 12);
317 printf(" %s\n", timestamp_name(tse->entry_id));
318 }
319 }
320
321 print_ptr("CBmem cons", info->cbmem_cons);
322 if (info->cbmem_cons) {
323 struct cbmem_console *cons = info->cbmem_cons;
324 int i;
325
326 print_hex("Size", cons->size);
327 print_hex("Cursor", cons->cursor);
328 if (verbose) {
329 for (i = 0; i < cons->cursor; i++) {
330 int ch = cons->body[i];
331
332 putc(ch);
333
334 if (ch == '\n') {
335 /* check for ctrl-c to abort... */
336 if (ctrlc()) {
337 puts("Abort\n");
338 return;
339 }
340 printf(" ");
341 }
342 }
343 printf("\n");
344 }
345 }
346
347 print_ptr("MRC cache", info->mrc_cache);
348 print_ptr("ACPI GNVS", info->acpi_gnvs);
349 print_hex("Board ID", info->board_id);
350 print_hex("RAM code", info->ram_code);
351 print_ptr("WiFi calib", info->wifi_calibration);
352 print_addr64("Ramoops buff", info->ramoops_buffer);
353 print_hex(">size", info->ramoops_buffer_size);
354 print_hex("SF size", info->spi_flash.size);
355 print_hex("SF sector", info->spi_flash.sector_size);
356 print_hex("SF erase cmd", info->spi_flash.erase_cmd);
357
358 print_addr64("FMAP offset", info->fmap_offset);
359 print_addr64("CBFS offset", info->cbfs_offset);
360 print_addr64("CBFS size", info->cbfs_size);
361 print_addr64("Boot media size", info->boot_media_size);
362 print_addr64("MTC start", info->mtc_start);
363 print_hex("MTC size", info->mtc_size);
364
365 print_ptr("Chrome OS VPD", info->chromeos_vpd);
366 }
367
do_cbsysinfo(struct cmd_tbl * cmdtp,int flag,int argc,char * const argv[])368 static int do_cbsysinfo(struct cmd_tbl *cmdtp, int flag, int argc,
369 char *const argv[])
370 {
371 bool verbose = false;
372
373 if (argc > 1) {
374 if (!strcmp("-v", argv[1]))
375 verbose = true;
376 else
377 return CMD_RET_USAGE;
378 }
379
380 if (!gd->arch.coreboot_table) {
381 printf("No coreboot sysinfo table found\n");
382 return CMD_RET_FAILURE;
383 }
384 show_table(&lib_sysinfo, verbose);
385
386 return 0;
387 }
388
389 U_BOOT_CMD(
390 cbsysinfo, 2, 1, do_cbsysinfo,
391 "Show coreboot sysinfo table",
392 "[-v] Dumps out the contents of the sysinfo table. This only\n"
393 "works if U-Boot is booted from coreboot"
394 );
395