1 // SPDX-License-Identifier: GPL-2.0+
2 /*
3 * (C) Copyright 2011
4 * Ilya Yanok, EmCraft Systems
5 */
6 #include <cpu_func.h>
7 #include <asm/cache.h>
8 #include <linux/types.h>
9 #include <common.h>
10
11 #if !CONFIG_IS_ENABLED(SYS_DCACHE_OFF)
invalidate_dcache_all(void)12 void invalidate_dcache_all(void)
13 {
14 asm volatile("mcr p15, 0, %0, c7, c6, 0\n" : : "r"(0));
15 }
16
flush_dcache_all(void)17 void flush_dcache_all(void)
18 {
19 asm volatile(
20 "0:"
21 "mrc p15, 0, r15, c7, c14, 3\n"
22 "bne 0b\n"
23 "mcr p15, 0, %0, c7, c10, 4\n"
24 : : "r"(0) : "memory"
25 );
26 }
27
invalidate_dcache_range(unsigned long start,unsigned long stop)28 void invalidate_dcache_range(unsigned long start, unsigned long stop)
29 {
30 if (!check_cache_range(start, stop))
31 return;
32
33 while (start < stop) {
34 asm volatile("mcr p15, 0, %0, c7, c6, 1\n" : : "r"(start));
35 start += CONFIG_SYS_CACHELINE_SIZE;
36 }
37 }
38
flush_dcache_range(unsigned long start,unsigned long stop)39 void flush_dcache_range(unsigned long start, unsigned long stop)
40 {
41 if (!check_cache_range(start, stop))
42 return;
43
44 while (start < stop) {
45 asm volatile("mcr p15, 0, %0, c7, c14, 1\n" : : "r"(start));
46 start += CONFIG_SYS_CACHELINE_SIZE;
47 }
48
49 asm volatile("mcr p15, 0, %0, c7, c10, 4\n" : : "r"(0));
50 }
51 #else /* #if !CONFIG_IS_ENABLED(SYS_DCACHE_OFF) */
invalidate_dcache_all(void)52 void invalidate_dcache_all(void)
53 {
54 }
55
flush_dcache_all(void)56 void flush_dcache_all(void)
57 {
58 }
59 #endif /* #if !CONFIG_IS_ENABLED(SYS_DCACHE_OFF) */
60
61 /*
62 * Stub implementations for l2 cache operations
63 */
64
l2_cache_disable(void)65 __weak void l2_cache_disable(void) {}
66
67 #if CONFIG_IS_ENABLED(SYS_THUMB_BUILD)
invalidate_l2_cache(void)68 __weak void invalidate_l2_cache(void) {}
69 #endif
70
71 #if !CONFIG_IS_ENABLED(SYS_ICACHE_OFF)
72 /* Invalidate entire I-cache and branch predictor array */
invalidate_icache_all(void)73 void invalidate_icache_all(void)
74 {
75 unsigned long i = 0;
76
77 asm ("mcr p15, 0, %0, c7, c5, 0" : : "r" (i));
78 }
79 #else
invalidate_icache_all(void)80 void invalidate_icache_all(void) {}
81 #endif
82
enable_caches(void)83 void enable_caches(void)
84 {
85 #if !CONFIG_IS_ENABLED(SYS_ICACHE_OFF)
86 icache_enable();
87 #endif
88 #if !CONFIG_IS_ENABLED(SYS_DCACHE_OFF)
89 dcache_enable();
90 #endif
91 }
92
93