1 /* SPDX-License-Identifier: GPL-2.0 */
2 /*
3  * Copyright (C) 2020 Marvell International Ltd.
4  *
5  * Fixes and workaround for Octeon chip errata. This file
6  * contains functions called by cvmx-helper to workaround known
7  * chip errata. For the most part, code doesn't need to call
8  * these functions directly.
9  */
10 
11 #ifndef __CVMX_HELPER_ERRATA_H__
12 #define __CVMX_HELPER_ERRATA_H__
13 
14 #include "cvmx-wqe.h"
15 
16 /**
17  * @INTERNAL
18  * Function to adjust internal IPD pointer alignments
19  *
20  * @return 0 on success
21  *         !0 on failure
22  */
23 int __cvmx_helper_errata_fix_ipd_ptr_alignment(void);
24 
25 /**
26  * This function needs to be called on all Octeon chips with
27  * errata PKI-100.
28  *
29  * The Size field is 8 too large in WQE and next pointers
30  *
31  *  The Size field generated by IPD is 8 larger than it should
32  *  be. The Size field is <55:40> of both:
33  *      - WORD3 in the work queue entry, and
34  *      - the next buffer pointer (which precedes the packet data
35  *        in each buffer).
36  *
37  * @param work   Work queue entry to fix
38  * @return Zero on success. Negative on failure
39  */
40 int cvmx_helper_fix_ipd_packet_chain(cvmx_wqe_t *work);
41 
42 /**
43  * Due to errata G-720, the 2nd order CDR circuit on CN52XX pass
44  * 1 doesn't work properly. The following code disables 2nd order
45  * CDR for the specified QLM.
46  *
47  * @param qlm    QLM to disable 2nd order CDR for.
48  */
49 void __cvmx_helper_errata_qlm_disable_2nd_order_cdr(int qlm);
50 #endif
51