1 /* SPDX-License-Identifier: GPL-2.0 */
2 /*
3 * Copyright (C) 2020 Marvell International Ltd.
4 *
5 * This file provides support for the processor local scratch memory.
6 * Scratch memory is byte addressable - all addresses are byte addresses.
7 */
8
9 #ifndef __CVMX_SCRATCH_H__
10 #define __CVMX_SCRATCH_H__
11
12 /* Note: This define must be a long, not a long long in order to compile
13 without warnings for both 32bit and 64bit. */
14 #define CVMX_SCRATCH_BASE (-32768l) /* 0xffffffffffff8000 */
15
16 /* Scratch line for LMTST/LMTDMA on Octeon3 models */
17 #ifdef CVMX_CAVIUM_OCTEON3
18 #define CVMX_PKO_LMTLINE 2ull
19 #endif
20
21 /**
22 * Reads an 8 bit value from the processor local scratchpad memory.
23 *
24 * @param address byte address to read from
25 *
26 * @return value read
27 */
cvmx_scratch_read8(u64 address)28 static inline u8 cvmx_scratch_read8(u64 address)
29 {
30 return *CASTPTR(volatile u8, CVMX_SCRATCH_BASE + address);
31 }
32
33 /**
34 * Reads a 16 bit value from the processor local scratchpad memory.
35 *
36 * @param address byte address to read from
37 *
38 * @return value read
39 */
cvmx_scratch_read16(u64 address)40 static inline u16 cvmx_scratch_read16(u64 address)
41 {
42 return *CASTPTR(volatile u16, CVMX_SCRATCH_BASE + address);
43 }
44
45 /**
46 * Reads a 32 bit value from the processor local scratchpad memory.
47 *
48 * @param address byte address to read from
49 *
50 * @return value read
51 */
cvmx_scratch_read32(u64 address)52 static inline u32 cvmx_scratch_read32(u64 address)
53 {
54 return *CASTPTR(volatile u32, CVMX_SCRATCH_BASE + address);
55 }
56
57 /**
58 * Reads a 64 bit value from the processor local scratchpad memory.
59 *
60 * @param address byte address to read from
61 *
62 * @return value read
63 */
cvmx_scratch_read64(u64 address)64 static inline u64 cvmx_scratch_read64(u64 address)
65 {
66 return *CASTPTR(volatile u64, CVMX_SCRATCH_BASE + address);
67 }
68
69 /**
70 * Writes an 8 bit value to the processor local scratchpad memory.
71 *
72 * @param address byte address to write to
73 * @param value value to write
74 */
cvmx_scratch_write8(u64 address,u64 value)75 static inline void cvmx_scratch_write8(u64 address, u64 value)
76 {
77 *CASTPTR(volatile u8, CVMX_SCRATCH_BASE + address) = (u8)value;
78 }
79
80 /**
81 * Writes a 32 bit value to the processor local scratchpad memory.
82 *
83 * @param address byte address to write to
84 * @param value value to write
85 */
cvmx_scratch_write16(u64 address,u64 value)86 static inline void cvmx_scratch_write16(u64 address, u64 value)
87 {
88 *CASTPTR(volatile u16, CVMX_SCRATCH_BASE + address) = (u16)value;
89 }
90
91 /**
92 * Writes a 16 bit value to the processor local scratchpad memory.
93 *
94 * @param address byte address to write to
95 * @param value value to write
96 */
cvmx_scratch_write32(u64 address,u64 value)97 static inline void cvmx_scratch_write32(u64 address, u64 value)
98 {
99 *CASTPTR(volatile u32, CVMX_SCRATCH_BASE + address) = (u32)value;
100 }
101
102 /**
103 * Writes a 64 bit value to the processor local scratchpad memory.
104 *
105 * @param address byte address to write to
106 * @param value value to write
107 */
cvmx_scratch_write64(u64 address,u64 value)108 static inline void cvmx_scratch_write64(u64 address, u64 value)
109 {
110 *CASTPTR(volatile u64, CVMX_SCRATCH_BASE + address) = value;
111 }
112
113 #endif /* __CVMX_SCRATCH_H__ */
114