1.. SPDX-License-Identifier: GPL-2.0+
2
3B4860QDS
4========
5
6The B4860QDS is a Freescale reference board that hosts the B4860 SoC
7(and variants).
8
9B4860 Overview
10--------------
11The B4860 QorIQ Qonverge device is a Freescale high-end, multicore SoC based on
12StarCore and Power Architecture® cores. It targets the broadband wireless
13infrastructure and builds upon the proven success of the existing multicore
14DSPs and Power CPUs. It is designed to bolster the rapidly changing and
15expanding wireless markets, such as 3GLTE (FDD and TDD), LTE-Advanced, and UMTS.
16
17The B4860 is a highly-integrated StarCore and Power Architecture processor that
18contains:
19
20* Six fully-programmable StarCore SC3900 FVP subsystems, divided into three
21  clusters-each core runs up to 1.2 GHz, with an architecture highly optimized
22  for wireless base station applications
23* Four dual-thread e6500 Power Architecture processors organized in one
24  cluster-each core runs up to 1.8 GHz
25* Two DDR3/3L controllers for high-speed, industry-standard memory interface
26  each runs at up to 1866.67 MHz
27* MAPLE-B3 hardware acceleration-for forward error correction schemes including
28  Turbo or Viterbi decoding, Turbo encoding and rate matching, MIMO MMSE
29  equalization scheme, matrix operations, CRC insertion and check, DFT/iDFT and
30  FFT/iFFT calculations, PUSCH/PDSCH acceleration, and UMTS chip rate
31  acceleration
32* CoreNet fabric that fully supports coherency using MESI protocol between the
33  e6500 cores, SC3900 FVP cores, memories and external interfaces.
34  CoreNet fabric interconnect runs at 667 MHz and supports coherent and
35  non-coherent out of order transactions with prioritization and bandwidth
36  allocation amongst CoreNet endpoints.
37* Data Path Acceleration Architecture, which includes the following:
38
39     * Frame Manager (FMan), which supports in-line packet parsing and general
40       classification to enable policing and QoS-based packet distribution
41     * Queue Manager (QMan) and Buffer Manager (BMan), which allow offloading
42       of queue management, task management, load distribution, flow ordering,
43       buffer management, and allocation tasks from the cores
44     * Security engine (SEC 5.3)-crypto-acceleration for protocols such as
45       IPsec, SSL, and 802.16
46     * RapidIO manager (RMAN) - Support SRIO types 8, 9, 10, and 11 (inbound
47       and outbound). Supports types 5, 6 (outbound only)
48
49* Large internal cache memory with snooping and stashing capabilities for
50  bandwidth saving and high utilization of processor elements. The 9856-Kbyte
51  internal memory space includes the following:
52
53     * 32 Kbyte L1 ICache per e6500/SC3900 core
54     * 32 Kbyte L1 DCache per e6500/SC3900 core
55     * 2048 Kbyte unified L2 cache for each SC3900 FVP cluster
56     * 2048 Kbyte unified L2 cache for the e6500 cluster
57     * Two 512 Kbyte shared L3 CoreNet platform caches (CPC)
58
59* Sixteen 10-GHz SerDes lanes serving:
60
61     * Two Serial RapidIO interfaces
62     * Each supports up to 4 lanes and a total of up to 8 lanes
63
64* Up to 8-lanes Common Public Radio Interface (CPRI) controller for
65  glue-less antenna connection
66* Two 10-Gbit Ethernet controllers (10GEC)
67* Six 1G/2.5-Gbit Ethernet controllers for network communications
68* PCI Express controller
69* Debug (Aurora)
70* Two OCeaN DMAs
71* Various system peripherals
72* 182 32-bit timers
73
74B4860QDS Overview
75-----------------
76- DDRC1: Ten separate DDR3 parts of 16-bit to support 72-bit (ECC) at 1866MT/s,
77  ECC, 4 GB of memory in two ranks of 2 GB.
78- DDRC2: Five separate DDR3 parts of 16-bit to support 72-bit (ECC) at 1866MT/s,
79  ECC, 2 GB of memory. Single rank.
80- SerDes 1 multiplexing: Two Vitesse (transmit and receive path) cross-point
81  16x16 switch VSC3316
82- SerDes 2 multiplexing: Two Vitesse (transmit and receive path) cross-point
83  8x8 switch VSC3308
84- USB 2.0 ULPI PHY USB3315 by SMSC supports USB port in host mode.
85  B4860 UART port is available over USB-to-UART translator USB2SER or over
86  RS232 flat cable.
87- A Vitesse dual SGMII phy VSC8662 links the B4860 SGMII lines to 2xRJ-45
88  copper connectors for Stand-alone mode and to the 1000Base-X over AMC
89  MicroTCA connector ports 0 and 2 for AMC mode.
90- The B4860 configuration may be loaded from nine bits coded reset configuration
91  reset source. The RCW source is set by appropriate DIP-switches.
92- 16-bit NOR Flash / PROMJet
93- QIXIS 8-bit NOR Flash Emulator
94- 8-bit NAND Flash
95- 24-bit SPI Flash
96- Long address I2C EEPROM
97- Available debug interfaces are:
98
99     - On-board eCWTAP controller with ETH and USB I/F
100     - JTAG/COP 16-pin header for any external TAP controller
101     - External JTAG source over AMC to support B2B configuration
102     - 70-pin Aurora debug connector
103
104- QIXIS (FPGA) logic:
105     - 2 KB internal memory space including
106
107- IDT840NT4 clock synthesizer provides B4860 essential clocks : SYSCLK,
108  DDRCLK1,2 and RTCCLK.
109- Two 8T49N222A SerDes ref clock devices support two SerDes port clock
110  frequency - total four refclk, including CPRI clock scheme.
111
112
113B4420 Personality
114-----------------
115
116B4420 is a reduced personality of B4860 with less core/clusters(both SC3900
117and e6500), less DDR controllers, less serdes lanes, less SGMII interfaces
118and reduced target frequencies.
119
120Key differences between B4860 and B4420
121---------------------------------------
122
123B4420 has:
124
1251. Less e6500 cores: 1 cluster with 2 e6500 cores
1262. Less SC3900 cores/clusters: 1 cluster with 2 SC3900 cores per cluster
1273. Single DDRC
1284. 2X 4 lane serdes
1295. 3 SGMII interfaces
1306. no sRIO
1317. no 10G
132
133B4860QDS Default Settings
134-------------------------
135
136Switch Settings
137^^^^^^^^^^^^^^^
138
139.. code-block:: none
140
141   SW1	OFF [0]	OFF [0]	OFF [0]	OFF [0]	OFF [0]	OFF [0]	OFF [0]	OFF [0]
142   SW2	ON	ON	ON	ON	ON	ON	OFF	OFF
143   SW3	OFF	OFF	OFF	ON	OFF	OFF	ON	OFF
144   SW5	OFF	OFF	OFF	OFF	OFF	OFF	ON	ON
145
146Note:
147
148- PCIe slots modes: All the PCIe devices work as Root Complex.
149- Boot location: NOR flash.
150
151SysClk/Core(e6500)/CCB/DDR/FMan/DDRCLK/StarCore/CPRI-Maple/eTVPE-Maple/ULB-Maple
15266MHz/1.6GHz/667MHz/1.6GHz data rate/667MHz/133MHz/1200MHz/500MHz/800MHz/667MHz
153
154NAND boot::
155
156	SW1 [1.1] = 0
157	SW2 [1.1] = 1
158	SW3 [1:4] = 0001
159
160NOR boot::
161
162	SW1 [1.1] = 1
163	SW2 [1.1] = 0
164	SW3 [1:4] = 1000
165
166B4420QDS Default Settings
167-------------------------
168
169Switch Settings
170^^^^^^^^^^^^^^^
171
172.. code-block:: none
173
174   SW1	OFF[0]	OFF [0]	OFF [0]	OFF [0]	OFF [0]	OFF [0]	OFF [0]	OFF [0]
175   SW2	ON	OFF	ON	OFF	ON	ON	OFF	OFF
176   SW3	OFF	OFF	OFF	ON	OFF	OFF	ON	OFF
177   SW5	OFF	OFF	OFF	OFF	OFF	OFF	ON	ON
178
179Note:
180
181- PCIe slots modes: All the PCIe devices work as Root Complex.
182- Boot location: NOR flash.
183
184SysClk/Core(e6500)/CCB/DDR/FMan/DDRCLK/StarCore/CPRI-Maple/eTVPE-Maple/ULB-Maple
18566MHz/1.6GHz/667MHz/1.6GHz data rate/667MHz/133MHz/1200MHz/500MHz/800MHz/667MHz
186
187NAND boot::
188
189	SW1 [1.1] = 0
190	SW2 [1.1] = 1
191	SW3 [1:4] = 0001
192
193NOR boot::
194
195	SW1 [1.1] = 1
196	SW2 [1.1] = 0
197	SW3 [1:4] = 1000
198
199Memory map on B4860QDS
200----------------------
201The addresses in brackets are physical addresses.
202
203=============   =============   =============== =======
204Start Address	End Address	Description	Size
205=============   =============   =============== =======
2060xF_FFDF_1000 	0xF_FFFF_FFFF	Free		2 MB
2070xF_FFDF_0000 	0xF_FFDF_0FFF	IFC - FPGA 	4 KB
2080xF_FF81_0000 	0xF_FFDE_FFFF	Free		5 MB
2090xF_FF80_0000	0xF_FF80_FFFF	IFC NAND Flash	64 KB
2100xF_FF00_0000	0xF_FF7F_FFFF	Free		8 MB
2110xF_FE00_0000 	0xF_FEFF_FFFF	CCSRBAR		16 MB
2120xF_F801_0000 	0xF_FDFF_FFFF	Free		95 MB
2130xF_F800_0000	0xF_F800_FFFF	PCIe I/O Space 	64 KB
2140xF_F600_0000 	0xF_F7FF_FFFF	QMAN s/w portal	32 MB
2150xF_F400_0000 	0xF_F5FF_FFFF	BMAN s/w portal	32 MB
2160xF_F000_0000 	0xF_F3FF_FFFF	Free		64 MB
2170xF_E800_0000 	0xF_EFFF_FFFF	IFC  NOR Flash 	128 MB
2180xF_E000_0000	0xF_E7FF_FFFF	Promjet		128 MB
2190xF_A0C0_0000 	0xF_DFFF_FFFF	Free		1012 MB
2200xF_A000_0000 	0xF_A0BF_FFFF	MAPLE0/1/2	12 MB
2210xF_0040_0000 	0xF_9FFF_FFFF	Free		12 GB
2220xF_0000_0000 	0xF_01FF_FFFF	DCSR		32 MB
2230xC_4000_0000 	0xE_FFFF_FFFF	Free		11 GB
2240xC_3000_0000 	0xC_3FFF_FFFF	sRIO-2 I/O 	256 MB
2250xC_2000_0000 	0xC_2FFF_FFFF	sRIO-1 I/O  	256 MB
2260xC_0000_0000	0xC_1FFF_FFFF	PCIe Mem Space 	512 MB
2270x1_0000_0000 	0xB_FFFF_FFFF	Free		44 GB
2280x0_8000_0000 	0x0_FFFF_FFFF	DDRC1		2 GB
2290x0_0000_0000 	0x0_7FFF_FFFF	DDRC2	  	2 GB
230=============   =============   =============== =======
231
232Memory map on B4420QDS
233----------------------
234The addresses in brackets are physical addresses.
235
236=============   =============   =============== =======
237Start Address	End Address	Description	Size
238=============   =============   =============== =======
2390xF_FFDF_1000 	0xF_FFFF_FFFF	Free		2 MB
2400xF_FFDF_0000 	0xF_FFDF_0FFF	IFC - FPGA 	4 KB
2410xF_FF81_0000 	0xF_FFDE_FFFF	Free		5 MB
2420xF_FF80_0000	0xF_FF80_FFFF	IFC NAND Flash	64 KB
2430xF_FF00_0000	0xF_FF7F_FFFF	Free		8 MB
2440xF_FE00_0000 	0xF_FEFF_FFFF	CCSRBAR		16 MB
2450xF_F801_0000 	0xF_FDFF_FFFF	Free		95 MB
2460xF_F800_0000	0xF_F800_FFFF	PCIe I/O Space 	64 KB
2470xF_F600_0000 	0xF_F7FF_FFFF	QMAN s/w portal	32 MB
2480xF_F400_0000 	0xF_F5FF_FFFF	BMAN s/w portal	32 MB
2490xF_F000_0000 	0xF_F3FF_FFFF	Free		64 MB
2500xF_E800_0000 	0xF_EFFF_FFFF	IFC  NOR Flash 	128 MB
2510xF_E000_0000	0xF_E7FF_FFFF	Promjet		128 MB
2520xF_A0C0_0000 	0xF_DFFF_FFFF	Free		1012 MB
2530xF_A000_0000 	0xF_A0BF_FFFF	MAPLE0/1/2	12 MB
2540xF_0040_0000 	0xF_9FFF_FFFF	Free		12 GB
2550xF_0000_0000 	0xF_01FF_FFFF	DCSR		32 MB
2560xC_4000_0000 	0xE_FFFF_FFFF	Free		11 GB
2570xC_3000_0000 	0xC_3FFF_FFFF	sRIO-2 I/O 	256 MB
2580xC_2000_0000 	0xC_2FFF_FFFF	sRIO-1 I/O  	256 MB
2590xC_0000_0000	0xC_1FFF_FFFF	PCIe Mem Space 	512 MB
2600x1_0000_0000 	0xB_FFFF_FFFF	Free		44 GB
2610x0_0000_0000 	0x0_FFFF_FFFF	DDRC1		4 GB
262=============   =============   =============== =======
263
264NOR Flash memory Map on B4860 and B4420QDS
265------------------------------------------
266
267=============   =============   ==============================  =========
268 Start		 End		Definition			Size
269=============   =============   ==============================  =========
2700xEFF40000	0xEFFFFFFF	U-Boot (current bank)		768KB
2710xEFF20000	0xEFF3FFFF	U-Boot env (current bank)	128KB
2720xEFF00000	0xEFF1FFFF	FMAN Ucode (current bank)	128KB
2730xEF300000	0xEFEFFFFF	rootfs (alternate bank)		12MB
2740xEE800000	0xEE8FFFFF	device tree (alternate bank)	1MB
2750xEE020000	0xEE6FFFFF	Linux.uImage (alternate bank)	6MB+896KB
2760xEE000000	0xEE01FFFF	RCW (alternate bank)		128KB
2770xEDF40000	0xEDFFFFFF	U-Boot (alternate bank)		768KB
2780xEDF20000	0xEDF3FFFF	U-Boot env (alternate bank)	128KB
2790xEDF00000	0xEDF1FFFF	FMAN ucode (alternate bank)	128KB
2800xED300000	0xEDEFFFFF	rootfs (current bank)		12MB
2810xEC800000	0xEC8FFFFF	device tree (current bank)	1MB
2820xEC020000	0xEC6FFFFF	Linux.uImage (current bank)	6MB+896KB
2830xEC000000	0xEC01FFFF	RCW (current bank)		128KB
284=============   =============   ==============================  =========
285
286Various Software configurations/environment variables/commands
287--------------------------------------------------------------
288The below commands apply to both B4860QDS and B4420QDS.
289
290U-Boot environment variable hwconfig
291^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^
292
293The default hwconfig is:
294
295.. code-block:: none
296
297   hwconfig=fsl_ddr:ctlr_intlv=null,bank_intlv=cs0_cs1;usb1:dr_mode=host,phy_type=ulpi
298
299Note: For USB gadget set "dr_mode=peripheral"
300
301FMAN Ucode versions
302^^^^^^^^^^^^^^^^^^^
303
304fsl_fman_ucode_B4860_106_3_6.bin
305
306Switching to alternate bank
307^^^^^^^^^^^^^^^^^^^^^^^^^^^
308
309Commands for switching to alternate bank.
310
3111. To change from vbank0 to vbank2
312
313.. code-block:: none
314
315   => qixis_reset altbank (it will boot using vbank2)
316
3172. To change from vbank2 to vbank0
318
319.. code-block:: none
320
321   => qixis reset (it will boot using vbank0)
322
323To change personality of board
324^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^
325
326For changing personality from B4860 to B4420
327
3281. Boot from vbank0
3292. Flash vbank2 with b4420 rcw and U-Boot
3303. Give following commands to uboot prompt
331
332.. code-block:: none
333
334   => mw.b ffdf0040 0x30;
335   => mw.b ffdf0010 0x00;
336   => mw.b ffdf0062 0x02;
337   => mw.b ffdf0050 0x02;
338   => mw.b ffdf0010 0x30;
339   => reset
340
341Note:
342
343- Power off cycle will lead to default switch settings.
344- 0xffdf0000 is the address of the QIXIS FPGA.
345
346Switching between NOR and NAND boot(RCW src changed from NOR <-> NAND)
347^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^
348
349To change from NOR to NAND boot give following command on uboot prompt
350
351.. code-block:: none
352
353   => mw.b ffdf0040 0x30
354   => mw.b ffdf0010 0x00
355   => mw.b 0xffdf0050 0x08
356   => mw.b 0xffdf0060 0x82
357   => mw.b ffdf0061 0x00
358   => mw.b ffdf0010 0x30
359   => reset
360
361To change from NAND to NOR boot give following command on uboot prompt:
362
363.. code-block:: none
364
365   => mw.b ffdf0040 0x30
366   => mw.b ffdf0010 0x00
367   => mw.b 0xffdf0050 0x00(for vbank0) or (mw.b 0xffdf0050 0x02 for vbank2)
368   => mw.b 0xffdf0060 0x12
369   => mw.b ffdf0061 0x01
370   => mw.b ffdf0010 0x30
371   => reset
372
373Note:
374
375- Power off cycle will lead to default switch settings.
376- 0xffdf0000 is the address of the QIXIS FPGA.
377
378Ethernet interfaces for B4860QDS
379^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^
380
381Serdes protocosl tested:
382* 0x2a, 0x8d (serdes1, serdes2) [DEFAULT]
383* 0x2a, 0xb2 (serdes1, serdes2)
384
385When using [DEFAULT] RCW, which including 2 * 1G SGMII on board and 2 * 1G
386SGMII on SGMII riser card.
387
388Under U-Boot these network interfaces are recognized as::
389
390   FM1@DTSEC3, FM1@DTSEC4, FM1@DTSEC5 and FM1@DTSEC6.
391
392On Linux the interfaces are renamed as::
393
394   eth2 -> fm1-gb2
395   eth3 -> fm1-gb3
396   eth4 -> fm1-gb4
397   eth5 -> fm1-gb5
398
399RCW and Ethernet interfaces for B4420QDS
400^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^
401
402Serdes protocosl tested:
403* 0x18, 0x9e (serdes1, serdes2)
404
405Under U-Boot these network interfaces are recognized as::
406
407   FM1@DTSEC3, FM1@DTSEC4 and  e1000#0.
408
409On Linux the interfaces are renamed as::
410
411   eth2 -> fm1-gb2
412   eth3 -> fm1-gb3
413
414NAND boot with 2 Stage boot loader
415----------------------------------
416PBL initialise the internal SRAM and copy SPL(160KB) in SRAM.
417SPL further initialise DDR using SPD and environment variables and copy
418U-Boot(768 KB) from flash to DDR.
419Finally SPL transer control to U-Boot for futher booting.
420
421SPL has following features:
422 - Executes within 256K
423 - No relocation required
424
425Run time view of SPL framework during  boot:
426
427+----------------------------------------------+
428|Area        | Address                         |
429+----------------------------------------------+
430|Secure boot | 0xFFFC0000 (32KB)               |
431|headers     |                                 |
432+----------------------------------------------+
433|GD, BD      | 0xFFFC8000 (4KB)                |
434+----------------------------------------------+
435|ENV         | 0xFFFC9000 (8KB)                |
436+----------------------------------------------+
437|HEAP        | 0xFFFCB000 (30KB)               |
438+----------------------------------------------+
439|STACK       | 0xFFFD8000 (22KB)               |
440+----------------------------------------------+
441|U-Boot SPL  | 0xFFFD8000 (160KB)              |
442+----------------------------------------------+
443
444NAND Flash memory Map on B4860 and B4420QDS
445-------------------------------------------
446
447=============   =============   =============================   =====
448Start		End		Definition			Size
449=============   =============   =============================   =====
4500x000000	0x0FFFFF	U-Boot                          1MB
4510x140000	0x15FFFF	U-Boot env                      128KB
4520x1A0000	0x1BFFFF	FMAN Ucode                      128KB
453=============   =============   =============================   =====
454