1 /* SPDX-License-Identifier: GPL-2.0+ */ 2 /* 3 * Copyright 2014 Freescale Semiconductor, Inc. 4 * Copyright 2020 NXP 5 */ 6 7 #ifndef __VID_H_ 8 #define __VID_H_ 9 10 /* IR36021 command codes */ 11 #define IR36021_LOOP1_MANUAL_ID_OFFSET 0x6A 12 #define IR36021_LOOP1_VOUT_OFFSET 0x9A 13 #define IR36021_MFR_ID_OFFSET 0x92 14 #define IR36021_MFR_ID 0x43 15 #define IR36021_INTEL_MODE_OFFSET 0x14 16 #define IR36021_MODE_MASK 0x20 17 #define IR36021_INTEL_MODE 0x00 18 #define IR36021_AMD_MODE 0x20 19 20 /* Step the IR regulator in 5mV increments */ 21 #define IR_VDD_STEP_DOWN 5 22 #define IR_VDD_STEP_UP 5 23 24 /* LTC3882 */ 25 #define PMBUS_CMD_WRITE_PROTECT 0x10 26 /* 27 * WRITE_PROTECT command supported values 28 * 0x80: Disable all writes except WRITE_PROTECT, PAGE, 29 * STORE_USER_ALL and MFR_EE_UNLOCK commands. 30 * 0x40: Disable all writes except WRITE_PROTECT, PAGE, STORE_USER_ALL, 31 * MFR_EE_UNLOCK, OPERATION, CLEAR_PEAKS and CLEAR_FAULTS commands. 32 * Individual faults can also be cleared by writing a 1 to the 33 * respective status bit. 34 * 0x20: Disable all writes except WRITE_PROTECT, PAGE, STORE_USER_ ALL, 35 * MFR_EE_UNLOCK, OPERATION, CLEAR_PEAKS, CLEAR_FAULTS, ON_OFF_CONFIG 36 * and VOUT_COMMAND commands. Individual faults can be cleared by 37 * writing a 1 to the respective status bit. 38 * 0x00: Enables write to all commands 39 */ 40 #define EN_WRITE_ALL_CMD (0) 41 42 #ifdef CONFIG_TARGET_LX2160ARDB 43 /* The lowest and highest voltage allowed*/ 44 #define VDD_MV_MIN 775 45 #define VDD_MV_MAX 855 46 #endif 47 48 #if defined(CONFIG_TARGET_LX2160AQDS) || defined(CONFIG_TARGET_LX2162AQDS) 49 /* The lowest and highest voltage allowed*/ 50 #define VDD_MV_MIN 775 51 #define VDD_MV_MAX 925 52 #endif 53 54 /* PM Bus commands code for LTC3882*/ 55 #define PWM_CHANNEL0 0x0 56 #define PMBUS_CMD_PAGE 0x0 57 #define PMBUS_CMD_READ_VOUT 0x8B 58 #define PMBUS_CMD_VOUT_MODE 0x20 59 #define PMBUS_CMD_VOUT_COMMAND 0x21 60 #define PMBUS_CMD_PAGE_PLUS_WRITE 0x05 61 62 #if defined(CONFIG_TARGET_LX2160AQDS) || defined(CONFIG_TARGET_LX2162AQDS) || \ 63 defined(CONFIG_TARGET_LX2160ARDB) 64 /* Voltage monitor on channel 2*/ 65 #define I2C_VOL_MONITOR_BUS_V_OFFSET 0x2 66 #define I2C_VOL_MONITOR_BUS_V_OVF 0x1 67 #define I2C_VOL_MONITOR_BUS_V_SHIFT 3 68 #define I2C_VOL_MONITOR_ADDR 0x63 69 #define I2C_MUX_CH_VOL_MONITOR 0xA 70 #endif 71 72 int adjust_vdd(ulong vdd_override); 73 u16 soc_get_fuse_vid(int vid_index); 74 75 #endif /* __VID_H_ */ 76