1 /* SPDX-License-Identifier: GPL-2.0+ */ 2 /* 3 * Copyright (C) 2018 Allied Telesis Labs 4 */ 5 6 #ifndef _CONFIG_X530_H 7 #define _CONFIG_X530_H 8 9 /* 10 * High Level Configuration Options (easy to change) 11 */ 12 13 #define CONFIG_DISPLAY_BOARDINFO_LATE 14 15 #define CONFIG_SYS_TCLK 250000000 /* 250MHz */ 16 17 /* 18 * NS16550 Configuration 19 */ 20 #define CONFIG_SYS_NS16550_SERIAL 21 #define CONFIG_SYS_NS16550_CLK CONFIG_SYS_TCLK 22 #if !defined(CONFIG_DM_SERIAL) 23 #define CONFIG_SYS_NS16550_REG_SIZE (-4) 24 #define CONFIG_SYS_NS16550_COM1 MV_UART_CONSOLE_BASE 25 #endif 26 27 /* 28 * Serial Port configuration 29 * The following definitions let you select what serial you want to use 30 * for your console driver. 31 */ 32 33 /* NAND */ 34 #define CONFIG_SYS_NAND_ONFI_DETECTION 35 #define CONFIG_SYS_MAX_NAND_DEVICE 1 36 37 #define BBT_CUSTOM_SCAN 38 #define BBT_CUSTOM_SCAN_PAGE 0 39 #define BBT_CUSTOM_SCAN_POSITION 2048 40 41 /* SPI NOR flash default params, used by sf commands */ 42 43 #define MTDIDS_DEFAULT "nand0=nand" 44 #define MTDPARTS_DEFAULT "mtdparts=nand:240M(user),8M(errlog),8M(nand-bbt)" 45 #define MTDPARTS_MTDOOPS "errlog" 46 47 /* Partition support */ 48 49 /* Additional FS support/configuration */ 50 51 /* USB/EHCI configuration */ 52 #define CONFIG_EHCI_IS_TDI 53 54 /* Environment in SPI NOR flash */ 55 56 #define PHY_ANEG_TIMEOUT 8000 /* PHY needs a longer aneg time */ 57 58 /* PCIe support */ 59 #ifndef CONFIG_SPL_BUILD 60 #define CONFIG_PCI_SCAN_SHOW 61 #endif 62 63 /* NAND */ 64 #define CONFIG_SYS_NAND_ONFI_DETECTION 65 66 #define CONFIG_SYS_MALLOC_LEN (4 << 20) 67 68 #include <asm/arch/config.h> 69 70 /* 71 * Other required minimal configurations 72 */ 73 #define CONFIG_SYS_RESET_ADDRESS 0xffff0000 /* Rst Vector Adr */ 74 75 /* Keep device tree and initrd in low memory so the kernel can access them */ 76 #define CONFIG_EXTRA_ENV_SETTINGS \ 77 "fdt_high=0x10000000\0" \ 78 "initrd_high=0x10000000\0" 79 80 #define CONFIG_SYS_LOAD_ADDR 0x1000000 81 #define CONFIG_UBI_PART user 82 #define CONFIG_UBIFS_VOLUME user 83 84 /* SPL */ 85 86 /* Defines for SPL */ 87 #define CONFIG_SPL_SIZE (140 << 10) 88 #define CONFIG_SPL_MAX_SIZE (CONFIG_SPL_SIZE - 0x0030) 89 90 #define CONFIG_SPL_BSS_START_ADDR (0x40000000 + CONFIG_SPL_SIZE) 91 #define CONFIG_SPL_BSS_MAX_SIZE (16 << 10) 92 93 #ifdef CONFIG_SPL_BUILD 94 #define CONFIG_SYS_MALLOC_SIMPLE 95 #endif 96 97 #define CONFIG_SPL_STACK (0x40000000 + ((192 - 16) << 10)) 98 #define CONFIG_SPL_BOOTROM_SAVE (CONFIG_SPL_STACK + 4) 99 100 /* SPL related SPI defines */ 101 #define CONFIG_SYS_U_BOOT_OFFS CONFIG_SYS_SPI_U_BOOT_OFFS 102 103 #endif /* _CONFIG_X530_H */ 104