1// SPDX-License-Identifier: GPL-2.0+ OR X11
2/*
3 * Freescale ls2080a QDS common device tree source
4 *
5 * Copyright 2013-2015 Freescale Semiconductor, Inc.
6 * Copyright 2020 NXP
7 */
8
9#include "fsl-ls2080a.dtsi"
10
11&i2c0 {
12	status = "okay";
13	pca9547@77 {
14		compatible = "nxp,pca9547";
15		reg = <0x77>;
16		#address-cells = <1>;
17		#size-cells = <0>;
18		i2c@0 {
19			#address-cells = <1>;
20			#size-cells = <0>;
21			reg = <0x00>;
22			rtc@68 {
23				compatible = "dallas,ds3232";
24				reg = <0x68>;
25			};
26		};
27	};
28};
29
30&dspi {
31	bus-num = <0>;
32	status = "okay";
33
34	dflash0: n25q128a {
35		#address-cells = <1>;
36		#size-cells = <1>;
37		compatible = "jedec,spi-nor";
38		spi-max-frequency = <3000000>;
39		spi-cpol;
40		spi-cpha;
41		reg = <0>;
42	};
43	dflash1: sst25wf040b {
44		#address-cells = <1>;
45		#size-cells = <1>;
46		compatible = "jedec,spi-nor";
47		spi-max-frequency = <3000000>;
48		spi-cpol;
49		spi-cpha;
50		reg = <1>;
51	};
52	dflash2: en25s64 {
53		#address-cells = <1>;
54		#size-cells = <1>;
55		compatible = "jedec,spi-nor";
56		spi-max-frequency = <3000000>;
57		spi-cpol;
58		spi-cpha;
59		reg = <2>;
60	};
61};
62
63&qspi {
64	status = "okay";
65
66	s25fs256s0: flash@0 {
67		#address-cells = <1>;
68		#size-cells = <1>;
69		compatible = "jedec,spi-nor";
70		spi-max-frequency = <50000000>;
71		reg = <0>;
72	};
73};
74
75&sata {
76	status = "okay";
77};
78