1/*
2 * Copyright 2016 Freescale Semiconductor, Inc.
3 *
4 * This program is free software; you can redistribute it and/or modify
5 * it under the terms of the GNU General Public License version 2 as
6 * published by the Free Software Foundation.
7 */
8
9/dts-v1/;
10
11#include "imx7ulp.dtsi"
12
13/ {
14	model = "NXP i.MX7ULP EVK";
15	compatible = "fsl,imx7ulp-evk", "fsl,imx7ulp", "Generic DT based system";
16
17	chosen {
18		bootargs = "console=ttyLP0,115200 earlycon=lpuart32,0x402D0000,115200";
19		stdout-path = &lpuart4;
20	};
21
22	bcmdhd_wlan_0: bcmdhd_wlan@0 {
23		compatible = "android,bcmdhd_wlan";
24		wlreg_on-supply = <&wlreg_on>;
25		bcmdhd_fw = "/lib/firmware/bcm/1DX_BCM4343W/fw_bcmdhd.bin";
26		bcmdhd_nv = "/lib/firmware/bcm/1DX_BCM4343W/bcmdhd.1DX.SDIO.cal";
27	};
28
29	memory {
30		device_type = "memory";
31		reg = <0x60000000 0x40000000>;
32	};
33
34	backlight {
35		compatible = "gpio-backlight";
36		pinctrl-names = "default";
37		pinctrl-0 = <&pinctrl_backlight>;
38		gpios = <&gpio3 2 GPIO_ACTIVE_HIGH>;
39		default-on;
40		status = "okay";
41	};
42
43	mipi_dsi_reset: mipi-dsi-reset {
44		compatible = "gpio-reset";
45		reset-gpios = <&gpio0 19 GPIO_ACTIVE_LOW>;
46		reset-delay-us = <1000>;
47		#reset-cells = <0>;
48	};
49
50	regulators {
51		compatible = "simple-bus";
52		#address-cells = <1>;
53		#size-cells = <0>;
54
55		wlreg_on: fixedregulator@100 {
56			compatible = "regulator-fixed";
57			regulator-min-microvolt = <5000000>;
58			regulator-max-microvolt = <5000000>;
59			regulator-name = "wlreg_on";
60			gpio = <&gpio2 6 GPIO_ACTIVE_HIGH>;
61			startup-delay-us = <100>;
62			enable-active-high;
63		};
64
65		reg_usb_otg1_vbus: regulator@0 {
66			compatible = "regulator-fixed";
67			reg = <0>;
68			pinctrl-names = "default";
69			pinctrl-0 = <&pinctrl_usbotg1_vbus>;
70			regulator-name = "usb_otg1_vbus";
71			regulator-min-microvolt = <5000000>;
72			regulator-max-microvolt = <5000000>;
73			gpio = <&gpio0 0 GPIO_ACTIVE_HIGH>;
74			enable-active-high;
75		};
76
77		reg_vsd_3v3: regulator@1 {
78			compatible = "regulator-fixed";
79			reg = <1>;
80			regulator-name = "VSD_3V3";
81			regulator-min-microvolt = <3300000>;
82			regulator-max-microvolt = <3300000>;
83			gpio = <&gpio1 0 GPIO_ACTIVE_HIGH>;
84			enable-active-high;
85		};
86
87	};
88
89	pf1550-rpmsg {
90		compatible = "fsl,pf1550-rpmsg";
91		sw1_reg: SW1 {
92				regulator-name = "SW1";
93				regulator-min-microvolt = <600000>;
94				regulator-max-microvolt = <1387500>;
95				regulator-boot-on;
96				regulator-always-on;
97		};
98
99		sw2_reg: SW2 {
100				regulator-name = "SW2";
101				regulator-min-microvolt = <600000>;
102				regulator-max-microvolt = <1387500>;
103				regulator-boot-on;
104				regulator-always-on;
105		};
106
107		sw3_reg: SW3 {
108				regulator-name = "SW3";
109				regulator-min-microvolt = <1800000>;
110				regulator-max-microvolt = <3300000>;
111				regulator-boot-on;
112				regulator-always-on;
113		};
114
115		vref_reg: VREFDDR {
116				regulator-name = "VREFDDR";
117				regulator-min-microvolt = <1200000>;
118				regulator-max-microvolt = <1200000>;
119				regulator-boot-on;
120				regulator-always-on;
121		};
122
123		vldo1_reg: LDO1 {
124				regulator-name = "LDO1";
125				regulator-min-microvolt = <750000>;
126				regulator-max-microvolt = <3300000>;
127				regulator-always-on;
128		};
129
130		vldo2_reg: LDO2 {
131				regulator-name = "LDO2";
132				regulator-min-microvolt = <1800000>;
133				regulator-max-microvolt = <3300000>;
134				regulator-always-on;
135		};
136
137		vldo3_reg: LDO3 {
138				regulator-name = "LDO3";
139				regulator-min-microvolt = <750000>;
140				regulator-max-microvolt = <3300000>;
141				regulator-always-on;
142		};
143	};
144};
145
146&iomuxc1 {
147	pinctrl-names = "default";
148	pinctrl-0 = <&pinctrl_hog_1>;
149
150	imx7ulp-evk {
151		pinctrl_hog_1: hoggrp-1 {
152			fsl,pins = <
153				IMX7ULP_PAD_PTC1__PTC1		0x20000
154			>;
155		};
156
157		pinctrl_backlight: backlight_grp {
158			fsl,pins = <
159				IMX7ULP_PAD_PTF2__PTF2		0x20000
160			>;
161		};
162
163		pinctrl_lpi2c5: lpi2c5grp {
164			fsl,pins = <
165				IMX7ULP_PAD_PTC4__LPI2C5_SCL	0x27
166				IMX7ULP_PAD_PTC5__LPI2C5_SDA	0x27
167			>;
168		};
169
170		pinctrl_mipi_dsi_reset: mipi_dsi_reset_grp {
171			fsl,pins = <
172				IMX7ULP_PAD_PTC19__PTC19	0x20003
173			>;
174		};
175
176		pinctrl_lpuart4: lpuart4grp {
177			fsl,pins = <
178				IMX7ULP_PAD_PTC3__LPUART4_RX	0x3
179				IMX7ULP_PAD_PTC2__LPUART4_TX	0x3
180			>;
181		};
182
183		pinctrl_lpuart6: lpuart6grp {
184			fsl,pins = <
185				IMX7ULP_PAD_PTE10__LPUART6_TX	0x3
186				IMX7ULP_PAD_PTE11__LPUART6_RX	0x3
187				IMX7ULP_PAD_PTE9__LPUART6_RTS_B	0x3
188				IMX7ULP_PAD_PTE8__LPUART6_CTS_B	0x3
189				IMX7ULP_PAD_PTE7__PTE7		0x20000	/* BT_REG_ON */
190			>;
191		};
192
193		pinctrl_lpuart7: lpuart7grp {
194			fsl,pins = <
195				IMX7ULP_PAD_PTF14__LPUART7_TX		0x3
196				IMX7ULP_PAD_PTF15__LPUART7_RX		0x3
197				IMX7ULP_PAD_PTF13__LPUART7_RTS_B	0x3
198				IMX7ULP_PAD_PTF12__LPUART7_CTS_B	0x3
199			>;
200		};
201
202		pinctrl_usdhc0: usdhc0grp {
203			fsl,pins = <
204				IMX7ULP_PAD_PTD1__SDHC0_CMD	0x43
205				IMX7ULP_PAD_PTD2__SDHC0_CLK	0x10042
206				IMX7ULP_PAD_PTD7__SDHC0_D3	0x43
207				IMX7ULP_PAD_PTD8__SDHC0_D2	0x43
208				IMX7ULP_PAD_PTD9__SDHC0_D1	0x43
209				IMX7ULP_PAD_PTD10__SDHC0_D0	0x43
210				IMX7ULP_PAD_PTC10__PTC10	0x10000	/* USDHC0 CD */
211				IMX7ULP_PAD_PTD0__PTD0		0x20000	/* USDHC0 RST */
212			>;
213		};
214
215		pinctrl_usdhc0_8bit: usdhc0grp_8bit {
216			fsl,pins = <
217				IMX7ULP_PAD_PTD1__SDHC0_CMD	0x43
218				IMX7ULP_PAD_PTD2__SDHC0_CLK	0x10042
219				IMX7ULP_PAD_PTD3__SDHC0_D7	0x43
220				IMX7ULP_PAD_PTD4__SDHC0_D6	0x43
221				IMX7ULP_PAD_PTD5__SDHC0_D5	0x43
222				IMX7ULP_PAD_PTD6__SDHC0_D4	0x43
223				IMX7ULP_PAD_PTD7__SDHC0_D3	0x43
224				IMX7ULP_PAD_PTD8__SDHC0_D2	0x43
225				IMX7ULP_PAD_PTD9__SDHC0_D1	0x43
226				IMX7ULP_PAD_PTD10__SDHC0_D0	0x43
227				IMX7ULP_PAD_PTD11__SDHC0_DQS	0x42
228			>;
229		};
230
231		pinctrl_lpi2c7: lpi2c7grp {
232			fsl,pins = <
233				IMX7ULP_PAD_PTF12__LPI2C7_SCL	0x27
234				IMX7ULP_PAD_PTF13__LPI2C7_SDA	0x27
235			>;
236		};
237
238		pinctrl_lpspi3: lpspi3grp {
239			fsl,pins = <
240				IMX7ULP_PAD_PTF16__LPSPI3_SIN	0x0
241				IMX7ULP_PAD_PTF17__LPSPI3_SOUT	0x0
242				IMX7ULP_PAD_PTF18__LPSPI3_SCK	0x0
243				IMX7ULP_PAD_PTF19__LPSPI3_PCS0	0x0
244			>;
245		};
246
247		pinctrl_usbotg1_vbus: otg1vbusgrp {
248			fsl,pins = <
249				IMX7ULP_PAD_PTC0__PTC0		0x20000
250			>;
251		};
252
253		pinctrl_usbotg1_id: otg1idgrp {
254			fsl,pins = <
255				IMX7ULP_PAD_PTC13__USB0_ID	0x10003
256			>;
257		};
258
259		pinctrl_usdhc1: usdhc1grp {
260			fsl,pins = <
261				IMX7ULP_PAD_PTE3__SDHC1_CMD	0x43
262				IMX7ULP_PAD_PTE2__SDHC1_CLK	0x10042
263				IMX7ULP_PAD_PTE1__SDHC1_D0	0x43
264				IMX7ULP_PAD_PTE0__SDHC1_D1	0x43
265				IMX7ULP_PAD_PTE5__SDHC1_D2	0x43
266				IMX7ULP_PAD_PTE4__SDHC1_D3	0x43
267			>;
268		};
269
270		pinctrl_usdhc1_rst: usdhc1grp_rst {
271			fsl,pins = <
272				IMX7ULP_PAD_PTE11__PTE11	0x20000	/* USDHC1 RST */
273				IMX7ULP_PAD_PTE13__PTE13	0x10003	/* USDHC1 CD */
274				IMX7ULP_PAD_PTE12__PTE12	0x10003	/* USDHC1 WP */
275				IMX7ULP_PAD_PTE14__SDHC1_VS	0x43	/* USDHC1 VSEL */
276			>;
277		};
278
279		pinctrl_dsi_hdmi: dsi_hdmi_grp {
280			fsl,pins = <
281				IMX7ULP_PAD_PTC18__PTC18	0x10003	/* DSI_HDMI_INT */
282			>;
283		};
284	};
285};
286
287&lcdif {
288	status = "okay";
289	disp-dev = "mipi_dsi_northwest";
290	display = <&display0>;
291
292	display0: display@0 {
293		bits-per-pixel = <16>;
294		bus-width = <24>;
295
296		display-timings {
297			native-mode = <&timing0>;
298			timing0: timing0 {
299			clock-frequency = <9200000>;
300			hactive = <480>;
301			vactive = <272>;
302			hfront-porch = <8>;
303			hback-porch = <4>;
304			hsync-len = <41>;
305			vback-porch = <2>;
306			vfront-porch = <4>;
307			vsync-len = <10>;
308
309			hsync-active = <0>;
310			vsync-active = <0>;
311			de-active = <1>;
312			pixelclk-active = <0>;
313			};
314		};
315	};
316};
317
318&lpi2c7 {
319	#address-cells = <1>;
320	#size-cells = <0>;
321	pinctrl-names = "default";
322	pinctrl-0 = <&pinctrl_lpi2c7>;
323};
324
325&lpi2c5 {
326	#address-cells = <1>;
327	#size-cells = <0>;
328	pinctrl-names = "default";
329	pinctrl-0 = <&pinctrl_lpi2c5>;
330	status = "okay";
331};
332
333&lpspi3 {
334	#address-cells = <1>;
335	#size-cells = <0>;
336	pinctrl-names = "default";
337	pinctrl-0 = <&pinctrl_lpspi3>;
338	status = "okay";
339
340	spidev0: spi@0 {
341		reg = <0>;
342		compatible = "rohm,dh2228fv";
343		spi-max-frequency = <1000000>;
344	};
345};
346
347&mipi_dsi {
348	pinctrl-names = "default";
349	pinctrl-0 = <&pinctrl_mipi_dsi_reset>;
350	lcd_panel = "TRULY-WVGA-TFT3P5581E";
351	resets = <&mipi_dsi_reset>;
352	status = "okay";
353};
354
355&lpuart4 { /* console */
356	pinctrl-names = "default";
357	pinctrl-0 = <&pinctrl_lpuart4>;
358	status = "okay";
359};
360
361&lpuart6 { /* BT */
362	pinctrl-names = "default";
363	pinctrl-0 = <&pinctrl_lpuart6>;
364	status = "okay";
365};
366
367&lpuart7 { /* Uart test */
368	pinctrl-names = "default";
369	pinctrl-0 = <&pinctrl_lpuart7>;
370	status = "disabled";
371};
372
373&rpmsg{
374	status = "okay";
375};
376
377&usbotg1 {
378	vbus-supply = <&reg_usb_otg1_vbus>;
379	pinctrl-names = "default";
380	pinctrl-0 = <&pinctrl_usbotg1_id>;
381	srp-disable;
382	hnp-disable;
383	adp-disable;
384	status = "okay";
385};
386
387&usbphy1 {
388	fsl,tx-d-cal = <88>;
389};
390
391&usdhc0 {
392	pinctrl-names = "default", "state_100mhz", "state_200mhz", "sleep";
393	pinctrl-0 = <&pinctrl_usdhc0>;
394	pinctrl-1 = <&pinctrl_usdhc0>;
395	pinctrl-2 = <&pinctrl_usdhc0>;
396	pinctrl-3 = <&pinctrl_usdhc0>;
397	cd-gpios = <&gpio0 10 GPIO_ACTIVE_LOW>;
398	vmmc-supply = <&reg_vsd_3v3>;
399	vqmmc-supply = <&vldo2_reg>;
400	status = "okay";
401};
402