1// SPDX-License-Identifier: (GPL-2.0+ OR X11)
2/*
3 * Copyright (C) 2015-2019 Marek Vasut <marex@denx.de>
4 */
5
6#include "socfpga_cyclone5.dtsi"
7#include <dt-bindings/gpio/gpio.h>
8#include <dt-bindings/input/input.h>
9
10/ {
11	model = "Softing VIN|ING FPGA";
12	compatible = "samtec,vining", "altr,socfpga-cyclone5", "altr,socfpga";
13
14	chosen {
15		bootargs = "earlyprintk";
16		stdout-path = "serial0:115200n8";
17	};
18
19	memory@0 {
20		name = "memory";
21		device_type = "memory";
22		reg = <0x0 0x40000000>; /* 1GB */
23	};
24
25	aliases {
26		/*
27		 * This allow the ethaddr uboot environment variable contents
28		 * to be added to the gmac1 device tree blob.
29		 */
30		ethernet0 = &gmac1;
31		ethernet1 = &gmac0;
32	};
33
34	gpio-keys {
35		compatible = "gpio-keys";
36
37		hps_temp0 {
38			label = "BTN_0";			/* TEMP_OS */
39			gpios = <&portc 18 GPIO_ACTIVE_LOW>;	/* HPS_GPIO60 */
40			linux,code = <BTN_0>;
41		};
42
43		hps_hkey0 {
44			label = "BTN_1";			/* DIS_PWR */
45			gpios = <&portc 19 GPIO_ACTIVE_LOW>;	/* HPS_GPIO61 */
46			linux,code = <BTN_1>;
47		};
48
49		hps_hkey1 {
50			label = "hps_hkey1";			/* POWER_DOWN */
51			gpios = <&portc 20 GPIO_ACTIVE_LOW>;	/* HPS_GPIO62 */
52			linux,code = <KEY_POWER>;
53		};
54	};
55
56	regulator-usb-nrst {
57		compatible = "regulator-fixed";
58		regulator-name = "usb_nrst";
59		regulator-min-microvolt = <5000000>;
60		regulator-max-microvolt = <5000000>;
61		gpio = <&portb 5 GPIO_ACTIVE_HIGH>;
62		startup-delay-us = <70000>;
63		enable-active-high;
64		regulator-always-on;
65	};
66};
67
68&gmac0 {
69	status = "disabled";
70	phy-mode = "gmii";
71};
72
73&gmac1 {
74	status = "okay";
75	phy-mode = "rgmii";
76	phy-handle = <&phy1>;
77
78	snps,reset-gpio = <&porta 0 GPIO_ACTIVE_LOW>;
79	snps,reset-active-low;
80	snps,reset-delays-us = <10000 10000 10000>;
81
82	mdio0 {
83		#address-cells = <1>;
84		#size-cells = <0>;
85		compatible = "snps,dwmac-mdio";
86		phy1: ethernet-phy@1 {
87			reg = <1>;
88			rxd0-skew-ps = <0>;
89			rxd1-skew-ps = <0>;
90			rxd2-skew-ps = <0>;
91			rxd3-skew-ps = <0>;
92			txd0-skew-ps = <0>;
93			txd1-skew-ps = <0>;
94			txd2-skew-ps = <0>;
95			txd3-skew-ps = <0>;
96			txen-skew-ps = <0>;
97			txc-skew-ps = <1860>;
98			rxdv-skew-ps = <0>;
99			rxc-skew-ps = <1860>;
100		};
101	};
102};
103
104&gpio0 {	/* GPIO 0..29 */
105	status = "okay";
106};
107
108&gpio1 {	/* GPIO 30..57 */
109	status = "okay";
110};
111
112&gpio2 {	/* GPIO 58..66 (HLGPI 0..13 at offset 13) */
113	status = "okay";
114};
115
116&i2c0 {
117	status = "okay";
118
119	gpio: pca9557@1f {
120		compatible = "nxp,pca9557";
121		reg = <0x1f>;
122		gpio-controller;
123		#gpio-cells = <2>;
124	};
125
126	temp: lm75@48 {
127		compatible = "lm75";
128		reg = <0x48>;
129	};
130
131	at24@50 {
132		compatible = "atmel,24c01";
133		pagesize = <8>;
134		reg = <0x50>;
135	};
136
137	i2cswitch@70 {
138		compatible = "nxp,pca9548";
139		#address-cells = <1>;
140		#size-cells = <0>;
141		reg = <0x70>;
142
143		i2c@0 {
144			#address-cells = <1>;
145			#size-cells = <0>;
146			reg = <0>;
147		};
148
149		i2c@1 {
150			#address-cells = <1>;
151			#size-cells = <0>;
152			reg = <1>;
153		};
154
155		i2c@2 {
156			#address-cells = <1>;
157			#size-cells = <0>;
158			reg = <2>;
159		};
160
161		i2c@3 {
162			#address-cells = <1>;
163			#size-cells = <0>;
164			reg = <3>;
165		};
166
167		i2c@4 {
168			#address-cells = <1>;
169			#size-cells = <0>;
170			reg = <4>;
171		};
172
173		i2c@5 {
174			#address-cells = <1>;
175			#size-cells = <0>;
176			reg = <5>;
177		};
178
179		i2c@6 {	/* Backplane EEPROM */
180			#address-cells = <1>;
181			#size-cells = <0>;
182			reg = <6>;
183			eeprom@51 {
184				compatible = "atmel,24c01";
185				pagesize = <8>;
186				reg = <0x51>;
187			};
188		};
189
190		i2c@7 {	/* Power board EEPROM */
191			#address-cells = <1>;
192			#size-cells = <0>;
193			reg = <7>;
194			eeprom@51 {
195				compatible = "atmel,24c01";
196				pagesize = <8>;
197				reg = <0x51>;
198			};
199		};
200	};
201};
202
203&i2c1 {
204	status = "okay";
205	clock-frequency = <100000>;
206
207	at24@50 {
208		compatible = "atmel,24c02";
209		pagesize = <8>;
210		reg = <0x50>;
211	};
212};
213
214&qspi {
215	status = "okay";
216
217	n25q128@0 {
218		#address-cells = <1>;
219		#size-cells = <1>;
220		compatible = "n25q128";
221		reg = <0>;		/* chip select */
222		spi-max-frequency = <100000000>;
223		m25p,fast-read;
224
225		cdns,page-size = <256>;
226		cdns,block-size = <16>;
227		cdns,read-delay = <4>;
228		cdns,tshsl-ns = <50>;
229		cdns,tsd2d-ns = <50>;
230		cdns,tchsh-ns = <4>;
231		cdns,tslch-ns = <4>;
232	};
233
234	n25q00@1 {
235		#address-cells = <1>;
236		#size-cells = <1>;
237		compatible = "n25q00";
238		reg = <1>;		/* chip select */
239		spi-max-frequency = <100000000>;
240		m25p,fast-read;
241
242		cdns,page-size = <256>;
243		cdns,block-size = <16>;
244		cdns,read-delay = <4>;
245		cdns,tshsl-ns = <50>;
246		cdns,tsd2d-ns = <50>;
247		cdns,tchsh-ns = <4>;
248		cdns,tslch-ns = <4>;
249	};
250};
251
252&usb0 {
253	dr_mode = "host";
254	status = "okay";
255};
256
257&usb1 {
258	dr_mode = "peripheral";
259	status = "okay";
260};
261