1 // SPDX-License-Identifier: GPL-2.0+ 2 /* 3 * Copyright (C) 2021 Stefan Roese <sr@denx.de> 4 */ 5 6 #include <dm.h> 7 #include <ram.h> 8 9 #include <mach/octeon_ddr.h> 10 #include <mach/cvmx-qlm.h> 11 #include <mach/octeon_qlm.h> 12 #include <mach/octeon_fdt.h> 13 #include <mach/cvmx-helper.h> 14 #include <mach/cvmx-helper-cfg.h> 15 #include <mach/cvmx-helper-util.h> 16 #include <mach/cvmx-bgxx-defs.h> 17 18 #include "board_ddr.h" 19 20 #define NIC23_DEF_DRAM_FREQ 800 21 22 static u8 octeon_nic23_cfg0_spd_values[512] = { 23 OCTEON_NIC23_CFG0_SPD_VALUES 24 }; 25 26 static struct ddr_conf board_ddr_conf[] = { 27 OCTEON_NIC23_DDR_CONFIGURATION 28 }; 29 30 struct ddr_conf *octeon_ddr_conf_table_get(int *count, int *def_ddr_freq) 31 { 32 *count = ARRAY_SIZE(board_ddr_conf); 33 *def_ddr_freq = NIC23_DEF_DRAM_FREQ; 34 35 return board_ddr_conf; 36 } 37 38 int board_fix_fdt(void *fdt) 39 { 40 u32 range_data[5 * 8]; 41 bool rev4; 42 int node; 43 int rc; 44 45 /* 46 * ToDo: 47 * Read rev4 info from EEPROM or where the original U-Boot does 48 * and don't hard-code it here. bad(String input, Kind kind, String prevId)49 */ 50 rev4 = true; 51 52 debug("%s() rev4: %s\n", __func__, rev4 ? "true" : "false"); 53 /* Patch the PHY configuration based on board revision */ 54 rc = octeon_fdt_patch_rename(fdt, 55 rev4 ? "4,nor-flash" : "4,no-nor-flash", 56 "cavium,board-trim", false, NULL, NULL); 57 if (!rev4) { 58 /* Modify the ranges for CS 0 */ 59 node = fdt_node_offset_by_compatible(fdt, -1, 60 "cavium,octeon-3860-bootbus"); 61 if (node < 0) { 62 printf("%s: Error: cannot find boot bus in device tree!\n", 63 __func__); 64 return -1; 65 } 66 67 rc = fdtdec_get_int_array(fdt, node, "ranges", 68 range_data, 5 * 8); 69 if (rc) { 70 printf("%s: Error reading ranges from boot bus FDT\n", checkByKind(String[] inputs, Kind kind)71 __func__); 72 return -1; 73 } 74 range_data[2] = cpu_to_fdt32(0x10000); 75 range_data[3] = 0; 76 range_data[4] = 0; 77 rc = fdt_setprop(fdt, node, "ranges", range_data, testErroneous()78 sizeof(range_data)); 79 if (rc) { 80 printf("%s: Error updating boot bus ranges in fdt\n", 81 __func__); 82 } 83 } 84 return rc; 85 } 86 87 void board_configure_qlms(void) 88 { testBadMethod()89 octeon_configure_qlm(4, 3000, CVMX_QLM_MODE_SATA_2X1, 0, 0, 0, 0); 90 octeon_configure_qlm(5, 103125, CVMX_QLM_MODE_XFI_1X2, 0, 0, 2, 0); 91 /* Apply amplitude tuning to 10G interface */ 92 octeon_qlm_tune_v3(0, 4, 3000, -1, -1, 7, -1); 93 octeon_qlm_tune_v3(0, 5, 103125, 0x19, 0x0, -1, -1); 94 octeon_qlm_set_channel_v3(0, 5, 0); 95 octeon_qlm_dfe_disable(0, 5, -1, 103125, CVMX_QLM_MODE_XFI_1X2); 96 debug("QLM 4 reference clock: %d\n" 97 "DLM 5 reference clock: %d\n", 98 cvmx_qlm_measure_clock(4), cvmx_qlm_measure_clock(5)); 99 } 100 101 int board_late_init(void) 102 { 103 board_configure_qlms(); 104 105 return 0; 106 } 107