1 // SPDX-License-Identifier: GPL-2.0+
2 /*
3 * Altera SPI driver
4 *
5 * based on bfin_spi.c
6 * Copyright (c) 2005-2008 Analog Devices Inc.
7 * Copyright (C) 2010 Thomas Chou <thomas@wytron.com.tw>
8 */
9 #include <common.h>
10 #include <dm.h>
11 #include <errno.h>
12 #include <log.h>
13 #include <malloc.h>
14 #include <fdtdec.h>
15 #include <spi.h>
16 #include <asm/io.h>
17 #include <linux/bitops.h>
18
19 #define ALTERA_SPI_STATUS_RRDY_MSK BIT(7)
20 #define ALTERA_SPI_CONTROL_SSO_MSK BIT(10)
21
22 #ifndef CONFIG_ALTERA_SPI_IDLE_VAL
23 #define CONFIG_ALTERA_SPI_IDLE_VAL 0xff
24 #endif
25
26 struct altera_spi_regs {
27 u32 rxdata;
28 u32 txdata;
29 u32 status;
30 u32 control;
31 u32 _reserved;
32 u32 slave_sel;
33 };
34
35 struct altera_spi_plat {
36 struct altera_spi_regs *regs;
37 };
38
39 struct altera_spi_priv {
40 struct altera_spi_regs *regs;
41 };
42
spi_cs_activate(struct udevice * dev,uint cs)43 static void spi_cs_activate(struct udevice *dev, uint cs)
44 {
45 struct udevice *bus = dev->parent;
46 struct altera_spi_priv *priv = dev_get_priv(bus);
47 struct altera_spi_regs *const regs = priv->regs;
48
49 writel(1 << cs, ®s->slave_sel);
50 writel(ALTERA_SPI_CONTROL_SSO_MSK, ®s->control);
51 }
52
spi_cs_deactivate(struct udevice * dev)53 static void spi_cs_deactivate(struct udevice *dev)
54 {
55 struct udevice *bus = dev->parent;
56 struct altera_spi_priv *priv = dev_get_priv(bus);
57 struct altera_spi_regs *const regs = priv->regs;
58
59 writel(0, ®s->control);
60 writel(0, ®s->slave_sel);
61 }
62
altera_spi_claim_bus(struct udevice * dev)63 static int altera_spi_claim_bus(struct udevice *dev)
64 {
65 struct udevice *bus = dev->parent;
66 struct altera_spi_priv *priv = dev_get_priv(bus);
67 struct altera_spi_regs *const regs = priv->regs;
68
69 writel(0, ®s->control);
70 writel(0, ®s->slave_sel);
71
72 return 0;
73 }
74
altera_spi_release_bus(struct udevice * dev)75 static int altera_spi_release_bus(struct udevice *dev)
76 {
77 struct udevice *bus = dev->parent;
78 struct altera_spi_priv *priv = dev_get_priv(bus);
79 struct altera_spi_regs *const regs = priv->regs;
80
81 writel(0, ®s->slave_sel);
82
83 return 0;
84 }
85
altera_spi_xfer(struct udevice * dev,unsigned int bitlen,const void * dout,void * din,unsigned long flags)86 static int altera_spi_xfer(struct udevice *dev, unsigned int bitlen,
87 const void *dout, void *din, unsigned long flags)
88 {
89 struct udevice *bus = dev->parent;
90 struct altera_spi_priv *priv = dev_get_priv(bus);
91 struct altera_spi_regs *const regs = priv->regs;
92 struct dm_spi_slave_plat *slave_plat = dev_get_parent_plat(dev);
93
94 /* assume spi core configured to do 8 bit transfers */
95 unsigned int bytes = bitlen / 8;
96 const unsigned char *txp = dout;
97 unsigned char *rxp = din;
98 uint32_t reg, data, start;
99
100 debug("%s: bus:%i cs:%i bitlen:%i bytes:%i flags:%lx\n", __func__,
101 dev_seq(bus), slave_plat->cs, bitlen, bytes, flags);
102
103 if (bitlen == 0)
104 goto done;
105
106 if (bitlen % 8) {
107 flags |= SPI_XFER_END;
108 goto done;
109 }
110
111 /* empty read buffer */
112 if (readl(®s->status) & ALTERA_SPI_STATUS_RRDY_MSK)
113 readl(®s->rxdata);
114
115 if (flags & SPI_XFER_BEGIN)
116 spi_cs_activate(dev, slave_plat->cs);
117
118 while (bytes--) {
119 if (txp)
120 data = *txp++;
121 else
122 data = CONFIG_ALTERA_SPI_IDLE_VAL;
123
124 debug("%s: tx:%x ", __func__, data);
125 writel(data, ®s->txdata);
126
127 start = get_timer(0);
128 while (1) {
129 reg = readl(®s->status);
130 if (reg & ALTERA_SPI_STATUS_RRDY_MSK)
131 break;
132 if (get_timer(start) > (CONFIG_SYS_HZ / 1000)) {
133 debug("%s: Transmission timed out!\n", __func__);
134 return -1;
135 }
136 }
137
138 data = readl(®s->rxdata);
139 if (rxp)
140 *rxp++ = data & 0xff;
141
142 debug("rx:%x\n", data);
143 }
144
145 done:
146 if (flags & SPI_XFER_END)
147 spi_cs_deactivate(dev);
148
149 return 0;
150 }
151
altera_spi_set_speed(struct udevice * bus,uint speed)152 static int altera_spi_set_speed(struct udevice *bus, uint speed)
153 {
154 return 0;
155 }
156
altera_spi_set_mode(struct udevice * bus,uint mode)157 static int altera_spi_set_mode(struct udevice *bus, uint mode)
158 {
159 return 0;
160 }
161
altera_spi_probe(struct udevice * bus)162 static int altera_spi_probe(struct udevice *bus)
163 {
164 struct altera_spi_plat *plat = dev_get_plat(bus);
165 struct altera_spi_priv *priv = dev_get_priv(bus);
166
167 priv->regs = plat->regs;
168
169 return 0;
170 }
171
altera_spi_of_to_plat(struct udevice * bus)172 static int altera_spi_of_to_plat(struct udevice *bus)
173 {
174 struct altera_spi_plat *plat = dev_get_plat(bus);
175
176 plat->regs = map_physmem(dev_read_addr(bus),
177 sizeof(struct altera_spi_regs),
178 MAP_NOCACHE);
179
180 return 0;
181 }
182
183 static const struct dm_spi_ops altera_spi_ops = {
184 .claim_bus = altera_spi_claim_bus,
185 .release_bus = altera_spi_release_bus,
186 .xfer = altera_spi_xfer,
187 .set_speed = altera_spi_set_speed,
188 .set_mode = altera_spi_set_mode,
189 /*
190 * cs_info is not needed, since we require all chip selects to be
191 * in the device tree explicitly
192 */
193 };
194
195 static const struct udevice_id altera_spi_ids[] = {
196 { .compatible = "altr,spi-1.0" },
197 {}
198 };
199
200 U_BOOT_DRIVER(altera_spi) = {
201 .name = "altera_spi",
202 .id = UCLASS_SPI,
203 .of_match = altera_spi_ids,
204 .ops = &altera_spi_ops,
205 .of_to_plat = altera_spi_of_to_plat,
206 .plat_auto = sizeof(struct altera_spi_plat),
207 .priv_auto = sizeof(struct altera_spi_priv),
208 .probe = altera_spi_probe,
209 };
210