1 // SPDX-License-Identifier: GPL-2.0+
2 /*
3 * Teranetics PHY drivers
4 *
5 * Copyright 2010-2011 Freescale Semiconductor, Inc.
6 * author Andy Fleming
7 */
8 #include <common.h>
9 #include <phy.h>
10 #include <linux/delay.h>
11
12 #ifndef CONFIG_PHYLIB_10G
13 #error The Teranetics PHY needs 10G support
14 #endif
15
tn2020_config(struct phy_device * phydev)16 int tn2020_config(struct phy_device *phydev)
17 {
18 if (phydev->port == PORT_FIBRE) {
19 unsigned short restart_an = (MDIO_AN_CTRL1_RESTART |
20 MDIO_AN_CTRL1_ENABLE |
21 MDIO_AN_CTRL1_XNP);
22 u8 phy_hwversion;
23
24 /*
25 * bit 15:12 of register 30.32 indicates PHY hardware
26 * version. It can be used to distinguish TN80xx from
27 * TN2020. TN2020 needs write 0x2 to 30.93, but TN80xx
28 * needs 0x1.
29 */
30 phy_hwversion = (phy_read(phydev, 30, 32) >> 12) & 0xf;
31 if (phy_hwversion <= 3) {
32 phy_write(phydev, 30, 93, 2);
33 phy_write(phydev, MDIO_MMD_AN, MDIO_CTRL1, restart_an);
34 } else {
35 phy_write(phydev, 30, 93, 1);
36 }
37 }
38
39 return 0;
40 }
41
tn2020_startup(struct phy_device * phydev)42 int tn2020_startup(struct phy_device *phydev)
43 {
44 unsigned int timeout = 5 * 1000; /* 5 second timeout */
45
46 #define MDIO_PHYXS_LANE_READY (MDIO_PHYXS_LNSTAT_SYNC0 | \
47 MDIO_PHYXS_LNSTAT_SYNC1 | \
48 MDIO_PHYXS_LNSTAT_SYNC2 | \
49 MDIO_PHYXS_LNSTAT_SYNC3 | \
50 MDIO_PHYXS_LNSTAT_ALIGN)
51
52 /*
53 * Wait for the XAUI-SERDES lanes to align first. Under normal
54 * circumstances, this can take up to three seconds.
55 */
56 while (--timeout) {
57 int reg = phy_read(phydev, MDIO_MMD_PHYXS, MDIO_PHYXS_LNSTAT);
58 if (reg < 0) {
59 printf("TN2020: Error reading from PHY at "
60 "address %u\n", phydev->addr);
61 break;
62 }
63 if ((reg & MDIO_PHYXS_LANE_READY) == MDIO_PHYXS_LANE_READY)
64 break;
65 udelay(1000);
66 }
67 if (!timeout) {
68 /*
69 * A timeout is bad, but it may not be fatal, so don't
70 * return an error. Display a warning instead.
71 */
72 printf("TN2020: Timeout waiting for PHY at address %u to "
73 "align.\n", phydev->addr);
74 }
75
76 if (phydev->port != PORT_FIBRE)
77 return gen10g_startup(phydev);
78
79 /*
80 * The TN2020 only pretends to support fiber.
81 * It works, but it doesn't look like it works,
82 * so the link status reports no link.
83 */
84 phydev->link = 1;
85
86 /* For now just lie and say it's 10G all the time */
87 phydev->speed = SPEED_10000;
88 phydev->duplex = DUPLEX_FULL;
89
90 return 0;
91 }
92
93 struct phy_driver tn2020_driver = {
94 .name = "Teranetics TN2020",
95 .uid = PHY_UID_TN2020,
96 .mask = 0xfffffff0,
97 .features = PHY_10G_FEATURES,
98 .mmds = (MDIO_DEVS_PMAPMD | MDIO_DEVS_PCS |
99 MDIO_DEVS_PHYXS | MDIO_DEVS_AN |
100 MDIO_DEVS_VEND1 | MDIO_DEVS_VEND2),
101 .config = &tn2020_config,
102 .startup = &tn2020_startup,
103 .shutdown = &gen10g_shutdown,
104 };
105
phy_teranetics_init(void)106 int phy_teranetics_init(void)
107 {
108 phy_register(&tn2020_driver);
109
110 return 0;
111 }
112