1// SPDX-License-Identifier: GPL-2.0+ 2/* 3 * Copyright (C) 2019-20 Sean Anderson <seanga2@gmail.com> 4 */ 5 6#include <dt-bindings/clock/k210-sysctl.h> 7#include <dt-bindings/mfd/k210-sysctl.h> 8#include <dt-bindings/pinctrl/k210-pinctrl.h> 9#include <dt-bindings/reset/k210-sysctl.h> 10 11/ { 12 /* 13 * Although the K210 is a 64-bit CPU, the address bus is only 32-bits 14 * wide, and the upper half of all addresses is ignored. 15 */ 16 #address-cells = <1>; 17 #size-cells = <1>; 18 compatible = "kendryte,k210"; 19 20 aliases { 21 cpu0 = &cpu0; 22 cpu1 = &cpu1; 23 dma0 = &dmac0; 24 gpio0 = &gpio0; 25 gpio1 = &gpio1_0; 26 i2c0 = &i2c0; 27 i2c1 = &i2c1; 28 i2c2 = &i2c2; 29 pinctrl0 = &fpioa; 30 serial0 = &uarths0; 31 serial1 = &uart1; 32 serial2 = &uart2; 33 serial3 = &uart3; 34 spi0 = &spi0; 35 spi1 = &spi1; 36 spi2 = &spi2; 37 spi3 = &spi3; 38 timer0 = &timer0; 39 timer1 = &timer1; 40 timer2 = &timer2; 41 }; 42 43 cpus { 44 #address-cells = <1>; 45 #size-cells = <0>; 46 timebase-frequency = <7800000>; 47 cpu0: cpu@0 { 48 device_type = "cpu"; 49 compatible = "kendryte,k210", "sifive,rocket0", "riscv"; 50 reg = <0>; 51 riscv,isa = "rv64imafdgc"; 52 mmu-type = "sv39"; 53 i-cache-block-size = <64>; 54 i-cache-size = <0x8000>; 55 d-cache-block-size = <64>; 56 d-cache-size = <0x8000>; 57 clocks = <&sysclk K210_CLK_CPU>; 58 cpu0_intc: interrupt-controller { 59 #interrupt-cells = <1>; 60 interrupt-controller; 61 compatible = "riscv,cpu-intc"; 62 }; 63 }; 64 cpu1: cpu@1 { 65 device_type = "cpu"; 66 compatible = "kendryte,k210", "sifive,rocket0", "riscv"; 67 reg = <1>; 68 riscv,isa = "rv64imafdgc"; 69 mmu-type = "sv39"; 70 i-cache-block-size = <64>; 71 i-cache-size = <0x8000>; 72 d-cache-block-size = <64>; 73 d-cache-size = <0x8000>; 74 clocks = <&sysclk K210_CLK_CPU>; 75 cpu1_intc: interrupt-controller { 76 #interrupt-cells = <1>; 77 interrupt-controller; 78 compatible = "riscv,cpu-intc"; 79 }; 80 }; 81 }; 82 83 sram: memory@80000000 { 84 device_type = "memory"; 85 compatible = "kendryte,k210-sram"; 86 reg = <0x80000000 0x400000>, 87 <0x80400000 0x200000>, 88 <0x80600000 0x200000>; 89 reg-names = "sram0", "sram1", "aisram"; 90 clocks = <&sysclk K210_CLK_SRAM0>, 91 <&sysclk K210_CLK_SRAM1>, 92 <&sysclk K210_CLK_AI>; 93 clock-names = "sram0", "sram1", "aisram"; 94 u-boot,dm-pre-reloc; 95 }; 96 97 clocks { 98 in0: osc { 99 compatible = "fixed-clock"; 100 #clock-cells = <0>; 101 clock-frequency = <26000000>; 102 u-boot,dm-pre-reloc; 103 }; 104 }; 105 106 soc { 107 #address-cells = <1>; 108 #size-cells = <1>; 109 compatible = "kendryte,k210-soc", "simple-bus"; 110 ranges; 111 interrupt-parent = <&plic0>; 112 113 debug0: debug@0 { 114 compatible = "kendryte,k210-debug", "riscv,debug"; 115 reg = <0x0 0x1000>; 116 }; 117 118 rom0: nvmem@1000 { 119 reg = <0x1000 0x1000>; 120 read-only; 121 }; 122 123 clint0: clint@2000000 { 124 #interrupt-cells = <1>; 125 compatible = "kendryte,k210-clint", "riscv,clint0"; 126 reg = <0x2000000 0xC000>; 127 interrupts-extended = <&cpu0_intc 3>, <&cpu0_intc 7>, 128 <&cpu1_intc 3>, <&cpu1_intc 7>; 129 clocks = <&sysclk K210_CLK_CLINT>; 130 }; 131 132 plic0: interrupt-controller@C000000 { 133 #interrupt-cells = <1>; 134 compatible = "kendryte,k210-plic", "riscv,plic0"; 135 reg = <0xC000000 0x4000000>; 136 interrupt-controller; 137 interrupts-extended = <&cpu0_intc 9>, <&cpu0_intc 11>, 138 <&cpu1_intc 9>, <&cpu1_intc 11>; 139 riscv,ndev = <65>; 140 riscv,max-priority = <7>; 141 }; 142 143 uarths0: serial@38000000 { 144 compatible = "kendryte,k210-uarths", "sifive,uart0"; 145 reg = <0x38000000 0x1000>; 146 interrupts = <33>; 147 clocks = <&sysclk K210_CLK_CPU>; 148 status = "disabled"; 149 }; 150 151 gpio0: gpio-controller@38001000 { 152 #interrupt-cells = <2>; 153 #gpio-cells = <2>; 154 compatible = "kendryte,k210-gpiohs", "sifive,gpio0"; 155 reg = <0x38001000 0x1000>; 156 interrupt-controller; 157 interrupts = <34 35 36 37 38 39 40 41 158 42 43 44 45 46 47 48 49 159 50 51 52 53 54 55 56 57 160 58 59 60 61 62 63 64 65>; 161 gpio-controller; 162 ngpios = <32>; 163 status = "disabled"; 164 }; 165 166 kpu0: kpu@40800000 { 167 compatible = "kendryte,k210-kpu"; 168 reg = <0x40800000 0xc00000>; 169 interrupts = <25>; 170 clocks = <&sysclk K210_CLK_AI>; 171 status = "disabled"; 172 }; 173 174 fft0: fft@42000000 { 175 compatible = "kendryte,k210-fft"; 176 reg = <0x42000000 0x400000>; 177 interrupts = <26>; 178 clocks = <&sysclk K210_CLK_FFT>; 179 resets = <&sysrst K210_RST_FFT>; 180 status = "disabled"; 181 }; 182 183 dmac0: dma-controller@50000000 { 184 compatible = "kendryte,k210-dmac", "snps,axi-dma-1.01a"; 185 reg = <0x50000000 0x1000>; 186 interrupts = <27 28 29 30 31 32>; 187 clocks = <&sysclk K210_CLK_DMA>, <&sysclk K210_CLK_DMA>; 188 clock-names = "core-clk", "cfgr-clk"; 189 resets = <&sysrst K210_RST_DMA>; 190 dma-channels = <6>; 191 snps,dma-masters = <2>; 192 snps,data-width = <5>; 193 snps,block-size = <0x200000 0x200000 0x200000 194 0x200000 0x200000 0x200000>; 195 snps,axi-max-burst-len = <256>; 196 status = "disabled"; 197 }; 198 199 apb0: bus@50200000 { 200 #address-cells = <1>; 201 #size-cells = <1>; 202 compatible = "kendryte,k210-apb", "simple-pm-bus"; 203 ranges; 204 clocks = <&sysclk K210_CLK_APB0>; 205 206 gpio1: gpio-controller@50200000 { 207 #address-cells = <1>; 208 #size-cells = <0>; 209 compatible = "kendryte,k210-gpio", 210 "snps,dw-apb-gpio"; 211 reg = <0x50200000 0x80>; 212 clocks = <&sysclk K210_CLK_GPIO>; 213 resets = <&sysrst K210_RST_GPIO>; 214 status = "disabled"; 215 216 gpio1_0: gpio1@0 { 217 #gpio-cells = <2>; 218 #interrupt-cells = <2>; 219 compatible = "snps,dw-apb-gpio-port"; 220 reg = <0>; 221 interrupt-controller; 222 interrupts = <23>; 223 gpio-controller; 224 snps,nr-gpios = <8>; 225 }; 226 }; 227 228 uart1: serial@50210000 { 229 compatible = "kendryte,k210-uart", 230 "snps,dw-apb-uart"; 231 reg = <0x50210000 0x100>; 232 interrupts = <11>; 233 clocks = <&sysclk K210_CLK_UART1>; 234 resets = <&sysrst K210_RST_UART1>; 235 reg-io-width = <4>; 236 reg-shift = <2>; 237 dcd-override; 238 dsr-override; 239 cts-override; 240 ri-override; 241 status = "disabled"; 242 }; 243 244 uart2: serial@50220000 { 245 compatible = "kendryte,k210-uart", 246 "snps,dw-apb-uart"; 247 reg = <0x50220000 0x100>; 248 interrupts = <12>; 249 clocks = <&sysclk K210_CLK_UART2>; 250 resets = <&sysrst K210_RST_UART2>; 251 reg-io-width = <4>; 252 reg-shift = <2>; 253 dcd-override; 254 dsr-override; 255 cts-override; 256 ri-override; 257 status = "disabled"; 258 }; 259 260 uart3: serial@50230000 { 261 compatible = "kendryte,k210-uart", 262 "snps,dw-apb-uart"; 263 reg = <0x50230000 0x100>; 264 interrupts = <13>; 265 clocks = <&sysclk K210_CLK_UART3>; 266 resets = <&sysrst K210_RST_UART3>; 267 reg-io-width = <4>; 268 reg-shift = <2>; 269 dcd-override; 270 dsr-override; 271 cts-override; 272 ri-override; 273 status = "disabled"; 274 }; 275 276 spi2: spi@50240000 { 277 compatible = "canaan,kendryte-k210-spi", 278 "snps,dw-apb-ssi-4.01", 279 "snps,dw-apb-ssi"; 280 spi-slave; 281 reg = <0x50240000 0x100>; 282 interrupts = <2>; 283 clocks = <&sysclk K210_CLK_SPI2>; 284 resets = <&sysrst K210_RST_SPI2>; 285 spi-max-frequency = <25000000>; 286 status = "disabled"; 287 }; 288 289 i2s0: i2s@50250000 { 290 compatible = "kendryte,k210-i2s", 291 "snps,designware-i2s"; 292 reg = <0x50250000 0x200>; 293 interrupts = <5>; 294 clocks = <&sysclk K210_CLK_I2S0>; 295 clock-names = "i2sclk"; 296 resets = <&sysrst K210_RST_I2S0>; 297 status = "disabled"; 298 }; 299 300 apu0: sound@520250200 { 301 compatible = "kendryte,k210-apu"; 302 reg = <0x50250200 0x200>; 303 status = "disabled"; 304 }; 305 306 i2s1: i2s@50260000 { 307 compatible = "kendryte,k210-i2s", 308 "snps,designware-i2s"; 309 reg = <0x50260000 0x200>; 310 interrupts = <6>; 311 clocks = <&sysclk K210_CLK_I2S1>; 312 clock-names = "i2sclk"; 313 resets = <&sysrst K210_RST_I2S1>; 314 status = "disabled"; 315 }; 316 317 i2s2: i2s@50270000 { 318 compatible = "kendryte,k210-i2s", 319 "snps,designware-i2s"; 320 reg = <0x50270000 0x200>; 321 interrupts = <7>; 322 clocks = <&sysclk K210_CLK_I2S2>; 323 clock-names = "i2sclk"; 324 resets = <&sysrst K210_RST_I2S2>; 325 status = "disabled"; 326 }; 327 328 i2c0: i2c@50280000 { 329 compatible = "kendryte,k210-i2c", 330 "snps,designware-i2c"; 331 reg = <0x50280000 0x100>; 332 interrupts = <8>; 333 clocks = <&sysclk K210_CLK_I2C0>; 334 resets = <&sysrst K210_RST_I2C0>; 335 status = "disabled"; 336 }; 337 338 i2c1: i2c@50290000 { 339 compatible = "kendryte,k210-i2c", 340 "snps,designware-i2c"; 341 reg = <0x50290000 0x100>; 342 interrupts = <9>; 343 clocks = <&sysclk K210_CLK_I2C1>; 344 resets = <&sysrst K210_RST_I2C1>; 345 status = "disabled"; 346 }; 347 348 i2c2: i2c@502A0000 { 349 compatible = "kendryte,k210-i2c", 350 "snps,designware-i2c"; 351 reg = <0x502A0000 0x100>; 352 interrupts = <10>; 353 clocks = <&sysclk K210_CLK_I2C2>; 354 resets = <&sysrst K210_RST_I2C2>; 355 status = "disabled"; 356 }; 357 358 fpioa: pinmux@502B0000 { 359 compatible = "kendryte,k210-fpioa"; 360 reg = <0x502B0000 0x100>; 361 clocks = <&sysclk K210_CLK_FPIOA>; 362 resets = <&sysrst K210_RST_FPIOA>; 363 kendryte,sysctl = <&sysctl>; 364 kendryte,power-offset = <K210_SYSCTL_POWER_SEL>; 365 pinctrl-0 = <&fpioa_jtag>; 366 pinctrl-names = "default"; 367 status = "disabled"; 368 369 fpioa_jtag: jtag { 370 pinmux = <K210_FPIOA(0, K210_PCF_JTAG_TCLK)>, 371 <K210_FPIOA(1, K210_PCF_JTAG_TDI)>, 372 <K210_FPIOA(2, K210_PCF_JTAG_TMS)>, 373 <K210_FPIOA(3, K210_PCF_JTAG_TDO)>; 374 }; 375 }; 376 377 sha256: sha256@502C0000 { 378 compatible = "kendryte,k210-sha256"; 379 reg = <0x502C0000 0x100>; 380 clocks = <&sysclk K210_CLK_SHA>; 381 resets = <&sysrst K210_RST_SHA>; 382 status = "disabled"; 383 }; 384 385 timer0: timer@502D0000 { 386 compatible = "kendryte,k210-timer", 387 "snps,dw-apb-timer"; 388 reg = <0x502D0000 0x100>; 389 interrupts = <14 15>; 390 clocks = <&sysclk K210_CLK_TIMER0>; 391 clock-names = "timer"; 392 resets = <&sysrst K210_RST_TIMER0>; 393 status = "disabled"; 394 }; 395 396 timer1: timer@502E0000 { 397 compatible = "kendryte,k210-timer", 398 "snps,dw-apb-timer"; 399 reg = <0x502E0000 0x100>; 400 interrupts = <16 17>; 401 clocks = <&sysclk K210_CLK_TIMER1>; 402 clock-names = "timer"; 403 resets = <&sysrst K210_RST_TIMER1>; 404 status = "disabled"; 405 }; 406 407 timer2: timer@502F0000 { 408 compatible = "kendryte,k210-timer", 409 "snps,dw-apb-timer"; 410 reg = <0x502F0000 0x100>; 411 interrupts = <18 19>; 412 clocks = <&sysclk K210_CLK_TIMER2>; 413 clock-names = "timer"; 414 resets = <&sysrst K210_RST_TIMER2>; 415 status = "disabled"; 416 }; 417 }; 418 419 apb1: bus@50400000 { 420 #address-cells = <1>; 421 #size-cells = <1>; 422 compatible = "kendryte,k210-apb", "simple-pm-bus"; 423 ranges; 424 clocks = <&sysclk K210_CLK_APB1>; 425 426 wdt0: watchdog@50400000 { 427 compatible = "kendryte,k210-wdt", "snps,dw-wdt"; 428 reg = <0x50400000 0x100>; 429 interrupts = <21>; 430 clocks = <&sysclk K210_CLK_WDT0>; 431 resets = <&sysrst K210_RST_WDT0>; 432 }; 433 434 wdt1: watchdog@50410000 { 435 compatible = "kendryte,k210-wdt", "snps,dw-wdt"; 436 reg = <0x50410000 0x100>; 437 interrupts = <22>; 438 clocks = <&sysclk K210_CLK_WDT1>; 439 resets = <&sysrst K210_RST_WDT1>; 440 status = "disabled"; 441 }; 442 443 otp0: nvmem@50420000 { 444 #address-cells = <1>; 445 #size-cells = <1>; 446 compatible = "kendryte,k210-otp"; 447 reg = <0x50420000 0x100>, 448 <0x88000000 0x20000>; 449 reg-names = "reg", "mem"; 450 clocks = <&sysclk K210_CLK_ROM>; 451 resets = <&sysrst K210_RST_ROM>; 452 read-only; 453 status = "disabled"; 454 455 /* Bootloader */ 456 firmware@00000 { 457 reg = <0x00000 0xC200>; 458 }; 459 460 /* 461 * config string as described in RISC-V 462 * privileged spec 1.9 463 */ 464 config-1-9@1c000 { 465 reg = <0x1C000 0x1000>; 466 }; 467 468 /* 469 * Device tree containing only registers, 470 * interrupts, and cpus 471 */ 472 fdt@1d000 { 473 reg = <0x1D000 0x2000>; 474 }; 475 476 /* CPU/ROM credits */ 477 credits@1f000 { 478 reg = <0x1F000 0x1000>; 479 }; 480 }; 481 482 dvp0: camera@50430000 { 483 compatible = "kendryte,k210-dvp"; 484 reg = <0x50430000 0x100>; 485 interrupts = <24>; 486 clocks = <&sysclk K210_CLK_DVP>; 487 resets = <&sysrst K210_RST_DVP>; 488 kendryte,sysctl = <&sysctl>; 489 kendryte,misc-offset = <K210_SYSCTL_MISC>; 490 status = "disabled"; 491 }; 492 493 sysctl: syscon@50440000 { 494 compatible = "kendryte,k210-sysctl", 495 "syscon", "simple-mfd"; 496 reg = <0x50440000 0x100>; 497 reg-io-width = <4>; 498 u-boot,dm-pre-reloc; 499 500 sysclk: clock-controller { 501 #clock-cells = <1>; 502 compatible = "kendryte,k210-clk"; 503 clocks = <&in0>; 504 u-boot,dm-pre-reloc; 505 }; 506 507 sysrst: reset-controller { 508 compatible = "kendryte,k210-rst", 509 "syscon-reset"; 510 #reset-cells = <1>; 511 regmap = <&sysctl>; 512 offset = <K210_SYSCTL_PERI_RESET>; 513 mask = <0x27FFFFFF>; 514 assert-high = <1>; 515 }; 516 517 reboot { 518 compatible = "syscon-reboot"; 519 regmap = <&sysctl>; 520 offset = <K210_SYSCTL_SOFT_RESET>; 521 mask = <1>; 522 value = <1>; 523 }; 524 }; 525 526 aes0: aes@50450000 { 527 compatible = "kendryte,k210-aes"; 528 reg = <0x50450000 0x100>; 529 clocks = <&sysclk K210_CLK_AES>; 530 resets = <&sysrst K210_RST_AES>; 531 status = "disabled"; 532 }; 533 534 rtc: rtc@50460000 { 535 compatible = "kendryte,k210-rtc"; 536 reg = <0x50460000 0x100>; 537 clocks = <&in0>; 538 resets = <&sysrst K210_RST_RTC>; 539 interrupts = <20>; 540 status = "disabled"; 541 }; 542 }; 543 544 apb2: bus@52000000 { 545 #address-cells = <1>; 546 #size-cells = <1>; 547 compatible = "kendryte,k210-apb", "simple-pm-bus"; 548 ranges; 549 clocks = <&sysclk K210_CLK_APB2>; 550 551 spi0: spi@52000000 { 552 #address-cells = <1>; 553 #size-cells = <0>; 554 compatible = "canaan,kendryte-k210-spi", 555 "snps,dw-apb-ssi-4.01", 556 "snps,dw-apb-ssi"; 557 reg = <0x52000000 0x100>; 558 interrupts = <1>; 559 clocks = <&sysclk K210_CLK_SPI0>; 560 clock-names = "ssi_clk"; 561 resets = <&sysrst K210_RST_SPI0>; 562 spi-max-frequency = <25000000>; 563 num-cs = <4>; 564 reg-io-width = <4>; 565 status = "disabled"; 566 }; 567 568 spi1: spi@53000000 { 569 #address-cells = <1>; 570 #size-cells = <0>; 571 compatible = "canaan,kendryte-k210-spi", 572 "snps,dw-apb-ssi-4.01", 573 "snps,dw-apb-ssi"; 574 reg = <0x53000000 0x100>; 575 interrupts = <2>; 576 clocks = <&sysclk K210_CLK_SPI1>; 577 clock-names = "ssi_clk"; 578 resets = <&sysrst K210_RST_SPI1>; 579 spi-max-frequency = <25000000>; 580 num-cs = <4>; 581 reg-io-width = <4>; 582 status = "disabled"; 583 }; 584 585 spi3: spi@54000000 { 586 #address-cells = <1>; 587 #size-cells = <0>; 588 compatible = "canaan,kendryte-k210-ssi", 589 "snps,dwc-ssi-1.01a"; 590 reg = <0x54000000 0x200>; 591 interrupts = <4>; 592 clocks = <&sysclk K210_CLK_SPI3>; 593 clock-names = "ssi_clk"; 594 resets = <&sysrst K210_RST_SPI3>; 595 /* Could possibly go up to 200 MHz */ 596 spi-max-frequency = <100000000>; 597 num-cs = <4>; 598 reg-io-width = <4>; 599 status = "disabled"; 600 }; 601 }; 602 }; 603}; 604