1 /* originally from linux source.
2  * removed the dependencies on CONFIG_ values
3  * removed virt_to_phys stuff (and in fact everything surrounded by #if __KERNEL__)
4  * Modified By Rob Taylor, Flying Pig Systems, 2000
5  */
6 
7 #ifndef _PPC_IO_H
8 #define _PPC_IO_H
9 
10 #include <asm/byteorder.h>
11 
12 #ifdef CONFIG_ADDR_MAP
13 #include <asm/global_data.h>
14 #include <addr_map.h>
15 
16 DECLARE_GLOBAL_DATA_PTR;
17 #endif
18 
19 #define SIO_CONFIG_RA   0x398
20 #define SIO_CONFIG_RD   0x399
21 
22 #ifndef _IO_BASE
23 #define _IO_BASE 0
24 #endif
25 
26 #define readb(addr) in_8((volatile u8 *)(addr))
27 #define writeb(b,addr) out_8((volatile u8 *)(addr), (b))
28 #if !defined(__BIG_ENDIAN)
29 #define readw(addr) (*(volatile u16 *) (addr))
30 #define readl(addr) (*(volatile u32 *) (addr))
31 #define writew(b,addr) ((*(volatile u16 *) (addr)) = (b))
32 #define writel(b,addr) ((*(volatile u32 *) (addr)) = (b))
33 #else
34 #define readw(addr) in_le16((volatile u16 *)(addr))
35 #define readl(addr) in_le32((volatile u32 *)(addr))
36 #define writew(b,addr) out_le16((volatile u16 *)(addr),(b))
37 #define writel(b,addr) out_le32((volatile u32 *)(addr),(b))
38 #endif
39 
40 /*
41  * The insw/outsw/insl/outsl macros don't do byte-swapping.
42  * They are only used in practice for transferring buffers which
43  * are arrays of bytes, and byte-swapping is not appropriate in
44  * that case.  - paulus
45  */
46 #define insb(port, buf, ns) _insb((u8 *)((port)+_IO_BASE), (buf), (ns))
47 #define outsb(port, buf, ns)    _outsb((u8 *)((port)+_IO_BASE), (buf), (ns))
48 #define insw(port, buf, ns) _insw_ns((u16 *)((port)+_IO_BASE), (buf), (ns))
49 #define outsw(port, buf, ns)    _outsw_ns((u16 *)((port)+_IO_BASE), (buf), (ns))
50 #define insl(port, buf, nl) _insl_ns((u32 *)((port)+_IO_BASE), (buf), (nl))
51 #define outsl(port, buf, nl)    _outsl_ns((u32 *)((port)+_IO_BASE), (buf), (nl))
52 
53 #define inb(port)       in_8((u8 *)((port)+_IO_BASE))
54 #define outb(val, port)     out_8((u8 *)((port)+_IO_BASE), (val))
55 #if !defined(__BIG_ENDIAN)
56 #define inw(port)       in_be16((u16 *)((port)+_IO_BASE))
57 #define outw(val, port)     out_be16((u16 *)((port)+_IO_BASE), (val))
58 #define inl(port)       in_be32((u32 *)((port)+_IO_BASE))
59 #define outl(val, port)     out_be32((u32 *)((port)+_IO_BASE), (val))
60 #else
61 #define inw(port)       in_le16((u16 *)((port)+_IO_BASE))
62 #define outw(val, port)     out_le16((u16 *)((port)+_IO_BASE), (val))
63 #define inl(port)       in_le32((u32 *)((port)+_IO_BASE))
64 #define outl(val, port)     out_le32((u32 *)((port)+_IO_BASE), (val))
65 #endif
66 
67 #define inb_p(port)     in_8((u8 *)((port)+_IO_BASE))
68 #define outb_p(val, port)   out_8((u8 *)((port)+_IO_BASE), (val))
69 #define inw_p(port)     in_le16((u16 *)((port)+_IO_BASE))
70 #define outw_p(val, port)   out_le16((u16 *)((port)+_IO_BASE), (val))
71 #define inl_p(port)     in_le32((u32 *)((port)+_IO_BASE))
72 #define outl_p(val, port)   out_le32((u32 *)((port)+_IO_BASE), (val))
73 
74 extern void _insb(volatile u8 *port, void *buf, int ns);
75 extern void _outsb(volatile u8 *port, const void *buf, int ns);
76 extern void _insw(volatile u16 *port, void *buf, int ns);
77 extern void _outsw(volatile u16 *port, const void *buf, int ns);
78 extern void _insl(volatile u32 *port, void *buf, int nl);
79 extern void _outsl(volatile u32 *port, const void *buf, int nl);
80 extern void _insw_ns(volatile u16 *port, void *buf, int ns);
81 extern void _outsw_ns(volatile u16 *port, const void *buf, int ns);
82 extern void _insl_ns(volatile u32 *port, void *buf, int nl);
83 extern void _outsl_ns(volatile u32 *port, const void *buf, int nl);
84 
85 /*
86  * The *_ns versions below don't do byte-swapping.
87  * Neither do the standard versions now, these are just here
88  * for older code.
89  */
90 #define insw_ns(port, buf, ns)  _insw_ns((u16 *)((port)+_IO_BASE), (buf), (ns))
91 #define outsw_ns(port, buf, ns) _outsw_ns((u16 *)((port)+_IO_BASE), (buf), (ns))
92 #define insl_ns(port, buf, nl)  _insl_ns((u32 *)((port)+_IO_BASE), (buf), (nl))
93 #define outsl_ns(port, buf, nl) _outsl_ns((u32 *)((port)+_IO_BASE), (buf), (nl))
94 
95 
96 #define IO_SPACE_LIMIT ~0
97 
98 #define memset_io(a,b,c)       memset((void *)(a),(b),(c))
99 #define memcpy_fromio(a,b,c)   memcpy((a),(void *)(b),(c))
100 #define memcpy_toio(a,b,c)  memcpy((void *)(a),(b),(c))
101 
102 /*
103  * Enforce In-order Execution of I/O:
104  * Acts as a barrier to ensure all previous I/O accesses have
105  * completed before any further ones are issued.
106  */
eieio(void)107 static inline void eieio(void)
108 {
109 	__asm__ __volatile__ ("eieio" : : : "memory");
110 }
111 
sync(void)112 static inline void sync(void)
113 {
114 	__asm__ __volatile__ ("sync" : : : "memory");
115 }
116 
isync(void)117 static inline void isync(void)
118 {
119 	__asm__ __volatile__ ("isync" : : : "memory");
120 }
121 
122 /* Enforce in-order execution of data I/O.
123  * No distinction between read/write on PPC; use eieio for all three.
124  */
125 #define iobarrier_rw() eieio()
126 #define iobarrier_r()  eieio()
127 #define iobarrier_w()  eieio()
128 
129 #define mb()	sync()
130 #define isb()	isync()
131 
132 /*
133  * Non ordered and non-swapping "raw" accessors
134  */
135 #define PCI_FIX_ADDR(addr)	(addr)
136 
__raw_readb(const volatile void __iomem * addr)137 static inline unsigned char __raw_readb(const volatile void __iomem *addr)
138 {
139 	return *(volatile unsigned char *)PCI_FIX_ADDR(addr);
140 }
__raw_readw(const volatile void __iomem * addr)141 static inline unsigned short __raw_readw(const volatile void __iomem *addr)
142 {
143 	return *(volatile unsigned short *)PCI_FIX_ADDR(addr);
144 }
__raw_readl(const volatile void __iomem * addr)145 static inline unsigned int __raw_readl(const volatile void __iomem *addr)
146 {
147 	return *(volatile unsigned int *)PCI_FIX_ADDR(addr);
148 }
__raw_writeb(unsigned char v,volatile void __iomem * addr)149 static inline void __raw_writeb(unsigned char v, volatile void __iomem *addr)
150 {
151 	*(volatile unsigned char *)PCI_FIX_ADDR(addr) = v;
152 }
__raw_writew(unsigned short v,volatile void __iomem * addr)153 static inline void __raw_writew(unsigned short v, volatile void __iomem *addr)
154 {
155 	*(volatile unsigned short *)PCI_FIX_ADDR(addr) = v;
156 }
__raw_writel(unsigned int v,volatile void __iomem * addr)157 static inline void __raw_writel(unsigned int v, volatile void __iomem *addr)
158 {
159 	*(volatile unsigned int *)PCI_FIX_ADDR(addr) = v;
160 }
161 
162 /*
163  * 8, 16 and 32 bit, big and little endian I/O operations, with barrier.
164  *
165  * Read operations have additional twi & isync to make sure the read
166  * is actually performed (i.e. the data has come back) before we start
167  * executing any following instructions.
168  */
in_8(const volatile unsigned char __iomem * addr)169 static inline u8 in_8(const volatile unsigned char __iomem *addr)
170 {
171 	u8 ret;
172 
173 	__asm__ __volatile__(
174 		"sync; lbz%U1%X1 %0,%1;\n"
175 		"twi 0,%0,0;\n"
176 		"isync" : "=r" (ret) : "m" (*addr));
177 	return ret;
178 }
179 
out_8(volatile unsigned char __iomem * addr,u8 val)180 static inline void out_8(volatile unsigned char __iomem *addr, u8 val)
181 {
182 	__asm__ __volatile__("sync;\n"
183 			     "stb%U0%X0 %1,%0;\n"
184 			     : "=m" (*addr)
185 			     : "r" (val));
186 }
187 
in_le16(const volatile unsigned short __iomem * addr)188 static inline u16 in_le16(const volatile unsigned short __iomem *addr)
189 {
190 	u16 ret;
191 
192 	__asm__ __volatile__("sync; lhbrx %0,0,%1;\n"
193 			     "twi 0,%0,0;\n"
194 			     "isync" : "=r" (ret) :
195 			      "r" (addr), "m" (*addr));
196 	return ret;
197 }
198 
in_be16(const volatile unsigned short __iomem * addr)199 static inline u16 in_be16(const volatile unsigned short __iomem *addr)
200 {
201 	u16 ret;
202 
203 	__asm__ __volatile__("sync; lhz%U1%X1 %0,%1;\n"
204 			     "twi 0,%0,0;\n"
205 			     "isync" : "=r" (ret) : "m" (*addr));
206 	return ret;
207 }
208 
out_le16(volatile unsigned short __iomem * addr,u16 val)209 static inline void out_le16(volatile unsigned short __iomem *addr, u16 val)
210 {
211 	__asm__ __volatile__("sync; sthbrx %1,0,%2" : "=m" (*addr) :
212 			      "r" (val), "r" (addr));
213 }
214 
out_be16(volatile unsigned short __iomem * addr,u16 val)215 static inline void out_be16(volatile unsigned short __iomem *addr, u16 val)
216 {
217 	__asm__ __volatile__("sync; sth%U0%X0 %1,%0" : "=m" (*addr) : "r" (val));
218 }
219 
in_le32(const volatile unsigned __iomem * addr)220 static inline u32 in_le32(const volatile unsigned __iomem *addr)
221 {
222 	u32 ret;
223 
224 	__asm__ __volatile__("sync; lwbrx %0,0,%1;\n"
225 			     "twi 0,%0,0;\n"
226 			     "isync" : "=r" (ret) :
227 			     "r" (addr), "m" (*addr));
228 	return ret;
229 }
230 
in_be32(const volatile unsigned __iomem * addr)231 static inline u32 in_be32(const volatile unsigned __iomem *addr)
232 {
233 	u32 ret;
234 
235 	__asm__ __volatile__("sync; lwz%U1%X1 %0,%1;\n"
236 			     "twi 0,%0,0;\n"
237 			     "isync" : "=r" (ret) : "m" (*addr));
238 	return ret;
239 }
240 
out_le32(volatile unsigned __iomem * addr,u32 val)241 static inline void out_le32(volatile unsigned __iomem *addr, u32 val)
242 {
243 	__asm__ __volatile__("sync; stwbrx %1,0,%2" : "=m" (*addr) :
244 			     "r" (val), "r" (addr));
245 }
246 
out_be32(volatile unsigned __iomem * addr,u32 val)247 static inline void out_be32(volatile unsigned __iomem *addr, u32 val)
248 {
249 	__asm__ __volatile__("sync; stw%U0%X0 %1,%0" : "=m" (*addr) : "r" (val));
250 }
251 
252 /* Clear and set bits in one shot. These macros can be used to clear and
253  * set multiple bits in a register using a single call. These macros can
254  * also be used to set a multiple-bit bit pattern using a mask, by
255  * specifying the mask in the 'clear' parameter and the new bit pattern
256  * in the 'set' parameter.
257  */
258 
259 #define clrbits(type, addr, clear) \
260 	out_##type((addr), in_##type(addr) & ~(clear))
261 
262 #define setbits(type, addr, set) \
263 	out_##type((addr), in_##type(addr) | (set))
264 
265 #define clrsetbits(type, addr, clear, set) \
266 	out_##type((addr), (in_##type(addr) & ~(clear)) | (set))
267 
268 #define clrbits_be32(addr, clear) clrbits(be32, addr, clear)
269 #define setbits_be32(addr, set) setbits(be32, addr, set)
270 #define clrsetbits_be32(addr, clear, set) clrsetbits(be32, addr, clear, set)
271 
272 #define clrbits_le32(addr, clear) clrbits(le32, addr, clear)
273 #define setbits_le32(addr, set) setbits(le32, addr, set)
274 #define clrsetbits_le32(addr, clear, set) clrsetbits(le32, addr, clear, set)
275 
276 #define clrbits_be16(addr, clear) clrbits(be16, addr, clear)
277 #define setbits_be16(addr, set) setbits(be16, addr, set)
278 #define clrsetbits_be16(addr, clear, set) clrsetbits(be16, addr, clear, set)
279 
280 #define clrbits_le16(addr, clear) clrbits(le16, addr, clear)
281 #define setbits_le16(addr, set) setbits(le16, addr, set)
282 #define clrsetbits_le16(addr, clear, set) clrsetbits(le16, addr, clear, set)
283 
284 #define clrbits_8(addr, clear) clrbits(8, addr, clear)
285 #define setbits_8(addr, set) setbits(8, addr, set)
286 #define clrsetbits_8(addr, clear, set) clrsetbits(8, addr, clear, set)
287 
288 #define readb_be(addr)							\
289 	__raw_readb((__force unsigned *)(addr))
290 #define readw_be(addr)							\
291 	be16_to_cpu(__raw_readw((__force unsigned *)(addr)))
292 #define readl_be(addr)							\
293 	be32_to_cpu(__raw_readl((__force unsigned *)(addr)))
294 #define readq_be(addr)							\
295 	be64_to_cpu(__raw_readq((__force unsigned *)(addr)))
296 
297 #define writeb_be(val, addr)						\
298 	__raw_writeb((val), (__force unsigned *)(addr))
299 #define writew_be(val, addr)						\
300 	__raw_writew(cpu_to_be16((val)), (__force unsigned *)(addr))
301 #define writel_be(val, addr)						\
302 	__raw_writel(cpu_to_be32((val)), (__force unsigned *)(addr))
303 #define writeq_be(val, addr)						\
304 	__raw_writeq(cpu_to_be64((val)), (__force unsigned *)(addr))
305 
phys_to_virt(phys_addr_t paddr)306 static inline void *phys_to_virt(phys_addr_t paddr)
307 {
308 #ifdef CONFIG_ADDR_MAP
309 	if (gd->flags & GD_FLG_RELOC)
310 		return addrmap_phys_to_virt(paddr);
311 #endif
312 	return (void *)((unsigned long)paddr);
313 }
314 #define phys_to_virt phys_to_virt
315 
virt_to_phys(void * vaddr)316 static inline phys_addr_t virt_to_phys(void * vaddr)
317 {
318 #ifdef CONFIG_ADDR_MAP
319 	if (gd->flags & GD_FLG_RELOC)
320 		return addrmap_virt_to_phys(vaddr);
321 #endif
322 	return (phys_addr_t)((unsigned long)vaddr);
323 }
324 #define virt_to_phys virt_to_phys
325 
326 #include <asm-generic/io.h>
327 
328 #endif
329