1/*
2 * Device Tree file for Marvell Armada 385 development board
3 * (RD-88F6820-GP)
4 *
5 * Copyright (C) 2014 Marvell
6 *
7 * Gregory CLEMENT <gregory.clement@free-electrons.com>
8 *
9 * This file is dual-licensed: you can use it either under the terms
10 * of the GPL or the X11 license, at your option. Note that this dual
11 * licensing only applies to this file, and not this project as a
12 * whole.
13 *
14 *  a) This file is licensed under the terms of the GNU General Public
15 *     License version 2.  This program is licensed "as is" without
16 *     any warranty of any kind, whether express or implied.
17 *
18 * Or, alternatively,
19 *
20 *  b) Permission is hereby granted, free of charge, to any person
21 *     obtaining a copy of this software and associated documentation
22 *     files (the "Software"), to deal in the Software without
23 *     restriction, including without limitation the rights to use,
24 *     copy, modify, merge, publish, distribute, sublicense, and/or
25 *     sell copies of the Software, and to permit persons to whom the
26 *     Software is furnished to do so, subject to the following
27 *     conditions:
28 *
29 *     The above copyright notice and this permission notice shall be
30 *     included in all copies or substantial portions of the Software.
31 *
32 *     THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND,
33 *     EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES
34 *     OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND
35 *     NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT
36 *     HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY,
37 *     WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING
38 *     FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR
39 *     OTHER DEALINGS IN THE SOFTWARE.
40 */
41
42/dts-v1/;
43#include "armada-388.dtsi"
44#include <dt-bindings/gpio/gpio.h>
45
46/ {
47	model = "Marvell Armada 385 GP";
48	compatible = "marvell,a385-gp", "marvell,armada388", "marvell,armada380";
49
50	chosen {
51		stdout-path = "serial0:115200n8";
52	};
53
54	aliases {
55		ethernet0 = &eth0;
56		ethernet1 = &eth1;
57		spi0 = &spi0;
58	};
59
60	memory {
61		device_type = "memory";
62		reg = <0x00000000 0x80000000>; /* 2 GB */
63	};
64
65	soc {
66		ranges = <MBUS_ID(0xf0, 0x01) 0 0xf1000000 0x100000
67			  MBUS_ID(0x01, 0x1d) 0 0xfff00000 0x100000>;
68
69		internal-regs {
70			spi@10600 {
71				pinctrl-names = "default";
72				pinctrl-0 = <&spi0_pins>;
73				status = "okay";
74				u-boot,dm-pre-reloc;
75				#address-cells = <1>;
76				#size-cells = <0>;
77
78				spi-flash@0 {
79					u-boot,dm-pre-reloc;
80					#address-cells = <1>;
81					#size-cells = <1>;
82					compatible = "st,m25p128", "jedec,spi-nor";
83					reg = <0>; /* Chip select 0 */
84					spi-max-frequency = <50000000>;
85					m25p,fast-read;
86				};
87			};
88
89			i2c@11000 {
90				pinctrl-names = "default";
91				pinctrl-0 = <&i2c0_pins>;
92				status = "okay";
93				clock-frequency = <100000>;
94				/*
95				 * The EEPROM located at adresse 54 is needed
96				 * for the boot - DO NOT ERASE IT -
97				 */
98
99				expander0: pca9555@20 {
100					compatible = "nxp,pca9555";
101					pinctrl-names = "default";
102					pinctrl-0 = <&pca0_pins>;
103					interrupt-parent = <&gpio0>;
104					interrupts = <18 IRQ_TYPE_EDGE_FALLING>;
105					gpio-controller;
106					#gpio-cells = <2>;
107					interrupt-controller;
108					#interrupt-cells = <2>;
109					reg = <0x20>;
110				};
111
112				expander1: pca9555@21 {
113					compatible = "nxp,pca9555";
114					pinctrl-names = "default";
115					interrupt-parent = <&gpio0>;
116					interrupts = <18 IRQ_TYPE_EDGE_FALLING>;
117					gpio-controller;
118					#gpio-cells = <2>;
119					interrupt-controller;
120					#interrupt-cells = <2>;
121					reg = <0x21>;
122				};
123
124			};
125
126			serial@12000 {
127				/*
128				 * Exported on the micro USB connector CON16
129				 * through an FTDI
130				 */
131
132				pinctrl-names = "default";
133				pinctrl-0 = <&uart0_pins>;
134				status = "okay";
135				u-boot,dm-pre-reloc;
136			};
137
138			/* GE1 CON15 */
139			ethernet@30000 {
140				pinctrl-names = "default";
141				pinctrl-0 = <&ge1_rgmii_pins>;
142				status = "okay";
143				phy = <&phy1>;
144				phy-mode = "rgmii-id";
145			};
146
147			/* CON4 */
148			usb@58000 {
149				vcc-supply = <&reg_usb2_0_vbus>;
150				status = "okay";
151			};
152
153			/* GE0 CON1 */
154			ethernet@70000 {
155				pinctrl-names = "default";
156				/*
157				 * The Reference Clock 0 is used to provide a
158				 * clock to the PHY
159				 */
160				pinctrl-0 = <&ge0_rgmii_pins>, <&ref_clk0_pins>;
161				status = "okay";
162				phy = <&phy0>;
163				phy-mode = "rgmii-id";
164			};
165
166
167			mdio@72004 {
168				pinctrl-names = "default";
169				pinctrl-0 = <&mdio_pins>;
170
171				phy0: ethernet-phy@1 {
172					reg = <1>;
173				};
174
175				phy1: ethernet-phy@0 {
176					reg = <0>;
177				};
178			};
179
180			sata@a8000 {
181				pinctrl-names = "default";
182				pinctrl-0 = <&sata0_pins>, <&sata1_pins>;
183				status = "okay";
184				#address-cells = <1>;
185				#size-cells = <0>;
186
187				sata0: sata-port@0 {
188					reg = <0>;
189					target-supply = <&reg_5v_sata0>;
190				};
191
192				sata1: sata-port@1 {
193					reg = <1>;
194					target-supply = <&reg_5v_sata1>;
195				};
196			};
197
198			sata@e0000 {
199				pinctrl-names = "default";
200				pinctrl-0 = <&sata2_pins>, <&sata3_pins>;
201				status = "okay";
202				#address-cells = <1>;
203				#size-cells = <0>;
204
205				sata2: sata-port@0 {
206					reg = <0>;
207					target-supply = <&reg_5v_sata2>;
208				};
209
210				sata3: sata-port@1 {
211					reg = <1>;
212					target-supply = <&reg_5v_sata3>;
213				};
214			};
215
216			sdhci@d8000 {
217				pinctrl-names = "default";
218				pinctrl-0 = <&sdhci_pins>;
219				cd-gpios = <&expander0 5 GPIO_ACTIVE_LOW>;
220				no-1-8-v;
221				wp-inverted;
222				bus-width = <8>;
223				status = "okay";
224			};
225
226			/* CON5 */
227			usb3@f0000 {
228				vcc-supply = <&reg_usb2_1_vbus>;
229				status = "okay";
230			};
231
232			/* CON7 */
233			usb3@f8000 {
234				vcc-supply = <&reg_usb3_vbus>;
235				status = "okay";
236			};
237		};
238
239		pcie {
240			status = "okay";
241			/*
242			 * One PCIe units is accessible through
243			 * standard PCIe slot on the board.
244			 */
245			pcie@1,0 {
246				/* Port 0, Lane 0 */
247				status = "okay";
248			};
249
250			/*
251			 * The two other PCIe units are accessible
252			 * through mini PCIe slot on the board.
253			 */
254			pcie@2,0 {
255				/* Port 1, Lane 0 */
256				status = "okay";
257			};
258			pcie@3,0 {
259				/* Port 2, Lane 0 */
260				status = "okay";
261			};
262		};
263
264		gpio-fan {
265			compatible = "gpio-fan";
266			gpios = <&expander1 3 GPIO_ACTIVE_HIGH>;
267			gpio-fan,speed-map = <	 0 0
268					      3000 1>;
269		};
270	};
271
272	reg_usb3_vbus: usb3-vbus {
273		compatible = "regulator-fixed";
274		regulator-name = "usb3-vbus";
275		regulator-min-microvolt = <5000000>;
276		regulator-max-microvolt = <5000000>;
277		enable-active-high;
278		regulator-always-on;
279		gpio = <&expander1 15 GPIO_ACTIVE_HIGH>;
280	};
281
282	reg_usb2_0_vbus: v5-vbus0 {
283		compatible = "regulator-fixed";
284		regulator-name = "v5.0-vbus0";
285		regulator-min-microvolt = <5000000>;
286		regulator-max-microvolt = <5000000>;
287		enable-active-high;
288		regulator-always-on;
289		gpio = <&expander1 14 GPIO_ACTIVE_HIGH>;
290	};
291
292	reg_usb2_1_vbus: v5-vbus1 {
293		compatible = "regulator-fixed";
294		regulator-name = "v5.0-vbus1";
295		regulator-min-microvolt = <5000000>;
296		regulator-max-microvolt = <5000000>;
297		enable-active-high;
298		regulator-always-on;
299		gpio = <&expander0 4 GPIO_ACTIVE_HIGH>;
300	};
301
302	reg_usb2_1_vbus: v5-vbus1 {
303		compatible = "regulator-fixed";
304		regulator-name = "v5.0-vbus1";
305		regulator-min-microvolt = <5000000>;
306		regulator-max-microvolt = <5000000>;
307		enable-active-high;
308		regulator-always-on;
309		gpio = <&expander0 4 GPIO_ACTIVE_HIGH>;
310	};
311
312	reg_sata0: pwr-sata0 {
313		compatible = "regulator-fixed";
314		regulator-name = "pwr_en_sata0";
315		enable-active-high;
316		regulator-always-on;
317
318	};
319
320	reg_5v_sata0: v5-sata0 {
321		compatible = "regulator-fixed";
322		regulator-name = "v5.0-sata0";
323		regulator-min-microvolt = <5000000>;
324		regulator-max-microvolt = <5000000>;
325		regulator-always-on;
326		vin-supply = <&reg_sata0>;
327	};
328
329	reg_12v_sata0: v12-sata0 {
330		compatible = "regulator-fixed";
331		regulator-name = "v12.0-sata0";
332		regulator-min-microvolt = <12000000>;
333		regulator-max-microvolt = <12000000>;
334		regulator-always-on;
335		vin-supply = <&reg_sata0>;
336	};
337
338	reg_sata1: pwr-sata1 {
339		regulator-name = "pwr_en_sata1";
340		compatible = "regulator-fixed";
341		regulator-min-microvolt = <12000000>;
342		regulator-max-microvolt = <12000000>;
343		enable-active-high;
344		regulator-always-on;
345		gpio = <&expander0 3 GPIO_ACTIVE_HIGH>;
346	};
347
348	reg_5v_sata1: v5-sata1 {
349		compatible = "regulator-fixed";
350		regulator-name = "v5.0-sata1";
351		regulator-min-microvolt = <5000000>;
352		regulator-max-microvolt = <5000000>;
353		regulator-always-on;
354		vin-supply = <&reg_sata1>;
355	};
356
357	reg_12v_sata1: v12-sata1 {
358		compatible = "regulator-fixed";
359		regulator-name = "v12.0-sata1";
360		regulator-min-microvolt = <12000000>;
361		regulator-max-microvolt = <12000000>;
362		regulator-always-on;
363		vin-supply = <&reg_sata1>;
364	};
365
366	reg_sata2: pwr-sata2 {
367		compatible = "regulator-fixed";
368		regulator-name = "pwr_en_sata2";
369		enable-active-high;
370		regulator-always-on;
371		gpio = <&expander0 11 GPIO_ACTIVE_HIGH>;
372	};
373
374	reg_5v_sata2: v5-sata2 {
375		compatible = "regulator-fixed";
376		regulator-name = "v5.0-sata2";
377		regulator-min-microvolt = <5000000>;
378		regulator-max-microvolt = <5000000>;
379		regulator-always-on;
380		vin-supply = <&reg_sata2>;
381	};
382
383	reg_12v_sata2: v12-sata2 {
384		compatible = "regulator-fixed";
385		regulator-name = "v12.0-sata2";
386		regulator-min-microvolt = <12000000>;
387		regulator-max-microvolt = <12000000>;
388		regulator-always-on;
389		vin-supply = <&reg_sata2>;
390	};
391
392	reg_sata3: pwr-sata3 {
393		compatible = "regulator-fixed";
394		regulator-name = "pwr_en_sata3";
395		enable-active-high;
396		regulator-always-on;
397		gpio = <&expander0 12 GPIO_ACTIVE_HIGH>;
398	};
399
400	reg_5v_sata3: v5-sata3 {
401		compatible = "regulator-fixed";
402		regulator-name = "v5.0-sata3";
403		regulator-min-microvolt = <5000000>;
404		regulator-max-microvolt = <5000000>;
405		regulator-always-on;
406		vin-supply = <&reg_sata3>;
407	};
408
409	reg_12v_sata3: v12-sata3 {
410		compatible = "regulator-fixed";
411		regulator-name = "v12.0-sata3";
412		regulator-min-microvolt = <12000000>;
413		regulator-max-microvolt = <12000000>;
414		regulator-always-on;
415		vin-supply = <&reg_sata3>;
416	};
417};
418
419&pinctrl {
420	pca0_pins: pca0_pins {
421		marvell,pins = "mpp18";
422		marvell,function = "gpio";
423	};
424};
425