1// SPDX-License-Identifier: GPL-2.0+ OR X11
2/*
3 * Device Tree Include file for Freescale Layerscape-1046A family SoC.
4 *
5 * Copyright (C) 2016, Freescale Semiconductor
6 *
7 * Mingkai Hu <Mingkai.hu@nxp.com>
8 */
9
10/include/ "fsl-ls1046a.dtsi"
11
12/ {
13	model = "LS1046A QDS Board";
14	aliases {
15		spi0 = &qspi;
16		spi1 = &dspi0;
17	};
18};
19
20&dspi0 {
21	bus-num = <0>;
22	status = "okay";
23
24	dflash0: n25q128a {
25		#address-cells = <1>;
26		#size-cells = <1>;
27		compatible = "jedec,spi-nor";
28		spi-max-frequency = <1000000>; /* input clock */
29		spi-cpol;
30		spi-cpha;
31		reg = <0>;
32	};
33
34	dflash1: sst25wf040b {
35		#address-cells = <1>;
36		#size-cells = <1>;
37		compatible = "jedec,spi-nor";
38		spi-max-frequency = <3500000>;
39		spi-cpol;
40		spi-cpha;
41		reg = <1>;
42	};
43
44	dflash2: en25s64 {
45		#address-cells = <1>;
46		#size-cells = <1>;
47		compatible = "jedec,spi-nor";
48		spi-max-frequency = <3500000>;
49		spi-cpol;
50		spi-cpha;
51		reg = <2>;
52	};
53};
54
55&qspi {
56	status = "okay";
57
58	s25fs512s0: flash@0 {
59		#address-cells = <1>;
60		#size-cells = <1>;
61		compatible = "jedec,spi-nor";
62		spi-max-frequency = <50000000>;
63		reg = <0>;
64	};
65};
66
67&duart0 {
68	status = "okay";
69};
70
71&duart1 {
72	status = "okay";
73};
74
75&lpuart0 {
76	status = "okay";
77};
78
79&sata {
80	status = "okay";
81};
82
83&i2c0 {
84	status = "okay";
85};
86