1// SPDX-License-Identifier: GPL-2.0+ 2/* 3 * U-Boot additions 4 * 5 * Copyright (C) 2012 Altera Corporation <www.altera.com> 6 * Copyright (c) 2018 Simon Goldschmidt 7 */ 8 9#include "socfpga-common-u-boot.dtsi" 10 11/{ 12 aliases { 13 spi0 = "/soc/spi@ff705000"; 14 udc0 = &usb1; 15 }; 16}; 17 18&can0 { 19 status = "okay"; 20}; 21 22&watchdog0 { 23 status = "disabled"; 24}; 25 26&mmc { 27 u-boot,dm-pre-reloc; 28}; 29 30&qspi { 31 u-boot,dm-pre-reloc; 32}; 33 34&flash0 { 35 compatible = "n25q00", "jedec,spi-nor"; 36 u-boot,dm-pre-reloc; 37 38 partition@qspi-boot { 39 /* 8MB for raw data. */ 40 label = "Flash 0 Raw Data"; 41 reg = <0x0 0x800000>; 42 }; 43 44 partition@qspi-rootfs { 45 /* 120MB for jffs2 data. */ 46 label = "Flash 0 jffs2 Filesystem"; 47 reg = <0x800000 0x7800000>; 48 }; 49}; 50 51&uart0 { 52 clock-frequency = <100000000>; 53 u-boot,dm-pre-reloc; 54}; 55 56&uart1 { 57 clock-frequency = <100000000>; 58}; 59 60&porta { 61 bank-name = "porta"; 62}; 63 64&portb { 65 bank-name = "portb"; 66}; 67 68&portc { 69 bank-name = "portc"; 70}; 71 72&i2c0 { 73 i2c-scl-falling-time-ns = <300>; 74}; 75