1// SPDX-License-Identifier: GPL-2.0+ OR BSD-3-Clause
2/*
3 * Copyright (C) 2015-2018, STMicroelectronics - All Rights Reserved
4 */
5
6/*
7 * File generated by STMicroelectronics STM32CubeMX DDR Tool for MPUs
8 * DDR type: DDR3 / DDR3L
9 * DDR width: 32bits
10 * DDR density: 4Gb
11 * System frequency: 528000Khz
12 * Relaxed Timing Mode: false
13 * Address mapping type: RBC
14 *
15 * Save Date: 2019.05.14, save Time: 11:25:16
16 */
17#define DDR_MEM_COMPATIBLE ddr3-icore-1066-888-bin-g-1x4gb-528mhz
18#define DDR_MEM_NAME	"DDR3-DDR3L 32bits 528000kHz"
19#define DDR_MEM_SPEED	528000
20#define DDR_MEM_SIZE	0x20000000
21
22#define DDR_MSTR 0x00040401
23#define DDR_MRCTRL0 0x00000010
24#define DDR_MRCTRL1 0x00000000
25#define DDR_DERATEEN 0x00000000
26#define DDR_DERATEINT 0x00800000
27#define DDR_PWRCTL 0x00000000
28#define DDR_PWRTMG 0x00400010
29#define DDR_HWLPCTL 0x00000000
30#define DDR_RFSHCTL0 0x00210000
31#define DDR_RFSHCTL3 0x00000000
32#define DDR_RFSHTMG 0x0080008A
33#define DDR_CRCPARCTL0 0x00000000
34#define DDR_DRAMTMG0 0x121B2414
35#define DDR_DRAMTMG1 0x000A041B
36#define DDR_DRAMTMG2 0x0607080F
37#define DDR_DRAMTMG3 0x0050400C
38#define DDR_DRAMTMG4 0x07040607
39#define DDR_DRAMTMG5 0x06060403
40#define DDR_DRAMTMG6 0x02020002
41#define DDR_DRAMTMG7 0x00000202
42#define DDR_DRAMTMG8 0x00001005
43#define DDR_DRAMTMG14 0x000000A0
44#define DDR_ZQCTL0 0xC2000040
45#define DDR_DFITMG0 0x02050105
46#define DDR_DFITMG1 0x00000202
47#define DDR_DFILPCFG0 0x07000000
48#define DDR_DFIUPD0 0xC0400003
49#define DDR_DFIUPD1 0x00000000
50#define DDR_DFIUPD2 0x00000000
51#define DDR_DFIPHYMSTR 0x00000000
52#define DDR_ODTCFG 0x06000600
53#define DDR_ODTMAP 0x00000001
54#define DDR_SCHED 0x00000C01
55#define DDR_SCHED1 0x00000000
56#define DDR_PERFHPR1 0x01000001
57#define DDR_PERFLPR1 0x08000200
58#define DDR_PERFWR1 0x08000400
59#define DDR_DBG0 0x00000000
60#define DDR_DBG1 0x00000000
61#define DDR_DBGCMD 0x00000000
62#define DDR_POISONCFG 0x00000000
63#define DDR_PCCFG 0x00000010
64#define DDR_PCFGR_0 0x00010000
65#define DDR_PCFGW_0 0x00000000
66#define DDR_PCFGQOS0_0 0x02100C03
67#define DDR_PCFGQOS1_0 0x00800100
68#define DDR_PCFGWQOS0_0 0x01100C03
69#define DDR_PCFGWQOS1_0 0x01000200
70#define DDR_PCFGR_1 0x00010000
71#define DDR_PCFGW_1 0x00000000
72#define DDR_PCFGQOS0_1 0x02100C03
73#define DDR_PCFGQOS1_1 0x00800040
74#define DDR_PCFGWQOS0_1 0x01100C03
75#define DDR_PCFGWQOS1_1 0x01000200
76#define DDR_ADDRMAP1 0x00080808
77#define DDR_ADDRMAP2 0x00000000
78#define DDR_ADDRMAP3 0x00000000
79#define DDR_ADDRMAP4 0x00001F1F
80#define DDR_ADDRMAP5 0x07070707
81#define DDR_ADDRMAP6 0x0F0F0707
82#define DDR_ADDRMAP9 0x00000000
83#define DDR_ADDRMAP10 0x00000000
84#define DDR_ADDRMAP11 0x00000000
85#define DDR_PGCR 0x01442E02
86#define DDR_PTR0 0x0022A41B
87#define DDR_PTR1 0x047C0740
88#define DDR_PTR2 0x042D9C80
89#define DDR_ACIOCR 0x10400812
90#define DDR_DXCCR 0x00000C40
91#define DDR_DSGCR 0xF200001F
92#define DDR_DCR 0x0000000B
93#define DDR_DTPR0 0x36D477D0
94#define DDR_DTPR1 0x098A00D8
95#define DDR_DTPR2 0x10023600
96#define DDR_MR0 0x00000830
97#define DDR_MR1 0x00000000
98#define DDR_MR2 0x00000208
99#define DDR_MR3 0x00000000
100#define DDR_ODTCR 0x00010000
101#define DDR_ZQ0CR1 0x00000038
102#define DDR_DX0GCR 0x0000CE81
103#define DDR_DX0DLLCR 0x40000000
104#define DDR_DX0DQTR 0xFFFFFFFF
105#define DDR_DX0DQSTR 0x3DB02000
106#define DDR_DX1GCR 0x0000CE81
107#define DDR_DX1DLLCR 0x40000000
108#define DDR_DX1DQTR 0xFFFFFFFF
109#define DDR_DX1DQSTR 0x3DB02000
110#define DDR_DX2GCR 0x0000CE81
111#define DDR_DX2DLLCR 0x40000000
112#define DDR_DX2DQTR 0xFFFFFFFF
113#define DDR_DX2DQSTR 0x3DB02000
114#define DDR_DX3GCR 0x0000CE81
115#define DDR_DX3DLLCR 0x40000000
116#define DDR_DX3DQTR 0xFFFFFFFF
117#define DDR_DX3DQSTR 0x3DB02000
118
119#include "stm32mp15-ddr.dtsi"
120