1/* 2 * Copyright (C) 2015 Toby Churchill - http://www.toby-churchill.com/ 3 * 4 * This program is free software; you can redistribute it and/or modify 5 * it under the terms of the GNU General Public License version 2 as 6 * published by the Free Software Foundation. 7 */ 8/dts-v1/; 9 10#include "am33xx.dtsi" 11 12/ { 13 model = "Toby Churchill SL50 Series"; 14 compatible = "tcl,am335x-sl50", "ti,am33xx"; 15 16 cpus { 17 cpu@0 { 18 cpu0-supply = <&dcdc2_reg>; 19 }; 20 }; 21 22 memory@80000000 { 23 device_type = "memory"; 24 reg = <0x80000000 0x20000000>; /* 512 MB */ 25 }; 26 27 chosen { 28 stdout-path = &uart0; 29 }; 30 31 leds { 32 compatible = "gpio-leds"; 33 pinctrl-names = "default"; 34 pinctrl-0 = <&led_pins>; 35 36 led0 { 37 label = "sl50:green:usr0"; 38 gpios = <&gpio1 21 GPIO_ACTIVE_LOW>; 39 default-state = "off"; 40 }; 41 42 led1 { 43 label = "sl50:red:usr1"; 44 gpios = <&gpio1 22 GPIO_ACTIVE_LOW>; 45 default-state = "off"; 46 }; 47 48 led2 { 49 label = "sl50:green:usr2"; 50 gpios = <&gpio1 23 GPIO_ACTIVE_LOW>; 51 default-state = "off"; 52 }; 53 54 led3 { 55 label = "sl50:red:usr3"; 56 gpios = <&gpio1 24 GPIO_ACTIVE_LOW>; 57 default-state = "off"; 58 }; 59 }; 60 61 backlight0: disp0 { 62 compatible = "pwm-backlight"; 63 pwms = <&ehrpwm1 0 500000 0>; 64 brightness-levels = <0 10 20 30 40 50 60 70 80 90 99>; 65 default-brightness-level = <6>; 66 }; 67 68 backlight1: disp1 { 69 compatible = "pwm-backlight"; 70 pwms = <&ehrpwm1 1 500000 0>; 71 brightness-levels = <0 10 20 30 40 50 60 70 80 90 99>; 72 default-brightness-level = <6>; 73 }; 74 75 clocks { 76 compatible = "simple-bus"; 77 #address-cells = <1>; 78 #size-cells = <0>; 79 80 /* audio external oscillator */ 81 tlv320aic3x_mclk: oscillator@0 { 82 compatible = "fixed-clock"; 83 #clock-cells = <0>; 84 clock-frequency = <24576000>; /* 24.576MHz */ 85 }; 86 }; 87 88 sound { 89 compatible = "ti,da830-evm-audio"; 90 ti,model = "AM335x-SL50"; 91 ti,audio-codec = <&audio_codec>; 92 ti,mcasp-controller = <&mcasp0>; 93 94 clocks = <&tlv320aic3x_mclk>; 95 clock-names = "mclk"; 96 97 ti,audio-routing = 98 "Headphone Jack", "HPLOUT", 99 "Headphone Jack", "HPROUT", 100 "LINE1R", "Line In", 101 "LINE1L", "Line In"; 102 }; 103 104 emmc_pwrseq: pwrseq@0 { 105 compatible = "mmc-pwrseq-emmc"; 106 pinctrl-names = "default"; 107 pinctrl-0 = <&emmc_pwrseq_pins>; 108 reset-gpios = <&gpio1 20 GPIO_ACTIVE_LOW>; 109 }; 110 111 vmmcsd_fixed: fixedregulator0 { 112 compatible = "regulator-fixed"; 113 regulator-name = "vmmcsd_fixed"; 114 regulator-min-microvolt = <3300000>; 115 regulator-max-microvolt = <3300000>; 116 }; 117}; 118 119&am33xx_pinmux { 120 pinctrl-names = "default"; 121 pinctrl-0 = <&lwb_pins>; 122 123 led_pins: pinmux_led_pins { 124 pinctrl-single,pins = < 125 AM33XX_IOPAD(0x854, PIN_OUTPUT | MUX_MODE7) /* gpmc_a5.gpio1_21 */ 126 AM33XX_IOPAD(0x858, PIN_OUTPUT | MUX_MODE7) /* gpmc_a6.gpio1_22 */ 127 AM33XX_IOPAD(0x85c, PIN_OUTPUT | MUX_MODE7) /* gpmc_a7.gpio1_23 */ 128 AM33XX_IOPAD(0x860, PIN_OUTPUT | MUX_MODE7) /* gpmc_a8.gpio1_24 */ 129 >; 130 }; 131 132 uart0_pins: pinmux_uart0_pins { 133 pinctrl-single,pins = < 134 AM33XX_IOPAD(0x970, PIN_INPUT_PULLUP | MUX_MODE0) /* uart0_rxd.uart0_rxd */ 135 AM33XX_IOPAD(0x974, PIN_OUTPUT_PULLDOWN | MUX_MODE0) /* uart0_txd.uart0_txd */ 136 >; 137 }; 138 139 uart1_pins: pinmux_uart1_pins { 140 pinctrl-single,pins = < 141 AM33XX_IOPAD(0x980, PIN_INPUT_PULLUP | MUX_MODE0) /* uart1_rxd.uart1_rxd */ 142 AM33XX_IOPAD(0x984, PIN_OUTPUT_PULLDOWN | MUX_MODE0) /* uart1_txd.uart1_txd */ 143 >; 144 }; 145 146 uart4_pins: pinmux_uart4_pins { 147 pinctrl-single,pins = < 148 AM33XX_IOPAD(0x870, PIN_INPUT_PULLUP | MUX_MODE6) /* gpmc_wait0.uart4_rxd */ 149 AM33XX_IOPAD(0x874, PIN_OUTPUT_PULLDOWN | MUX_MODE6) /* gpmc_wpn.uart4_txd */ 150 >; 151 }; 152 153 i2c0_pins: pinmux_i2c0_pins { 154 pinctrl-single,pins = < 155 AM33XX_IOPAD(0x988, PIN_INPUT_PULLUP | MUX_MODE0) /* i2c0_sda.i2c0_sda */ 156 AM33XX_IOPAD(0x98c, PIN_INPUT_PULLUP | MUX_MODE0) /* i2c0_scl.i2c0_scl */ 157 >; 158 }; 159 160 i2c2_pins: pinmux_i2c2_pins { 161 pinctrl-single,pins = < 162 AM33XX_IOPAD(0x978, PIN_INPUT_PULLUP | MUX_MODE3) /* uart1_ctsn.i2c2_sda */ 163 AM33XX_IOPAD(0x97c, PIN_INPUT_PULLUP | MUX_MODE3) /* uart1_rtsn.i2c2_scl */ 164 >; 165 }; 166 167 cpsw_default: cpsw_default { 168 pinctrl-single,pins = < 169 /* Slave 1 */ 170 AM33XX_IOPAD(0x910, PIN_INPUT_PULLUP | MUX_MODE0) /* mii1_rxerr.mii1_rxerr */ 171 AM33XX_IOPAD(0x914, PIN_OUTPUT_PULLDOWN | MUX_MODE0) /* mii1_txen.mii1_txen */ 172 AM33XX_IOPAD(0x918, PIN_INPUT_PULLUP | MUX_MODE0) /* mii1_rxdv.mii1_rxdv */ 173 AM33XX_IOPAD(0x91c, PIN_OUTPUT_PULLDOWN | MUX_MODE0) /* mii1_txd3.mii1_txd3 */ 174 AM33XX_IOPAD(0x920, PIN_OUTPUT_PULLDOWN | MUX_MODE0) /* mii1_txd2.mii1_txd2 */ 175 AM33XX_IOPAD(0x924, PIN_OUTPUT_PULLDOWN | MUX_MODE0) /* mii1_txd1.mii1_txd1 */ 176 AM33XX_IOPAD(0x928, PIN_OUTPUT_PULLDOWN | MUX_MODE0) /* mii1_txd0.mii1_txd0 */ 177 AM33XX_IOPAD(0x92c, PIN_INPUT_PULLUP | MUX_MODE0) /* mii1_txclk.mii1_txclk */ 178 AM33XX_IOPAD(0x930, PIN_INPUT_PULLUP | MUX_MODE0) /* mii1_rxclk.mii1_rxclk */ 179 AM33XX_IOPAD(0x934, PIN_INPUT_PULLUP | MUX_MODE0) /* mii1_rxd3.mii1_rxd3 */ 180 AM33XX_IOPAD(0x938, PIN_INPUT_PULLUP | MUX_MODE0) /* mii1_rxd2.mii1_rxd2 */ 181 AM33XX_IOPAD(0x93c, PIN_INPUT_PULLUP | MUX_MODE0) /* mii1_rxd1.mii1_rxd1 */ 182 AM33XX_IOPAD(0x940, PIN_INPUT_PULLUP | MUX_MODE0) /* mii1_rxd0.mii1_rxd0 */ 183 >; 184 }; 185 186 cpsw_sleep: cpsw_sleep { 187 pinctrl-single,pins = < 188 /* Slave 1 reset value */ 189 AM33XX_IOPAD(0x910, PIN_INPUT_PULLDOWN | MUX_MODE7) 190 AM33XX_IOPAD(0x914, PIN_INPUT_PULLDOWN | MUX_MODE7) 191 AM33XX_IOPAD(0x918, PIN_INPUT_PULLDOWN | MUX_MODE7) 192 AM33XX_IOPAD(0x91c, PIN_INPUT_PULLDOWN | MUX_MODE7) 193 AM33XX_IOPAD(0x920, PIN_INPUT_PULLDOWN | MUX_MODE7) 194 AM33XX_IOPAD(0x924, PIN_INPUT_PULLDOWN | MUX_MODE7) 195 AM33XX_IOPAD(0x928, PIN_INPUT_PULLDOWN | MUX_MODE7) 196 AM33XX_IOPAD(0x92c, PIN_INPUT_PULLDOWN | MUX_MODE7) 197 AM33XX_IOPAD(0x930, PIN_INPUT_PULLDOWN | MUX_MODE7) 198 AM33XX_IOPAD(0x934, PIN_INPUT_PULLDOWN | MUX_MODE7) 199 AM33XX_IOPAD(0x938, PIN_INPUT_PULLDOWN | MUX_MODE7) 200 AM33XX_IOPAD(0x93c, PIN_INPUT_PULLDOWN | MUX_MODE7) 201 AM33XX_IOPAD(0x940, PIN_INPUT_PULLDOWN | MUX_MODE7) 202 >; 203 }; 204 205 davinci_mdio_default: davinci_mdio_default { 206 pinctrl-single,pins = < 207 /* MDIO */ 208 AM33XX_IOPAD(0x948, PIN_INPUT_PULLUP | SLEWCTRL_FAST | MUX_MODE0) /* mdio_data.mdio_data */ 209 AM33XX_IOPAD(0x94c, PIN_OUTPUT_PULLUP | MUX_MODE0) /* mdio_clk.mdio_clk */ 210 >; 211 }; 212 213 davinci_mdio_sleep: davinci_mdio_sleep { 214 pinctrl-single,pins = < 215 /* MDIO reset value */ 216 AM33XX_IOPAD(0x948, PIN_INPUT_PULLDOWN | MUX_MODE7) 217 AM33XX_IOPAD(0x94c, PIN_INPUT_PULLDOWN | MUX_MODE7) 218 >; 219 }; 220 221 mmc1_pins: pinmux_mmc1_pins { 222 pinctrl-single,pins = < 223 AM33XX_IOPAD(0x96c, PIN_INPUT | MUX_MODE7) /* uart0_rtsn.gpio1_9 */ 224 >; 225 }; 226 227 emmc_pwrseq_pins: pinmux_emmc_pwrseq_pins { 228 pinctrl-single,pins = < 229 AM33XX_IOPAD(0x850, PIN_OUTPUT_PULLUP | MUX_MODE7) /* gpmc_a4.gpio1_20 */ 230 >; 231 }; 232 233 emmc_pins: pinmux_emmc_pins { 234 pinctrl-single,pins = < 235 AM33XX_IOPAD(0x880, PIN_INPUT_PULLUP | MUX_MODE2) /* gpmc_csn1.mmc1_clk */ 236 AM33XX_IOPAD(0x884, PIN_INPUT_PULLUP | MUX_MODE2) /* gpmc_csn2.mmc1_cmd */ 237 AM33XX_IOPAD(0x800, PIN_INPUT_PULLUP | MUX_MODE1) /* gpmc_ad0.mmc1_dat0 */ 238 AM33XX_IOPAD(0x804, PIN_INPUT_PULLUP | MUX_MODE1) /* gpmc_ad1.mmc1_dat1 */ 239 AM33XX_IOPAD(0x808, PIN_INPUT_PULLUP | MUX_MODE1) /* gpmc_ad2.mmc1_dat2 */ 240 AM33XX_IOPAD(0x80c, PIN_INPUT_PULLUP | MUX_MODE1) /* gpmc_ad3.mmc1_dat3 */ 241 AM33XX_IOPAD(0x810, PIN_INPUT_PULLUP | MUX_MODE1) /* gpmc_ad4.mmc1_dat4 */ 242 AM33XX_IOPAD(0x814, PIN_INPUT_PULLUP | MUX_MODE1) /* gpmc_ad5.mmc1_dat5 */ 243 AM33XX_IOPAD(0x818, PIN_INPUT_PULLUP | MUX_MODE1) /* gpmc_ad6.mmc1_dat6 */ 244 AM33XX_IOPAD(0x81c, PIN_INPUT_PULLUP | MUX_MODE1) /* gpmc_ad7.mmc1_dat7 */ 245 >; 246 }; 247 248 audio_pins: pinmux_audio_pins { 249 pinctrl-single,pins = < 250 AM33XX_IOPAD(0x9ac, PIN_INPUT_PULLDOWN | MUX_MODE0) /* mcasp0_ahcklx.mcasp0_ahclkx */ 251 AM33XX_IOPAD(0x994, PIN_INPUT_PULLDOWN | MUX_MODE0) /* mcasp0_fsx.mcasp0_fsx */ 252 AM33XX_IOPAD(0x990, PIN_INPUT_PULLDOWN | MUX_MODE0) /* mcasp0_aclkx.mcasp0_aclkx */ 253 AM33XX_IOPAD(0x998, PIN_INPUT_PULLDOWN | MUX_MODE0) /* mcasp0_axr0.mcasp0_axr0 */ 254 AM33XX_IOPAD(0x99c, PIN_OUTPUT_PULLDOWN | MUX_MODE2) /* mcasp0_ahclkr.mcasp0_axr2 */ 255 >; 256 }; 257 258 ehrpwm1_pins: pinmux_ehrpwm1a_pins { 259 pinctrl-single,pins = < 260 AM33XX_IOPAD(0x848, PIN_OUTPUT | MUX_MODE6) /* gpmc_a2.ehrpwm1a */ 261 AM33XX_IOPAD(0x84c, PIN_OUTPUT | MUX_MODE6) /* gpmc_a3.ehrpwm1b */ 262 >; 263 }; 264 265 spi0_pins: pinmux_spi0_pins { 266 pinctrl-single,pins = < 267 AM33XX_IOPAD(0x954, PIN_INPUT_PULLUP | MUX_MODE0) /* SPI0_MOSI - spi0_d0.spi0_d0 */ 268 AM33XX_IOPAD(0x958, PIN_INPUT_PULLUP | MUX_MODE0) /* SPI0_MISO - spi0_d1.spi0_d1 */ 269 AM33XX_IOPAD(0x950, PIN_INPUT_PULLUP | MUX_MODE0) /* SPI0_CLK - spi0_clk.spi0_clk */ 270 AM33XX_IOPAD(0x95c, PIN_INPUT_PULLUP | MUX_MODE0) /* SPI0_CS0 (NBATTSS) - spi0_cs0.spi0_cs0 */ 271 AM33XX_IOPAD(0x960, PIN_INPUT_PULLUP | MUX_MODE0) /* SPI0_CS1 (FPGA_FLASH_NCS) - spi0_cs1.spi0_cs1 */ 272 >; 273 }; 274 275 lwb_pins: pinmux_lwb_pins { 276 pinctrl-single,pins = < 277 AM33XX_IOPAD(0x9a4, PIN_OUTPUT | MUX_MODE7) /* SoundPA_en - mcasp0_fsr.gpio3_19 */ 278 AM33XX_IOPAD(0x828, PIN_OUTPUT | MUX_MODE7) /* nKbdOnC - gpmc_ad10.gpio0_26 */ 279 AM33XX_IOPAD(0x830, PIN_INPUT_PULLUP | MUX_MODE7) /* nKbdInt - gpmc_ad12.gpio1_12 */ 280 AM33XX_IOPAD(0x834, PIN_INPUT_PULLUP | MUX_MODE7) /* nKbdReset - gpmc_ad13.gpio1_13 */ 281 AM33XX_IOPAD(0x838, PIN_INPUT_PULLUP | MUX_MODE7) /* nDispReset - gpmc_ad14.gpio1_14 */ 282 AM33XX_IOPAD(0x844, PIN_INPUT_PULLUP | MUX_MODE7) /* USB1_enPower - gpmc_a1.gpio1_17 */ 283 /* PDI Bus - Battery system */ 284 AM33XX_IOPAD(0x840, PIN_INPUT_PULLUP | MUX_MODE7) /* nBattReset gpmc_a0.gpio1_16 */ 285 AM33XX_IOPAD(0x83c, PIN_INPUT_PULLUP | MUX_MODE7) /* BattPDIData gpmc_ad15.gpio1_15 */ 286 >; 287 }; 288}; 289 290&i2c0 { 291 status = "okay"; 292 pinctrl-names = "default"; 293 pinctrl-0 = <&i2c0_pins>; 294 295 clock-frequency = <400000>; 296 297 tps: tps@24 { 298 reg = <0x24>; 299 }; 300 301 bq32000: rtc@68 { 302 compatible = "ti,bq32000"; 303 trickle-resistor-ohms = <1120>; 304 reg = <0x68>; 305 }; 306 307 eeprom: eeprom@50 { 308 compatible = "atmel,24c256"; 309 reg = <0x50>; 310 }; 311 312 gpio_exp: mcp23017@20 { 313 compatible = "microchip,mcp23017"; 314 reg = <0x20>; 315 }; 316 317}; 318 319&i2c2 { 320 status = "okay"; 321 pinctrl-names = "default"; 322 pinctrl-0 = <&i2c2_pins>; 323 324 clock-frequency = <400000>; 325 326 audio_codec: tlv320aic3106@1b { 327 status = "okay"; 328 compatible = "ti,tlv320aic3106"; 329 reg = <0x1b>; 330 331 AVDD-supply = <&ldo4_reg>; 332 IOVDD-supply = <&ldo4_reg>; 333 DRVDD-supply = <&ldo4_reg>; 334 DVDD-supply = <&ldo3_reg>; 335 }; 336 337 /* Ambient Light Sensor */ 338 als: isl29023@44 { 339 compatible = "isil,isl29023"; 340 reg = <0x44>; 341 }; 342}; 343 344&rtc { 345 status = "disabled"; 346}; 347 348&usb { 349 status = "okay"; 350}; 351 352&usb_ctrl_mod { 353 status = "okay"; 354}; 355 356&usb0_phy { 357 status = "okay"; 358}; 359 360&usb1_phy { 361 status = "okay"; 362}; 363 364&usb0 { 365 status = "okay"; 366 dr_mode = "peripheral"; 367}; 368 369&usb1 { 370 status = "okay"; 371 dr_mode = "host"; 372}; 373 374&cppi41dma { 375 status = "okay"; 376}; 377 378&mmc1 { 379 status = "okay"; 380 pinctrl-names = "default"; 381 pinctrl-0 = <&mmc1_pins>; 382 bus-width = <4>; 383 cd-gpios = <&gpio1 9 GPIO_ACTIVE_LOW>; 384 vmmc-supply = <&vmmcsd_fixed>; 385}; 386 387&mmc2 { 388 status = "okay"; 389 pinctrl-names = "default"; 390 pinctrl-0 = <&emmc_pins>; 391 bus-width = <8>; 392 vmmc-supply = <&vmmcsd_fixed>; 393 mmc-pwrseq = <&emmc_pwrseq>; 394}; 395 396&mcasp0 { 397 status = "okay"; 398 pinctrl-names = "default"; 399 pinctrl-0 = <&audio_pins>; 400 401 op-mode = <0>; /* MCASP_ISS_MODE */ 402 tdm-slots = <2>; 403 serial-dir = < 404 2 0 1 0 405 0 0 0 0 406 0 0 0 0 407 0 0 0 0 408 >; 409 tx-num-evt = <1>; 410 rx-num-evt = <1>; 411}; 412 413&uart0 { 414 status = "okay"; 415 pinctrl-names = "default"; 416 pinctrl-0 = <&uart0_pins>; 417}; 418 419&uart1 { 420 status = "okay"; 421 pinctrl-names = "default"; 422 pinctrl-0 = <&uart1_pins>; 423}; 424 425&uart4 { 426 status = "okay"; 427 pinctrl-names = "default"; 428 pinctrl-0 = <&uart4_pins>; 429}; 430 431&spi0 { 432 status = "okay"; 433 pinctrl-names = "default"; 434 pinctrl-0 = <&spi0_pins>; 435 436 flash: n25q032@1 { 437 #address-cells = <1>; 438 #size-cells = <1>; 439 compatible = "micron,n25q032"; 440 reg = <1>; 441 spi-max-frequency = <5000000>; 442 }; 443}; 444 445#include "tps65217.dtsi" 446 447&tps { 448 ti,pmic-shutdown-controller; 449 450 interrupt-parent = <&intc>; 451 interrupts = <7>; /* NNMI */ 452 453 regulators { 454 dcdc1_reg: regulator@0 { 455 /* VDDS_DDR */ 456 regulator-min-microvolt = <1500000>; 457 regulator-max-microvolt = <1500000>; 458 regulator-always-on; 459 }; 460 461 dcdc2_reg: regulator@1 { 462 /* VDD_MPU voltage limits 0.95V - 1.26V with +/-4% tolerance */ 463 regulator-name = "vdd_mpu"; 464 regulator-min-microvolt = <925000>; 465 regulator-max-microvolt = <1325000>; 466 regulator-boot-on; 467 regulator-always-on; 468 }; 469 470 dcdc3_reg: regulator@2 { 471 /* VDD_CORE voltage limits 0.95V - 1.1V with +/-4% tolerance */ 472 regulator-name = "vdd_core"; 473 regulator-min-microvolt = <925000>; 474 regulator-max-microvolt = <1150000>; 475 regulator-boot-on; 476 regulator-always-on; 477 }; 478 479 ldo1_reg: regulator@3 { 480 /* VRTC / VIO / VDDS*/ 481 regulator-always-on; 482 regulator-min-microvolt = <1800000>; 483 regulator-max-microvolt = <1800000>; 484 }; 485 486 ldo2_reg: regulator@4 { 487 /* VDD_3V3AUX */ 488 regulator-always-on; 489 regulator-min-microvolt = <3300000>; 490 regulator-max-microvolt = <3300000>; 491 }; 492 493 ldo3_reg: regulator@5 { 494 /* VDD_1V8 */ 495 regulator-min-microvolt = <1800000>; 496 regulator-max-microvolt = <1800000>; 497 regulator-always-on; 498 }; 499 500 ldo4_reg: regulator@6 { 501 /* VDD_3V3A */ 502 regulator-min-microvolt = <3300000>; 503 regulator-max-microvolt = <3300000>; 504 regulator-always-on; 505 }; 506 }; 507}; 508 509&cpsw_emac0 { 510 phy-mode = "mii"; 511 phy-handle = <ðphy0>; 512}; 513 514&mac { 515 status = "okay"; 516 pinctrl-names = "default", "sleep"; 517 pinctrl-0 = <&cpsw_default>; 518 pinctrl-1 = <&cpsw_sleep>; 519}; 520 521&davinci_mdio { 522 status = "okay"; 523 pinctrl-names = "default", "sleep"; 524 pinctrl-0 = <&davinci_mdio_default>; 525 pinctrl-1 = <&davinci_mdio_sleep>; 526 reset-gpios = <&gpio1 14 GPIO_ACTIVE_LOW>; 527 reset-delay-us = <100>; /* PHY datasheet states 100us min */ 528 529 ethphy0: ethernet-phy@0 { 530 reg = <0>; 531 }; 532}; 533 534&sham { 535 status = "okay"; 536}; 537 538&aes { 539 status = "okay"; 540}; 541 542&epwmss1 { 543 status = "okay"; 544}; 545 546&ehrpwm1 { 547 status = "okay"; 548 pinctrl-names = "default"; 549 pinctrl-0 = <&ehrpwm1_pins>; 550}; 551