1// SPDX-License-Identifier: GPL-2.0+ 2/* 3 * Copyright 2018 4 * Lukasz Majewski, DENX Software Engineering, lukma@denx.de 5 * 6 * SPDX-License-Identifier: GPL-2.0+ or X11 7 */ 8 9/dts-v1/; 10#include <dt-bindings/gpio/gpio.h> 11#include "imx6q.dtsi" 12 13/ { 14 model = "K+P iMX6Q"; 15 compatible = "kp,imx6-kp", "fsl,imx6"; 16 17 aliases { 18 mmc0 = &usdhc2; 19 mmc1 = &usdhc4; 20 usb1 = &usbh1; 21 }; 22 23 chosen { 24 stdout-path = &uart1; 25 }; 26 27 leds { 28 compatible = "gpio-leds"; 29 pinctrl-names = "default"; 30 pinctrl-0 = <&pinctrl_leds>; 31 32 green { 33 label = "green"; 34 gpios = <&gpio3 23 GPIO_ACTIVE_HIGH>; 35 linux,default-trigger = "gpio"; 36 default-state = "off"; 37 }; 38 39 red { 40 label = "red"; 41 gpios = <&gpio3 16 GPIO_ACTIVE_HIGH>; 42 linux,default-trigger = "gpio"; 43 default-state = "off"; 44 }; 45 }; 46 47 memory@10000000 { 48 reg = <0x10000000 0x40000000>; 49 }; 50 51 reg_usb_h1_vbus: regulator-usb_h1_vbus { 52 compatible = "regulator-fixed"; 53 regulator-name = "usb_h1_vbus"; 54 regulator-min-microvolt = <5000000>; 55 regulator-max-microvolt = <5000000>; 56 gpio = <&gpio3 31 GPIO_ACTIVE_HIGH>; 57 enable-active-high; 58 }; 59}; 60 61&fec { 62 pinctrl-names = "default"; 63 pinctrl-0 = <&pinctrl_enet>; 64 phy-reset-gpios = <&gpio1 25 GPIO_ACTIVE_LOW>; 65 phy-reset-duration = <10>; 66 phy-mode = "rgmii"; 67 fsl,magic-packet; 68 fsl,enet-loopback-clk; /* anatop reference clk via PAD loopback */ 69 fsl,enet-freq = <1>; /* ENET_25MHZ = 0, ENET_50MHZ = 1 */ 70 /* ENET_100MHZ = 2, ENET_125MHZ = 3 */ 71 status = "okay"; 72}; 73 74&i2c1 { 75 clock-frequency = <400000>; 76 pinctrl-names = "default"; 77 pinctrl-0 = <&pinctrl_i2c1>; 78 status = "okay"; 79 80 ds1307: rtc@32 { 81 compatible = "dallas,ds1307"; 82 reg = <0x32>; 83 }; 84}; 85 86&i2c2 { 87 clock-frequency = <400000>; 88 pinctrl-names = "default"; 89 pinctrl-0 = <&pinctrl_i2c2>; 90 status = "okay"; 91}; 92 93&iomuxc { 94 pinctrl_enet: enetgrp { 95 fsl,pins = < 96 MX6QDL_PAD_ENET_MDIO__ENET_MDIO 0x1b0b0 97 MX6QDL_PAD_ENET_MDC__ENET_MDC 0x1b0b0 98 MX6QDL_PAD_RGMII_TXC__RGMII_TXC 0x1b0b0 99 MX6QDL_PAD_RGMII_TD0__RGMII_TD0 0x1b0b0 100 MX6QDL_PAD_RGMII_TD1__RGMII_TD1 0x1b0b0 101 MX6QDL_PAD_RGMII_TD2__RGMII_TD2 0x1b0b0 102 MX6QDL_PAD_RGMII_TD3__RGMII_TD3 0x1b0b0 103 MX6QDL_PAD_RGMII_TX_CTL__RGMII_TX_CTL 0x1b0b0 104 MX6QDL_PAD_ENET_REF_CLK__ENET_TX_CLK 0x1b0b0 105 MX6QDL_PAD_RGMII_RXC__RGMII_RXC 0x1b0b0 106 MX6QDL_PAD_RGMII_RD0__RGMII_RD0 0x1b0b0 107 MX6QDL_PAD_RGMII_RD1__RGMII_RD1 0x1b0b0 108 MX6QDL_PAD_RGMII_RD2__RGMII_RD2 0x1b0b0 109 MX6QDL_PAD_RGMII_RD3__RGMII_RD3 0x1b0b0 110 MX6QDL_PAD_RGMII_RX_CTL__RGMII_RX_CTL 0x1b0b0 111 MX6QDL_PAD_GPIO_16__ENET_REF_CLK 0x4001b0a8 112 MX6QDL_PAD_ENET_CRS_DV__GPIO1_IO25 0x1b0b0 113 >; 114 }; 115 116 pinctrl_leds: gpioledsgrp { 117 fsl,pins = < 118 MX6QDL_PAD_EIM_D23__GPIO3_IO23 0x4001b0b0 119 MX6QDL_PAD_EIM_D16__GPIO3_IO16 0x4001b0b0 120 >; 121 }; 122 123 pinctrl_i2c1: i2c1grp { 124 fsl,pins = < 125 MX6QDL_PAD_CSI0_DAT8__I2C1_SDA 0x4001b8b1 126 MX6QDL_PAD_CSI0_DAT9__I2C1_SCL 0x4001b8b1 127 >; 128 }; 129 130 pinctrl_i2c2: i2c2grp { 131 fsl,pins = < 132 MX6QDL_PAD_KEY_COL3__I2C2_SCL 0x4001b8b1 133 MX6QDL_PAD_KEY_ROW3__I2C2_SDA 0x4001b8b1 134 >; 135 }; 136 137 pinctrl_uart1: uart1grp { 138 fsl,pins = < 139 MX6QDL_PAD_SD3_DAT7__UART1_TX_DATA 0x1b0b1 140 MX6QDL_PAD_SD3_DAT6__UART1_RX_DATA 0x1b0b1 141 >; 142 }; 143 144 pinctrl_uart2: uart2grp { 145 fsl,pins = < 146 MX6QDL_PAD_EIM_D26__UART2_TX_DATA 0x1b0b1 147 MX6QDL_PAD_EIM_D27__UART2_RX_DATA 0x1b0b1 148 MX6QDL_PAD_EIM_D28__UART2_CTS_B 0x1b0b1 149 MX6QDL_PAD_EIM_D29__UART2_RTS_B 0x1b0b1 150 >; 151 }; 152 153 pinctrl_usbh1: usbh1grp { 154 fsl,pins = < 155 MX6QDL_PAD_EIM_D31__GPIO3_IO31 0x1b0b1 156 MX6QDL_PAD_ENET_RX_ER__USB_OTG_ID 0x17059 157 >; 158 }; 159 160 pinctrl_usdhc2: usdhc2grp { 161 fsl,pins = < 162 MX6QDL_PAD_SD2_CMD__SD2_CMD 0x17019 163 MX6QDL_PAD_SD2_CLK__SD2_CLK 0x10019 164 MX6QDL_PAD_SD2_DAT0__SD2_DATA0 0x17019 165 MX6QDL_PAD_SD2_DAT1__SD2_DATA1 0x17019 166 MX6QDL_PAD_SD2_DAT2__SD2_DATA2 0x17019 167 MX6QDL_PAD_SD2_DAT3__SD2_DATA3 0x17019 168 MX6QDL_PAD_NANDF_CS3__GPIO6_IO16 0x20000 169 MX6QDL_PAD_GPIO_4__GPIO1_IO04 0x20000 170 >; 171 }; 172 173 pinctrl_usdhc4: usdhc4grp { 174 fsl,pins = < 175 MX6QDL_PAD_SD4_CMD__SD4_CMD 0x17019 176 MX6QDL_PAD_SD4_CLK__SD4_CLK 0x10019 177 MX6QDL_PAD_SD4_DAT0__SD4_DATA0 0x17019 178 MX6QDL_PAD_SD4_DAT1__SD4_DATA1 0x17019 179 MX6QDL_PAD_SD4_DAT2__SD4_DATA2 0x17019 180 MX6QDL_PAD_SD4_DAT3__SD4_DATA3 0x17019 181 MX6QDL_PAD_SD4_DAT4__SD4_DATA4 0x17019 182 MX6QDL_PAD_SD4_DAT5__SD4_DATA5 0x17019 183 MX6QDL_PAD_SD4_DAT6__SD4_DATA6 0x17019 184 MX6QDL_PAD_SD4_DAT7__SD4_DATA7 0x17019 185 >; 186 }; 187}; 188 189&uart1 { 190 pinctrl-names = "default"; 191 pinctrl-0 = <&pinctrl_uart1>; 192 status = "okay"; 193}; 194 195&uart2 { 196 pinctrl-names = "default"; 197 pinctrl-0 = <&pinctrl_uart2>; 198 uart-has-rtscts; 199}; 200 201&usbh1 { 202 pinctrl-names = "default"; 203 pinctrl-0 = <&pinctrl_usbh1>; 204 vbus-supply = <®_usb_h1_vbus>; 205 status = "okay"; 206}; 207 208&usdhc2 { 209 pinctrl-names = "default"; 210 pinctrl-0 = <&pinctrl_usdhc2>; 211 bus-width = <4>; 212 cd-gpios = <&gpio1 4 GPIO_ACTIVE_LOW>; 213 status = "okay"; 214}; 215 216&usdhc4 { 217 pinctrl-names = "default"; 218 pinctrl-0 = <&pinctrl_usdhc4>; 219 bus-width = <8>; 220 non-removable; 221 no-1-8-v; 222 keep-power-in-suspend; 223 status = "okay"; 224}; 225