1// SPDX-License-Identifier: (GPL-2.0+ OR MIT)
2/*
3 * Copyright (c) 2019 Hardkernel Co., Ltd
4 * Copyright (c) 2020 Theobroma Systems Design und Consulting GmbH
5 */
6
7/dts-v1/;
8#include <dt-bindings/gpio/gpio.h>
9#include <dt-bindings/input/input.h>
10#include <dt-bindings/pinctrl/rockchip.h>
11#include "rk3326.dtsi"
12
13/ {
14	model = "ODROID-GO Advance";
15	compatible = "hardkernel,rk3326-odroid-go2", "rockchip,rk3326";
16
17	chosen {
18		stdout-path = "serial2:115200n8";
19	};
20
21	backlight: backlight {
22		compatible = "pwm-backlight";
23		power-supply = <&vcc_bl>;
24		pwms = <&pwm1 0 25000 0>;
25	};
26
27	adc-joystick {
28		compatible = "adc-joystick";
29		io-channels = <&saradc 1>,
30			      <&saradc 2>;
31		#address-cells = <1>;
32		#size-cells = <0>;
33
34		axis@0 {
35			reg = <0>;
36			abs-range = <172 772>;
37			abs-fuzz = <10>;
38			abs-flat = <10>;
39			linux,code = <ABS_X>;
40		};
41
42		axis@1 {
43			reg = <1>;
44			abs-range = <278 815>;
45			abs-fuzz = <10>;
46			abs-flat = <10>;
47			linux,code = <ABS_Y>;
48		};
49	};
50
51	gpio-keys {
52		compatible = "gpio-keys";
53		pinctrl-names = "default";
54		pinctrl-0 = <&btn_pins>;
55
56		/*
57		 *      *** ODROIDGO2-Advance Switch layout ***
58		 * |------------------------------------------------|
59		 * | sw15                                      sw16 |
60		 * |------------------------------------------------|
61		 * |     sw1      |-------------------|      sw8    |
62		 * |  sw3   sw4   |                   |   sw7   sw5 |
63		 * |     sw2      |    LCD Display    |      sw6    |
64		 * |              |                   |             |
65		 * |              |-------------------|             |
66		 * |         sw9 sw10   sw11 sw12   sw13 sw14       |
67		 * |------------------------------------------------|
68		 */
69
70		sw1 {
71			gpios = <&gpio1 RK_PB4 GPIO_ACTIVE_LOW>;
72			label = "DPAD-UP";
73			linux,code = <BTN_DPAD_UP>;
74		};
75		sw2 {
76			gpios = <&gpio1 RK_PB5 GPIO_ACTIVE_LOW>;
77			label = "DPAD-DOWN";
78			linux,code = <BTN_DPAD_DOWN>;
79		};
80		sw3 {
81			gpios = <&gpio1 RK_PB6 GPIO_ACTIVE_LOW>;
82			label = "DPAD-LEFT";
83			linux,code = <BTN_DPAD_LEFT>;
84		};
85		sw4 {
86			gpios = <&gpio1 RK_PB7 GPIO_ACTIVE_LOW>;
87			label = "DPAD-RIGHT";
88			linux,code = <BTN_DPAD_RIGHT>;
89		};
90		sw5 {
91			gpios = <&gpio1 RK_PA2 GPIO_ACTIVE_LOW>;
92			label = "BTN-A";
93			linux,code = <BTN_EAST>;
94		};
95		sw6 {
96			gpios = <&gpio1 RK_PA5 GPIO_ACTIVE_LOW>;
97			label = "BTN-B";
98			linux,code = <BTN_SOUTH>;
99		};
100		sw7 {
101			gpios = <&gpio1 RK_PA6 GPIO_ACTIVE_LOW>;
102			label = "BTN-Y";
103			linux,code = <BTN_WEST>;
104		};
105		sw8 {
106			gpios = <&gpio1 RK_PA7 GPIO_ACTIVE_LOW>;
107			label = "BTN-X";
108			linux,code = <BTN_NORTH>;
109		};
110		sw9 {
111			gpios = <&gpio2 RK_PA0 GPIO_ACTIVE_LOW>;
112			label = "F1";
113			linux,code = <BTN_TRIGGER_HAPPY1>;
114		};
115		sw10 {
116			gpios = <&gpio2 RK_PA1 GPIO_ACTIVE_LOW>;
117			label = "F2";
118			linux,code = <BTN_TRIGGER_HAPPY2>;
119		};
120		sw11 {
121			gpios = <&gpio2 RK_PA2 GPIO_ACTIVE_LOW>;
122			label = "F3";
123			linux,code = <BTN_TRIGGER_HAPPY3>;
124		};
125		sw12 {
126			gpios = <&gpio2 RK_PA3 GPIO_ACTIVE_LOW>;
127			label = "F4";
128			linux,code = <BTN_TRIGGER_HAPPY4>;
129		};
130		sw13 {
131			gpios = <&gpio2 RK_PA4 GPIO_ACTIVE_LOW>;
132			label = "F5";
133			linux,code = <BTN_TRIGGER_HAPPY5>;
134		};
135		sw14 {
136			gpios = <&gpio2 RK_PA5 GPIO_ACTIVE_LOW>;
137			label = "F6";
138			linux,code = <BTN_TRIGGER_HAPPY6>;
139		};
140		sw15 {
141			gpios = <&gpio2 RK_PA6 GPIO_ACTIVE_LOW>;
142			label = "TOP-LEFT";
143			linux,code = <BTN_TL>;
144		};
145		sw16 {
146			gpios = <&gpio2 RK_PA7 GPIO_ACTIVE_LOW>;
147			label = "TOP-RIGHT";
148			linux,code = <BTN_TR>;
149		};
150	};
151
152	leds: gpio-leds {
153		compatible = "gpio-leds";
154		pinctrl-names = "default";
155		pinctrl-0 = <&blue_led_pin>;
156
157		blue_led: led-0 {
158			label = "blue:heartbeat";
159			gpios = <&gpio0 RK_PC1 GPIO_ACTIVE_HIGH>;
160			linux,default-trigger = "heartbeat";
161		};
162	};
163
164	rk817-sound {
165		compatible = "simple-audio-card";
166		simple-audio-card,format = "i2s";
167		simple-audio-card,name = "rockchip,rk817-codec";
168		simple-audio-card,mclk-fs = <256>;
169		simple-audio-card,widgets =
170			"Microphone", "Mic Jack",
171			"Headphone", "Headphone Jack";
172		simple-audio-card,routing =
173			"MIC_IN", "Mic Jack",
174			"Headphone Jack", "HPOL",
175			"Headphone Jack", "HPOR";
176		simple-audio-card,hp-det-gpio = <&gpio2 RK_PC6 GPIO_ACTIVE_LOW>;
177		simple-audio-card,codec-hp-det = <1>;
178
179		simple-audio-card,cpu {
180			sound-dai = <&i2s1_2ch>;
181		};
182
183		simple-audio-card,codec {
184			sound-dai = <&rk817_codec>;
185		};
186	};
187
188	vccsys: vccsys {
189		compatible = "regulator-fixed";
190		regulator-name = "vcc3v8_sys";
191		regulator-always-on;
192		regulator-min-microvolt = <3800000>;
193		regulator-max-microvolt = <3800000>;
194	};
195
196	vcc_host: vcc_host {
197		compatible = "regulator-fixed";
198		regulator-name = "vcc_host";
199		regulator-min-microvolt = <5000000>;
200		regulator-max-microvolt = <5000000>;
201
202		gpio = <&gpio0 RK_PB7 GPIO_ACTIVE_HIGH>;
203		enable-active-high;
204		regulator-always-on;
205		vin-supply = <&vccsys>;
206	};
207};
208
209&cpu0 {
210	cpu-supply = <&vdd_arm>;
211};
212
213&cpu1 {
214	cpu-supply = <&vdd_arm>;
215};
216
217&cpu2 {
218	cpu-supply = <&vdd_arm>;
219};
220
221&cpu3 {
222	cpu-supply = <&vdd_arm>;
223};
224
225&cru {
226	assigned-clocks = <&cru PLL_NPLL>,
227		<&cru ACLK_BUS_PRE>, <&cru ACLK_PERI_PRE>,
228		<&cru HCLK_BUS_PRE>, <&cru HCLK_PERI_PRE>,
229		<&cru PCLK_BUS_PRE>, <&cru SCLK_GPU>,
230		<&cru PLL_CPLL>;
231
232	assigned-clock-rates = <1188000000>,
233		<200000000>, <200000000>,
234		<150000000>, <150000000>,
235		<100000000>, <200000000>,
236		<17000000>;
237};
238
239&display_subsystem {
240	status = "okay";
241};
242
243&dsi {
244	status = "okay";
245
246	ports {
247		mipi_out: port@1 {
248			reg = <1>;
249
250			mipi_out_panel: endpoint {
251				remote-endpoint = <&mipi_in_panel>;
252			};
253		};
254	};
255
256	panel@0 {
257		compatible = "elida,kd35t133";
258		reg = <0>;
259		backlight = <&backlight>;
260		iovcc-supply = <&vcc_lcd>;
261		reset-gpios = <&gpio3 RK_PC0 GPIO_ACTIVE_LOW>;
262		vdd-supply = <&vcc_lcd>;
263
264		port {
265			mipi_in_panel: endpoint {
266				remote-endpoint = <&mipi_out_panel>;
267			};
268		};
269	};
270};
271
272&dsi_dphy {
273	status = "okay";
274};
275
276&gpu {
277	mali-supply = <&vdd_logic>;
278	status = "okay";
279};
280
281&i2c0 {
282	clock-frequency = <400000>;
283	i2c-scl-falling-time-ns = <16>;
284	i2c-scl-rising-time-ns = <280>;
285	status = "okay";
286
287	rk817: pmic@20 {
288		compatible = "rockchip,rk817";
289		reg = <0x20>;
290		interrupt-parent = <&gpio0>;
291		interrupts = <RK_PB2 IRQ_TYPE_LEVEL_LOW>;
292		pinctrl-names = "default", "pmic-sleep",
293				"pmic-power-off", "pmic-reset";
294		pinctrl-0 = <&pmic_int>;
295		pinctrl-1 = <&soc_slppin_slp>, <&rk817_slppin_slp>;
296		pinctrl-2 = <&soc_slppin_gpio>, <&rk817_slppin_pwrdn>;
297		pinctrl-3 = <&soc_slppin_rst>, <&rk817_slppin_rst>;
298		rockchip,system-power-controller;
299		wakeup-source;
300		#clock-cells = <1>;
301		clock-output-names = "rk808-clkout1", "xin32k";
302
303		vcc1-supply = <&vccsys>;
304		vcc2-supply = <&vccsys>;
305		vcc3-supply = <&vccsys>;
306		vcc4-supply = <&vccsys>;
307		vcc5-supply = <&vccsys>;
308		vcc6-supply = <&vccsys>;
309		vcc7-supply = <&vccsys>;
310
311		pinctrl_rk8xx: pinctrl_rk8xx {
312			gpio-controller;
313			#gpio-cells = <2>;
314
315			rk817_ts_gpio1: rk817_ts_gpio1 {
316				pins = "gpio_ts";
317				function = "pin_fun1";
318				/* output-low; */
319				/* input-enable; */
320			};
321
322			rk817_gt_gpio2: rk817_gt_gpio2 {
323				pins = "gpio_gt";
324				function = "pin_fun1";
325			};
326
327			rk817_pin_ts: rk817_pin_ts {
328				pins = "gpio_ts";
329				function = "pin_fun0";
330			};
331
332			rk817_pin_gt: rk817_pin_gt {
333				pins = "gpio_gt";
334				function = "pin_fun0";
335			};
336
337			rk817_slppin_null: rk817_slppin_null {
338				pins = "gpio_slp";
339				function = "pin_fun0";
340			};
341
342			rk817_slppin_slp: rk817_slppin_slp {
343				pins = "gpio_slp";
344				function = "pin_fun1";
345			};
346
347			rk817_slppin_pwrdn: rk817_slppin_pwrdn {
348				pins = "gpio_slp";
349				function = "pin_fun2";
350			};
351
352			rk817_slppin_rst: rk817_slppin_rst {
353				pins = "gpio_slp";
354				function = "pin_fun3";
355			};
356		};
357
358		regulators {
359			vdd_logic: DCDC_REG1 {
360				regulator-name = "vdd_logic";
361				regulator-min-microvolt = <950000>;
362				regulator-max-microvolt = <1150000>;
363				regulator-ramp-delay = <6001>;
364				regulator-always-on;
365				regulator-boot-on;
366
367				regulator-state-mem {
368					regulator-on-in-suspend;
369					regulator-suspend-microvolt = <950000>;
370				};
371			};
372
373			vdd_arm: DCDC_REG2 {
374				regulator-name = "vdd_arm";
375				regulator-min-microvolt = <950000>;
376				regulator-max-microvolt = <1350000>;
377				regulator-ramp-delay = <6001>;
378				regulator-always-on;
379				regulator-boot-on;
380
381				regulator-state-mem {
382					regulator-off-in-suspend;
383					regulator-suspend-microvolt = <950000>;
384				};
385			};
386
387			vcc_ddr: DCDC_REG3 {
388				regulator-name = "vcc_ddr";
389				regulator-always-on;
390				regulator-boot-on;
391
392				regulator-state-mem {
393					regulator-on-in-suspend;
394				};
395			};
396
397			vcc_3v3: DCDC_REG4 {
398				regulator-name = "vcc_3v3";
399				regulator-min-microvolt = <3300000>;
400				regulator-max-microvolt = <3300000>;
401				regulator-always-on;
402				regulator-boot-on;
403
404				regulator-state-mem {
405					regulator-off-in-suspend;
406					regulator-suspend-microvolt = <3300000>;
407				};
408			};
409
410			vcc_1v8: LDO_REG2 {
411				regulator-name = "vcc_1v8";
412				regulator-min-microvolt = <1800000>;
413				regulator-max-microvolt = <1800000>;
414				regulator-always-on;
415				regulator-boot-on;
416
417				regulator-state-mem {
418					regulator-on-in-suspend;
419					regulator-suspend-microvolt = <1800000>;
420				};
421			};
422
423			vdd_1v0: LDO_REG3 {
424				regulator-name = "vdd_1v0";
425				regulator-min-microvolt = <1000000>;
426				regulator-max-microvolt = <1000000>;
427				regulator-always-on;
428				regulator-boot-on;
429
430				regulator-state-mem {
431					regulator-on-in-suspend;
432					regulator-suspend-microvolt = <1000000>;
433				};
434			};
435
436			vcc3v3_pmu: LDO_REG4 {
437				regulator-name = "vcc3v3_pmu";
438				regulator-min-microvolt = <3300000>;
439				regulator-max-microvolt = <3300000>;
440				regulator-always-on;
441				regulator-boot-on;
442
443				regulator-state-mem {
444					regulator-on-in-suspend;
445					regulator-suspend-microvolt = <3300000>;
446				};
447			};
448
449			vccio_sd: LDO_REG5 {
450				regulator-name = "vccio_sd";
451				regulator-min-microvolt = <1800000>;
452				regulator-max-microvolt = <3300000>;
453				regulator-always-on;
454				regulator-boot-on;
455
456				regulator-state-mem {
457					regulator-on-in-suspend;
458					regulator-suspend-microvolt = <3300000>;
459				};
460			};
461
462			vcc_sd: LDO_REG6 {
463				regulator-name = "vcc_sd";
464				regulator-min-microvolt = <3300000>;
465				regulator-max-microvolt = <3300000>;
466				regulator-boot-on;
467
468				regulator-state-mem {
469					regulator-on-in-suspend;
470					regulator-suspend-microvolt = <3300000>;
471				};
472			};
473
474			vcc_bl: LDO_REG7 {
475				regulator-name = "vcc_bl";
476				regulator-min-microvolt = <3300000>;
477				regulator-max-microvolt = <3300000>;
478
479				regulator-state-mem {
480					regulator-off-in-suspend;
481					regulator-suspend-microvolt = <3300000>;
482				};
483			};
484
485			vcc_lcd: LDO_REG8 {
486				regulator-name = "vcc_lcd";
487				regulator-min-microvolt = <2800000>;
488				regulator-max-microvolt = <2800000>;
489
490				regulator-state-mem {
491					regulator-off-in-suspend;
492					regulator-suspend-microvolt = <2800000>;
493				};
494			};
495
496			vcc_cam: LDO_REG9 {
497				regulator-name = "vcc_cam";
498				regulator-min-microvolt = <3000000>;
499				regulator-max-microvolt = <3000000>;
500
501				regulator-state-mem {
502					regulator-off-in-suspend;
503					regulator-suspend-microvolt = <3000000>;
504				};
505			};
506		};
507
508		battery {
509			compatible = "rk817,battery";
510			ocv_table = <3500 3625 3685 3697 3718 3735 3748
511			3760 3774 3788 3802 3816 3834 3853
512			3877 3908 3946 3975 4018 4071 4106>;
513
514			/* KPL605475 Battery Spec */
515			/*
516				Capacity : 3.7V 3000mA
517				Normal Voltage = 3.7V
518				Cut-Off Voltage : 3.1V
519				Internal Impedance : 180 mOhm
520				Charging Voltage : 4.2V
521				Charging Voltage Max : 4.25V
522				Sample resister : 10 mohm
523			*/
524			design_capacity = <3000>;
525			design_qmax = <3000>;
526			bat_res = <180>;
527			sleep_enter_current = <300>;
528			sleep_exit_current = <300>;
529			sleep_filter_current = <100>;
530			power_off_thresd = <3500>;
531			zero_algorithm_vol = <3700>;
532			max_soc_offset = <60>;
533			monitor_sec = <5>;
534			virtual_power = <0>;
535			sample_res = <10>;
536		};
537
538		charger {
539			compatible = "rk817,charger";
540			min_input_voltage = <4500>;
541			max_input_current = <1500>;
542			max_chrg_current = <2000>;
543			max_chrg_voltage = <4200>;
544			chrg_term_mode = <0>;
545			chrg_finish_cur = <300>;
546			virtual_power = <0>;
547			sample_res = <10>;
548
549			/* P.C.B rev0.2 DC Detect & Charger Status LED GPIO */
550			dc_det_gpio  = <&gpio0 RK_PB3 GPIO_ACTIVE_HIGH>;
551			chg_led_gpio = <&gpio0 RK_PB5 GPIO_ACTIVE_HIGH>;
552
553			extcon = <&u2phy>;
554		};
555
556		rk817_codec: codec {
557			#sound-dai-cells = <0>;
558			compatible = "rockchip,rk817-codec";
559			clocks = <&cru SCLK_I2S1_OUT>;
560			clock-names = "mclk";
561			pinctrl-names = "default";
562			pinctrl-0 = <&i2s1_2ch_mclk>;
563			hp-volume = <20>;
564			spk-volume = <3>;
565			status = "okay";
566		};
567	};
568};
569
570/* EXT Header(P2): 7(SCL:GPIO0.C2), 8(SDA:GPIO0.C3) */
571&i2c1 {
572	clock-frequency = <400000>;
573	status = "okay";
574};
575
576/* I2S 1 Channel Used */
577&i2s1_2ch {
578	status = "okay";
579};
580
581&io_domains {
582	vccio1-supply = <&vcc_3v3>;
583	vccio2-supply = <&vccio_sd>;
584	vccio3-supply = <&vcc_3v3>;
585	vccio4-supply = <&vcc_3v3>;
586	vccio5-supply = <&vcc_3v3>;
587	vccio6-supply = <&vcc_3v3>;
588	status = "okay";
589};
590
591&pmu_io_domains {
592	pmuio1-supply = <&vcc3v3_pmu>;
593	pmuio2-supply = <&vcc3v3_pmu>;
594	status = "okay";
595};
596
597&pwm1 {
598	status = "okay";
599};
600
601&saradc {
602	vref-supply = <&vcc_1v8>;
603	status = "okay";
604};
605
606&sdmmc {
607	bus-width = <4>;
608	cap-sd-highspeed;
609	card-detect-delay = <200>;
610	cd-gpios = <&gpio0 RK_PA3 GPIO_ACTIVE_LOW>; /*[> CD GPIO <]*/
611	sd-uhs-sdr12;
612	sd-uhs-sdr25;
613	sd-uhs-sdr50;
614	sd-uhs-sdr104;
615	vmmc-supply = <&vcc_sd>;
616	vqmmc-supply = <&vccio_sd>;
617	status = "okay";
618};
619
620&tsadc {
621	status = "okay";
622};
623
624&u2phy {
625	status = "okay";
626
627	u2phy_host: host-port {
628		status = "okay";
629	};
630
631	u2phy_otg: otg-port {
632		status = "disabled";
633	};
634};
635
636&usb20_otg {
637	status = "okay";
638};
639
640/* EXT Header(P2): 2(RXD:GPIO1.C0),3(TXD:.C1),4(CTS:.C2),5(RTS:.C3) */
641&uart1 {
642	pinctrl-names = "default";
643	pinctrl-0 = <&uart1_xfer &uart1_cts>;
644	status = "okay";
645};
646
647&uart2 {
648	pinctrl-names = "default";
649	pinctrl-0 = <&uart2m1_xfer>;
650	status = "okay";
651};
652
653&vopb {
654	status = "okay";
655};
656
657&vopb_mmu {
658	status = "okay";
659};
660
661&pinctrl {
662	btns {
663		btn_pins: btn-pins {
664			rockchip,pins = <1 RK_PA2 RK_FUNC_GPIO &pcfg_pull_up>,
665					<1 RK_PA5 RK_FUNC_GPIO &pcfg_pull_up>,
666					<1 RK_PA6 RK_FUNC_GPIO &pcfg_pull_up>,
667					<1 RK_PA7 RK_FUNC_GPIO &pcfg_pull_up>,
668					<1 RK_PB4 RK_FUNC_GPIO &pcfg_pull_up>,
669					<1 RK_PB5 RK_FUNC_GPIO &pcfg_pull_up>,
670					<1 RK_PB6 RK_FUNC_GPIO &pcfg_pull_up>,
671					<1 RK_PB7 RK_FUNC_GPIO &pcfg_pull_up>,
672					<2 RK_PA0 RK_FUNC_GPIO &pcfg_pull_up>,
673					<2 RK_PA1 RK_FUNC_GPIO &pcfg_pull_up>,
674					<2 RK_PA2 RK_FUNC_GPIO &pcfg_pull_up>,
675					<2 RK_PA3 RK_FUNC_GPIO &pcfg_pull_up>,
676					<2 RK_PA4 RK_FUNC_GPIO &pcfg_pull_up>,
677					<2 RK_PA5 RK_FUNC_GPIO &pcfg_pull_up>,
678					<2 RK_PA6 RK_FUNC_GPIO &pcfg_pull_up>,
679					<2 RK_PA7 RK_FUNC_GPIO &pcfg_pull_up>;
680		};
681	};
682
683	headphone {
684		hp_det: hp-det {
685			rockchip,pins = <2 RK_PC6 RK_FUNC_GPIO &pcfg_pull_down>;
686		};
687	};
688
689	leds {
690		blue_led_pin: blue-led-pin {
691			rockchip,pins = <0 RK_PC1 RK_FUNC_GPIO &pcfg_pull_none>;
692		};
693	};
694
695	pmic {
696		dc_det: dc-det {
697			rockchip,pins = <0 RK_PB3 RK_FUNC_GPIO &pcfg_pull_none>;
698		};
699
700		pmic_int: pmic-int {
701			rockchip,pins = <0 RK_PB2 RK_FUNC_GPIO &pcfg_pull_up>;
702		};
703
704		soc_slppin_gpio: soc_slppin_gpio {
705			rockchip,pins = <0 RK_PA4 RK_FUNC_GPIO &pcfg_output_low>;
706		};
707
708		soc_slppin_rst: soc_slppin_rst {
709			rockchip,pins = <0 RK_PA4 2 &pcfg_pull_none>;
710		};
711
712		soc_slppin_slp: soc_slppin_slp {
713			rockchip,pins = <0 RK_PA4 1 &pcfg_pull_none>;
714		};
715	};
716};
717