1 // SPDX-License-Identifier: GPL-2.0
2 /*
3  * Copyright (C) 2020 MediaTek Inc.
4  *
5  * Author:  Weijie Gao <weijie.gao@mediatek.com>
6  */
7 
8 #include <asm/io.h>
9 #include <asm/addrspace.h>
10 #include "mt7620.h"
11 
board_debug_uart_init(void)12 void board_debug_uart_init(void)
13 {
14 	void __iomem *base = ioremap_nocache(SYSCTL_BASE, SYSCTL_SIZE);
15 
16 #if CONFIG_DEBUG_UART_BASE == 0xb0000500 /* KSEG1ADDR(UARTFULL_BASE) */
17 	clrsetbits_32(base + SYSCTL_GPIOMODE_REG, UARTF_SHARE_MODE_M,
18 		      UARTF_MODE_UARTF_GPIO << UARTF_SHARE_MODE_S);
19 #else
20 	clrbits_32(base + SYSCTL_GPIOMODE_REG, UARTL_GPIO_MODE);
21 #endif
22 }
23 
mtmips_spl_serial_init(void)24 void mtmips_spl_serial_init(void)
25 {
26 #ifdef CONFIG_SPL_SERIAL_SUPPORT
27 	void __iomem *base = ioremap_nocache(SYSCTL_BASE, SYSCTL_SIZE);
28 
29 #if CONFIG_CONS_INDEX == 1
30 	clrbits_32(base + SYSCTL_GPIOMODE_REG, UARTL_GPIO_MODE);
31 #elif CONFIG_CONS_INDEX == 2
32 	clrsetbits_32(base + SYSCTL_GPIOMODE_REG, UARTF_SHARE_MODE_M,
33 		      UARTF_MODE_UARTF_GPIO << UARTF_SHARE_MODE_S);
34 #endif
35 #endif /* CONFIG_SPL_SERIAL_SUPPORT */
36 }
37