1 // SPDX-License-Identifier: GPL-2.0+
2 /*
3 * Copyright (c) 2011 The Chromium OS Authors.
4 */
5
6 #ifndef USE_HOSTCC
7 #include <common.h>
8 #include <boot_fit.h>
9 #include <dm.h>
10 #include <hang.h>
11 #include <init.h>
12 #include <log.h>
13 #include <malloc.h>
14 #include <net.h>
15 #include <dm/of_extra.h>
16 #include <env.h>
17 #include <errno.h>
18 #include <fdtdec.h>
19 #include <fdt_support.h>
20 #include <gzip.h>
21 #include <mapmem.h>
22 #include <linux/libfdt.h>
23 #include <serial.h>
24 #include <asm/global_data.h>
25 #include <asm/sections.h>
26 #include <linux/ctype.h>
27 #include <linux/lzo.h>
28 #include <linux/ioport.h>
29
30 DECLARE_GLOBAL_DATA_PTR;
31
32 /*
33 * Here are the type we know about. One day we might allow drivers to
34 * register. For now we just put them here. The COMPAT macro allows us to
35 * turn this into a sparse list later, and keeps the ID with the name.
36 *
37 * NOTE: This list is basically a TODO list for things that need to be
38 * converted to driver model. So don't add new things here unless there is a
39 * good reason why driver-model conversion is infeasible. Examples include
40 * things which are used before driver model is available.
41 */
42 #define COMPAT(id, name) name
43 static const char * const compat_names[COMPAT_COUNT] = {
44 COMPAT(UNKNOWN, "<none>"),
45 COMPAT(NVIDIA_TEGRA20_EMC, "nvidia,tegra20-emc"),
46 COMPAT(NVIDIA_TEGRA20_EMC_TABLE, "nvidia,tegra20-emc-table"),
47 COMPAT(NVIDIA_TEGRA20_NAND, "nvidia,tegra20-nand"),
48 COMPAT(NVIDIA_TEGRA124_XUSB_PADCTL, "nvidia,tegra124-xusb-padctl"),
49 COMPAT(NVIDIA_TEGRA210_XUSB_PADCTL, "nvidia,tegra210-xusb-padctl"),
50 COMPAT(SMSC_LAN9215, "smsc,lan9215"),
51 COMPAT(SAMSUNG_EXYNOS5_SROMC, "samsung,exynos-sromc"),
52 COMPAT(SAMSUNG_EXYNOS_USB_PHY, "samsung,exynos-usb-phy"),
53 COMPAT(SAMSUNG_EXYNOS5_USB3_PHY, "samsung,exynos5250-usb3-phy"),
54 COMPAT(SAMSUNG_EXYNOS_TMU, "samsung,exynos-tmu"),
55 COMPAT(SAMSUNG_EXYNOS_MIPI_DSI, "samsung,exynos-mipi-dsi"),
56 COMPAT(SAMSUNG_EXYNOS_DWMMC, "samsung,exynos-dwmmc"),
57 COMPAT(GENERIC_SPI_FLASH, "jedec,spi-nor"),
58 COMPAT(SAMSUNG_EXYNOS_SYSMMU, "samsung,sysmmu-v3.3"),
59 COMPAT(INTEL_MICROCODE, "intel,microcode"),
60 COMPAT(INTEL_QRK_MRC, "intel,quark-mrc"),
61 COMPAT(ALTERA_SOCFPGA_DWMAC, "altr,socfpga-stmmac"),
62 COMPAT(ALTERA_SOCFPGA_DWMMC, "altr,socfpga-dw-mshc"),
63 COMPAT(ALTERA_SOCFPGA_DWC2USB, "snps,dwc2"),
64 COMPAT(INTEL_BAYTRAIL_FSP, "intel,baytrail-fsp"),
65 COMPAT(INTEL_BAYTRAIL_FSP_MDP, "intel,baytrail-fsp-mdp"),
66 COMPAT(INTEL_IVYBRIDGE_FSP, "intel,ivybridge-fsp"),
67 COMPAT(COMPAT_SUNXI_NAND, "allwinner,sun4i-a10-nand"),
68 COMPAT(ALTERA_SOCFPGA_CLK, "altr,clk-mgr"),
69 COMPAT(ALTERA_SOCFPGA_PINCTRL_SINGLE, "pinctrl-single"),
70 COMPAT(ALTERA_SOCFPGA_H2F_BRG, "altr,socfpga-hps2fpga-bridge"),
71 COMPAT(ALTERA_SOCFPGA_LWH2F_BRG, "altr,socfpga-lwhps2fpga-bridge"),
72 COMPAT(ALTERA_SOCFPGA_F2H_BRG, "altr,socfpga-fpga2hps-bridge"),
73 COMPAT(ALTERA_SOCFPGA_F2SDR0, "altr,socfpga-fpga2sdram0-bridge"),
74 COMPAT(ALTERA_SOCFPGA_F2SDR1, "altr,socfpga-fpga2sdram1-bridge"),
75 COMPAT(ALTERA_SOCFPGA_F2SDR2, "altr,socfpga-fpga2sdram2-bridge"),
76 COMPAT(ALTERA_SOCFPGA_FPGA0, "altr,socfpga-a10-fpga-mgr"),
77 COMPAT(ALTERA_SOCFPGA_NOC, "altr,socfpga-a10-noc"),
78 COMPAT(ALTERA_SOCFPGA_CLK_INIT, "altr,socfpga-a10-clk-init")
79 };
80
fdtdec_get_compatible(enum fdt_compat_id id)81 const char *fdtdec_get_compatible(enum fdt_compat_id id)
82 {
83 /* We allow reading of the 'unknown' ID for testing purposes */
84 assert(id >= 0 && id < COMPAT_COUNT);
85 return compat_names[id];
86 }
87
fdtdec_get_addr_size_fixed(const void * blob,int node,const char * prop_name,int index,int na,int ns,fdt_size_t * sizep,bool translate)88 fdt_addr_t fdtdec_get_addr_size_fixed(const void *blob, int node,
89 const char *prop_name, int index, int na,
90 int ns, fdt_size_t *sizep,
91 bool translate)
92 {
93 const fdt32_t *prop, *prop_end;
94 const fdt32_t *prop_addr, *prop_size, *prop_after_size;
95 int len;
96 fdt_addr_t addr;
97
98 debug("%s: %s: ", __func__, prop_name);
99
100 prop = fdt_getprop(blob, node, prop_name, &len);
101 if (!prop) {
102 debug("(not found)\n");
103 return FDT_ADDR_T_NONE;
104 }
105 prop_end = prop + (len / sizeof(*prop));
106
107 prop_addr = prop + (index * (na + ns));
108 prop_size = prop_addr + na;
109 prop_after_size = prop_size + ns;
110 if (prop_after_size > prop_end) {
111 debug("(not enough data: expected >= %d cells, got %d cells)\n",
112 (u32)(prop_after_size - prop), ((u32)(prop_end - prop)));
113 return FDT_ADDR_T_NONE;
114 }
115
116 #if CONFIG_IS_ENABLED(OF_TRANSLATE)
117 if (translate)
118 addr = fdt_translate_address(blob, node, prop_addr);
119 else
120 #endif
121 addr = fdtdec_get_number(prop_addr, na);
122
123 if (sizep) {
124 *sizep = fdtdec_get_number(prop_size, ns);
125 debug("addr=%08llx, size=%llx\n", (unsigned long long)addr,
126 (unsigned long long)*sizep);
127 } else {
128 debug("addr=%08llx\n", (unsigned long long)addr);
129 }
130
131 return addr;
132 }
133
fdtdec_get_addr_size_auto_parent(const void * blob,int parent,int node,const char * prop_name,int index,fdt_size_t * sizep,bool translate)134 fdt_addr_t fdtdec_get_addr_size_auto_parent(const void *blob, int parent,
135 int node, const char *prop_name,
136 int index, fdt_size_t *sizep,
137 bool translate)
138 {
139 int na, ns;
140
141 debug("%s: ", __func__);
142
143 na = fdt_address_cells(blob, parent);
144 if (na < 1) {
145 debug("(bad #address-cells)\n");
146 return FDT_ADDR_T_NONE;
147 }
148
149 ns = fdt_size_cells(blob, parent);
150 if (ns < 0) {
151 debug("(bad #size-cells)\n");
152 return FDT_ADDR_T_NONE;
153 }
154
155 debug("na=%d, ns=%d, ", na, ns);
156
157 return fdtdec_get_addr_size_fixed(blob, node, prop_name, index, na,
158 ns, sizep, translate);
159 }
160
fdtdec_get_addr_size_auto_noparent(const void * blob,int node,const char * prop_name,int index,fdt_size_t * sizep,bool translate)161 fdt_addr_t fdtdec_get_addr_size_auto_noparent(const void *blob, int node,
162 const char *prop_name, int index,
163 fdt_size_t *sizep,
164 bool translate)
165 {
166 int parent;
167
168 debug("%s: ", __func__);
169
170 parent = fdt_parent_offset(blob, node);
171 if (parent < 0) {
172 debug("(no parent found)\n");
173 return FDT_ADDR_T_NONE;
174 }
175
176 return fdtdec_get_addr_size_auto_parent(blob, parent, node, prop_name,
177 index, sizep, translate);
178 }
179
fdtdec_get_addr_size(const void * blob,int node,const char * prop_name,fdt_size_t * sizep)180 fdt_addr_t fdtdec_get_addr_size(const void *blob, int node,
181 const char *prop_name, fdt_size_t *sizep)
182 {
183 int ns = sizep ? (sizeof(fdt_size_t) / sizeof(fdt32_t)) : 0;
184
185 return fdtdec_get_addr_size_fixed(blob, node, prop_name, 0,
186 sizeof(fdt_addr_t) / sizeof(fdt32_t),
187 ns, sizep, false);
188 }
189
fdtdec_get_addr(const void * blob,int node,const char * prop_name)190 fdt_addr_t fdtdec_get_addr(const void *blob, int node, const char *prop_name)
191 {
192 return fdtdec_get_addr_size(blob, node, prop_name, NULL);
193 }
194
195 #if CONFIG_IS_ENABLED(PCI) && defined(CONFIG_DM_PCI)
fdtdec_get_pci_vendev(const void * blob,int node,u16 * vendor,u16 * device)196 int fdtdec_get_pci_vendev(const void *blob, int node, u16 *vendor, u16 *device)
197 {
198 const char *list, *end;
199 int len;
200
201 list = fdt_getprop(blob, node, "compatible", &len);
202 if (!list)
203 return -ENOENT;
204
205 end = list + len;
206 while (list < end) {
207 len = strlen(list);
208 if (len >= strlen("pciVVVV,DDDD")) {
209 char *s = strstr(list, "pci");
210
211 /*
212 * check if the string is something like pciVVVV,DDDD.RR
213 * or just pciVVVV,DDDD
214 */
215 if (s && s[7] == ',' &&
216 (s[12] == '.' || s[12] == 0)) {
217 s += 3;
218 *vendor = simple_strtol(s, NULL, 16);
219
220 s += 5;
221 *device = simple_strtol(s, NULL, 16);
222
223 return 0;
224 }
225 }
226 list += (len + 1);
227 }
228
229 return -ENOENT;
230 }
231
fdtdec_get_pci_bar32(const struct udevice * dev,struct fdt_pci_addr * addr,u32 * bar)232 int fdtdec_get_pci_bar32(const struct udevice *dev, struct fdt_pci_addr *addr,
233 u32 *bar)
234 {
235 int barnum;
236
237 /* extract the bar number from fdt_pci_addr */
238 barnum = addr->phys_hi & 0xff;
239 if (barnum < PCI_BASE_ADDRESS_0 || barnum > PCI_CARDBUS_CIS)
240 return -EINVAL;
241
242 barnum = (barnum - PCI_BASE_ADDRESS_0) / 4;
243 *bar = dm_pci_read_bar32(dev, barnum);
244
245 return 0;
246 }
247
fdtdec_get_pci_bus_range(const void * blob,int node,struct fdt_resource * res)248 int fdtdec_get_pci_bus_range(const void *blob, int node,
249 struct fdt_resource *res)
250 {
251 const u32 *values;
252 int len;
253
254 values = fdt_getprop(blob, node, "bus-range", &len);
255 if (!values || len < sizeof(*values) * 2)
256 return -EINVAL;
257
258 res->start = fdt32_to_cpu(*values++);
259 res->end = fdt32_to_cpu(*values);
260
261 return 0;
262 }
263 #endif
264
fdtdec_get_uint64(const void * blob,int node,const char * prop_name,uint64_t default_val)265 uint64_t fdtdec_get_uint64(const void *blob, int node, const char *prop_name,
266 uint64_t default_val)
267 {
268 const unaligned_fdt64_t *cell64;
269 int length;
270
271 cell64 = fdt_getprop(blob, node, prop_name, &length);
272 if (!cell64 || length < sizeof(*cell64))
273 return default_val;
274
275 return fdt64_to_cpu(*cell64);
276 }
277
fdtdec_get_is_enabled(const void * blob,int node)278 int fdtdec_get_is_enabled(const void *blob, int node)
279 {
280 const char *cell;
281
282 /*
283 * It should say "okay", so only allow that. Some fdts use "ok" but
284 * this is a bug. Please fix your device tree source file. See here
285 * for discussion:
286 *
287 * http://www.mail-archive.com/u-boot@lists.denx.de/msg71598.html
288 */
289 cell = fdt_getprop(blob, node, "status", NULL);
290 if (cell)
291 return strcmp(cell, "okay") == 0;
292 return 1;
293 }
294
fdtdec_lookup(const void * blob,int node)295 enum fdt_compat_id fdtdec_lookup(const void *blob, int node)
296 {
297 enum fdt_compat_id id;
298
299 /* Search our drivers */
300 for (id = COMPAT_UNKNOWN; id < COMPAT_COUNT; id++)
301 if (fdt_node_check_compatible(blob, node,
302 compat_names[id]) == 0)
303 return id;
304 return COMPAT_UNKNOWN;
305 }
306
fdtdec_next_compatible(const void * blob,int node,enum fdt_compat_id id)307 int fdtdec_next_compatible(const void *blob, int node, enum fdt_compat_id id)
308 {
309 return fdt_node_offset_by_compatible(blob, node, compat_names[id]);
310 }
311
fdtdec_next_compatible_subnode(const void * blob,int node,enum fdt_compat_id id,int * depthp)312 int fdtdec_next_compatible_subnode(const void *blob, int node,
313 enum fdt_compat_id id, int *depthp)
314 {
315 do {
316 node = fdt_next_node(blob, node, depthp);
317 } while (*depthp > 1);
318
319 /* If this is a direct subnode, and compatible, return it */
320 if (*depthp == 1 && 0 == fdt_node_check_compatible(
321 blob, node, compat_names[id]))
322 return node;
323
324 return -FDT_ERR_NOTFOUND;
325 }
326
fdtdec_next_alias(const void * blob,const char * name,enum fdt_compat_id id,int * upto)327 int fdtdec_next_alias(const void *blob, const char *name, enum fdt_compat_id id,
328 int *upto)
329 {
330 #define MAX_STR_LEN 20
331 char str[MAX_STR_LEN + 20];
332 int node, err;
333
334 /* snprintf() is not available */
335 assert(strlen(name) < MAX_STR_LEN);
336 sprintf(str, "%.*s%d", MAX_STR_LEN, name, *upto);
337 node = fdt_path_offset(blob, str);
338 if (node < 0)
339 return node;
340 err = fdt_node_check_compatible(blob, node, compat_names[id]);
341 if (err < 0)
342 return err;
343 if (err)
344 return -FDT_ERR_NOTFOUND;
345 (*upto)++;
346 return node;
347 }
348
fdtdec_find_aliases_for_id(const void * blob,const char * name,enum fdt_compat_id id,int * node_list,int maxcount)349 int fdtdec_find_aliases_for_id(const void *blob, const char *name,
350 enum fdt_compat_id id, int *node_list,
351 int maxcount)
352 {
353 memset(node_list, '\0', sizeof(*node_list) * maxcount);
354
355 return fdtdec_add_aliases_for_id(blob, name, id, node_list, maxcount);
356 }
357
358 /* TODO: Can we tighten this code up a little? */
fdtdec_add_aliases_for_id(const void * blob,const char * name,enum fdt_compat_id id,int * node_list,int maxcount)359 int fdtdec_add_aliases_for_id(const void *blob, const char *name,
360 enum fdt_compat_id id, int *node_list,
361 int maxcount)
362 {
363 int name_len = strlen(name);
364 int nodes[maxcount];
365 int num_found = 0;
366 int offset, node;
367 int alias_node;
368 int count;
369 int i, j;
370
371 /* find the alias node if present */
372 alias_node = fdt_path_offset(blob, "/aliases");
373
374 /*
375 * start with nothing, and we can assume that the root node can't
376 * match
377 */
378 memset(nodes, '\0', sizeof(nodes));
379
380 /* First find all the compatible nodes */
381 for (node = count = 0; node >= 0 && count < maxcount;) {
382 node = fdtdec_next_compatible(blob, node, id);
383 if (node >= 0)
384 nodes[count++] = node;
385 }
386 if (node >= 0)
387 debug("%s: warning: maxcount exceeded with alias '%s'\n",
388 __func__, name);
389
390 /* Now find all the aliases */
391 for (offset = fdt_first_property_offset(blob, alias_node);
392 offset > 0;
393 offset = fdt_next_property_offset(blob, offset)) {
394 const struct fdt_property *prop;
395 const char *path;
396 int number;
397 int found;
398
399 node = 0;
400 prop = fdt_get_property_by_offset(blob, offset, NULL);
401 path = fdt_string(blob, fdt32_to_cpu(prop->nameoff));
402 if (prop->len && 0 == strncmp(path, name, name_len))
403 node = fdt_path_offset(blob, prop->data);
404 if (node <= 0)
405 continue;
406
407 /* Get the alias number */
408 number = simple_strtoul(path + name_len, NULL, 10);
409 if (number < 0 || number >= maxcount) {
410 debug("%s: warning: alias '%s' is out of range\n",
411 __func__, path);
412 continue;
413 }
414
415 /* Make sure the node we found is actually in our list! */
416 found = -1;
417 for (j = 0; j < count; j++)
418 if (nodes[j] == node) {
419 found = j;
420 break;
421 }
422
423 if (found == -1) {
424 debug("%s: warning: alias '%s' points to a node "
425 "'%s' that is missing or is not compatible "
426 " with '%s'\n", __func__, path,
427 fdt_get_name(blob, node, NULL),
428 compat_names[id]);
429 continue;
430 }
431
432 /*
433 * Add this node to our list in the right place, and mark
434 * it as done.
435 */
436 if (fdtdec_get_is_enabled(blob, node)) {
437 if (node_list[number]) {
438 debug("%s: warning: alias '%s' requires that "
439 "a node be placed in the list in a "
440 "position which is already filled by "
441 "node '%s'\n", __func__, path,
442 fdt_get_name(blob, node, NULL));
443 continue;
444 }
445 node_list[number] = node;
446 if (number >= num_found)
447 num_found = number + 1;
448 }
449 nodes[found] = 0;
450 }
451
452 /* Add any nodes not mentioned by an alias */
453 for (i = j = 0; i < maxcount; i++) {
454 if (!node_list[i]) {
455 for (; j < maxcount; j++)
456 if (nodes[j] &&
457 fdtdec_get_is_enabled(blob, nodes[j]))
458 break;
459
460 /* Have we run out of nodes to add? */
461 if (j == maxcount)
462 break;
463
464 assert(!node_list[i]);
465 node_list[i] = nodes[j++];
466 if (i >= num_found)
467 num_found = i + 1;
468 }
469 }
470
471 return num_found;
472 }
473
fdtdec_get_alias_seq(const void * blob,const char * base,int offset,int * seqp)474 int fdtdec_get_alias_seq(const void *blob, const char *base, int offset,
475 int *seqp)
476 {
477 int base_len = strlen(base);
478 const char *find_name;
479 int find_namelen;
480 int prop_offset;
481 int aliases;
482
483 find_name = fdt_get_name(blob, offset, &find_namelen);
484 debug("Looking for '%s' at %d, name %s\n", base, offset, find_name);
485
486 aliases = fdt_path_offset(blob, "/aliases");
487 for (prop_offset = fdt_first_property_offset(blob, aliases);
488 prop_offset > 0;
489 prop_offset = fdt_next_property_offset(blob, prop_offset)) {
490 const char *prop;
491 const char *name;
492 const char *slash;
493 int len, val;
494
495 prop = fdt_getprop_by_offset(blob, prop_offset, &name, &len);
496 debug(" - %s, %s\n", name, prop);
497 if (len < find_namelen || *prop != '/' || prop[len - 1] ||
498 strncmp(name, base, base_len))
499 continue;
500
501 slash = strrchr(prop, '/');
502 if (strcmp(slash + 1, find_name))
503 continue;
504
505 /*
506 * Adding an extra check to distinguish DT nodes with
507 * same name
508 */
509 if (IS_ENABLED(CONFIG_PHANDLE_CHECK_SEQ)) {
510 if (fdt_get_phandle(blob, offset) !=
511 fdt_get_phandle(blob, fdt_path_offset(blob, prop)))
512 continue;
513 }
514
515 val = trailing_strtol(name);
516 if (val != -1) {
517 *seqp = val;
518 debug("Found seq %d\n", *seqp);
519 return 0;
520 }
521 }
522
523 debug("Not found\n");
524 return -ENOENT;
525 }
526
fdtdec_get_alias_highest_id(const void * blob,const char * base)527 int fdtdec_get_alias_highest_id(const void *blob, const char *base)
528 {
529 int base_len = strlen(base);
530 int prop_offset;
531 int aliases;
532 int max = -1;
533
534 debug("Looking for highest alias id for '%s'\n", base);
535
536 aliases = fdt_path_offset(blob, "/aliases");
537 for (prop_offset = fdt_first_property_offset(blob, aliases);
538 prop_offset > 0;
539 prop_offset = fdt_next_property_offset(blob, prop_offset)) {
540 const char *prop;
541 const char *name;
542 int len, val;
543
544 prop = fdt_getprop_by_offset(blob, prop_offset, &name, &len);
545 debug(" - %s, %s\n", name, prop);
546 if (*prop != '/' || prop[len - 1] ||
547 strncmp(name, base, base_len))
548 continue;
549
550 val = trailing_strtol(name);
551 if (val > max) {
552 debug("Found seq %d\n", val);
553 max = val;
554 }
555 }
556
557 return max;
558 }
559
fdtdec_get_chosen_prop(const void * blob,const char * name)560 const char *fdtdec_get_chosen_prop(const void *blob, const char *name)
561 {
562 int chosen_node;
563
564 if (!blob)
565 return NULL;
566 chosen_node = fdt_path_offset(blob, "/chosen");
567 return fdt_getprop(blob, chosen_node, name, NULL);
568 }
569
fdtdec_get_chosen_node(const void * blob,const char * name)570 int fdtdec_get_chosen_node(const void *blob, const char *name)
571 {
572 const char *prop;
573
574 prop = fdtdec_get_chosen_prop(blob, name);
575 if (!prop)
576 return -FDT_ERR_NOTFOUND;
577 return fdt_path_offset(blob, prop);
578 }
579
fdtdec_check_fdt(void)580 int fdtdec_check_fdt(void)
581 {
582 /*
583 * We must have an FDT, but we cannot panic() yet since the console
584 * is not ready. So for now, just assert(). Boards which need an early
585 * FDT (prior to console ready) will need to make their own
586 * arrangements and do their own checks.
587 */
588 assert(!fdtdec_prepare_fdt());
589 return 0;
590 }
591
592 /*
593 * This function is a little odd in that it accesses global data. At some
594 * point if the architecture board.c files merge this will make more sense.
595 * Even now, it is common code.
596 */
fdtdec_prepare_fdt(void)597 int fdtdec_prepare_fdt(void)
598 {
599 if (!gd->fdt_blob || ((uintptr_t)gd->fdt_blob & 3) ||
600 fdt_check_header(gd->fdt_blob)) {
601 #ifdef CONFIG_SPL_BUILD
602 puts("Missing DTB\n");
603 #else
604 printf("No valid device tree binary found at %p\n",
605 gd->fdt_blob);
606 # ifdef DEBUG
607 if (gd->fdt_blob) {
608 printf("fdt_blob=%p\n", gd->fdt_blob);
609 print_buffer((ulong)gd->fdt_blob, gd->fdt_blob, 4,
610 32, 0);
611 }
612 # endif
613 #endif
614 return -1;
615 }
616 return 0;
617 }
618
fdtdec_lookup_phandle(const void * blob,int node,const char * prop_name)619 int fdtdec_lookup_phandle(const void *blob, int node, const char *prop_name)
620 {
621 const u32 *phandle;
622 int lookup;
623
624 debug("%s: %s\n", __func__, prop_name);
625 phandle = fdt_getprop(blob, node, prop_name, NULL);
626 if (!phandle)
627 return -FDT_ERR_NOTFOUND;
628
629 lookup = fdt_node_offset_by_phandle(blob, fdt32_to_cpu(*phandle));
630 return lookup;
631 }
632
633 /**
634 * Look up a property in a node and check that it has a minimum length.
635 *
636 * @param blob FDT blob
637 * @param node node to examine
638 * @param prop_name name of property to find
639 * @param min_len minimum property length in bytes
640 * @param err 0 if ok, or -FDT_ERR_NOTFOUND if the property is not
641 found, or -FDT_ERR_BADLAYOUT if not enough data
642 * @return pointer to cell, which is only valid if err == 0
643 */
get_prop_check_min_len(const void * blob,int node,const char * prop_name,int min_len,int * err)644 static const void *get_prop_check_min_len(const void *blob, int node,
645 const char *prop_name, int min_len,
646 int *err)
647 {
648 const void *cell;
649 int len;
650
651 debug("%s: %s\n", __func__, prop_name);
652 cell = fdt_getprop(blob, node, prop_name, &len);
653 if (!cell)
654 *err = -FDT_ERR_NOTFOUND;
655 else if (len < min_len)
656 *err = -FDT_ERR_BADLAYOUT;
657 else
658 *err = 0;
659 return cell;
660 }
661
fdtdec_get_int_array(const void * blob,int node,const char * prop_name,u32 * array,int count)662 int fdtdec_get_int_array(const void *blob, int node, const char *prop_name,
663 u32 *array, int count)
664 {
665 const u32 *cell;
666 int err = 0;
667
668 debug("%s: %s\n", __func__, prop_name);
669 cell = get_prop_check_min_len(blob, node, prop_name,
670 sizeof(u32) * count, &err);
671 if (!err) {
672 int i;
673
674 for (i = 0; i < count; i++)
675 array[i] = fdt32_to_cpu(cell[i]);
676 }
677 return err;
678 }
679
fdtdec_get_int_array_count(const void * blob,int node,const char * prop_name,u32 * array,int count)680 int fdtdec_get_int_array_count(const void *blob, int node,
681 const char *prop_name, u32 *array, int count)
682 {
683 const u32 *cell;
684 int len, elems;
685 int i;
686
687 debug("%s: %s\n", __func__, prop_name);
688 cell = fdt_getprop(blob, node, prop_name, &len);
689 if (!cell)
690 return -FDT_ERR_NOTFOUND;
691 elems = len / sizeof(u32);
692 if (count > elems)
693 count = elems;
694 for (i = 0; i < count; i++)
695 array[i] = fdt32_to_cpu(cell[i]);
696
697 return count;
698 }
699
fdtdec_locate_array(const void * blob,int node,const char * prop_name,int count)700 const u32 *fdtdec_locate_array(const void *blob, int node,
701 const char *prop_name, int count)
702 {
703 const u32 *cell;
704 int err;
705
706 cell = get_prop_check_min_len(blob, node, prop_name,
707 sizeof(u32) * count, &err);
708 return err ? NULL : cell;
709 }
710
fdtdec_get_bool(const void * blob,int node,const char * prop_name)711 int fdtdec_get_bool(const void *blob, int node, const char *prop_name)
712 {
713 const s32 *cell;
714 int len;
715
716 debug("%s: %s\n", __func__, prop_name);
717 cell = fdt_getprop(blob, node, prop_name, &len);
718 return cell != NULL;
719 }
720
fdtdec_parse_phandle_with_args(const void * blob,int src_node,const char * list_name,const char * cells_name,int cell_count,int index,struct fdtdec_phandle_args * out_args)721 int fdtdec_parse_phandle_with_args(const void *blob, int src_node,
722 const char *list_name,
723 const char *cells_name,
724 int cell_count, int index,
725 struct fdtdec_phandle_args *out_args)
726 {
727 const __be32 *list, *list_end;
728 int rc = 0, size, cur_index = 0;
729 uint32_t count = 0;
730 int node = -1;
731 int phandle;
732
733 /* Retrieve the phandle list property */
734 list = fdt_getprop(blob, src_node, list_name, &size);
735 if (!list)
736 return -ENOENT;
737 list_end = list + size / sizeof(*list);
738
739 /* Loop over the phandles until all the requested entry is found */
740 while (list < list_end) {
741 rc = -EINVAL;
742 count = 0;
743
744 /*
745 * If phandle is 0, then it is an empty entry with no
746 * arguments. Skip forward to the next entry.
747 */
748 phandle = be32_to_cpup(list++);
749 if (phandle) {
750 /*
751 * Find the provider node and parse the #*-cells
752 * property to determine the argument length.
753 *
754 * This is not needed if the cell count is hard-coded
755 * (i.e. cells_name not set, but cell_count is set),
756 * except when we're going to return the found node
757 * below.
758 */
759 if (cells_name || cur_index == index) {
760 node = fdt_node_offset_by_phandle(blob,
761 phandle);
762 if (node < 0) {
763 debug("%s: could not find phandle\n",
764 fdt_get_name(blob, src_node,
765 NULL));
766 goto err;
767 }
768 }
769
770 if (cells_name) {
771 count = fdtdec_get_int(blob, node, cells_name,
772 -1);
773 if (count == -1) {
774 debug("%s: could not get %s for %s\n",
775 fdt_get_name(blob, src_node,
776 NULL),
777 cells_name,
778 fdt_get_name(blob, node,
779 NULL));
780 goto err;
781 }
782 } else {
783 count = cell_count;
784 }
785
786 /*
787 * Make sure that the arguments actually fit in the
788 * remaining property data length
789 */
790 if (list + count > list_end) {
791 debug("%s: arguments longer than property\n",
792 fdt_get_name(blob, src_node, NULL));
793 goto err;
794 }
795 }
796
797 /*
798 * All of the error cases above bail out of the loop, so at
799 * this point, the parsing is successful. If the requested
800 * index matches, then fill the out_args structure and return,
801 * or return -ENOENT for an empty entry.
802 */
803 rc = -ENOENT;
804 if (cur_index == index) {
805 if (!phandle)
806 goto err;
807
808 if (out_args) {
809 int i;
810
811 if (count > MAX_PHANDLE_ARGS) {
812 debug("%s: too many arguments %d\n",
813 fdt_get_name(blob, src_node,
814 NULL), count);
815 count = MAX_PHANDLE_ARGS;
816 }
817 out_args->node = node;
818 out_args->args_count = count;
819 for (i = 0; i < count; i++) {
820 out_args->args[i] =
821 be32_to_cpup(list++);
822 }
823 }
824
825 /* Found it! return success */
826 return 0;
827 }
828
829 node = -1;
830 list += count;
831 cur_index++;
832 }
833
834 /*
835 * Result will be one of:
836 * -ENOENT : index is for empty phandle
837 * -EINVAL : parsing error on data
838 * [1..n] : Number of phandle (count mode; when index = -1)
839 */
840 rc = index < 0 ? cur_index : -ENOENT;
841 err:
842 return rc;
843 }
844
fdtdec_get_byte_array(const void * blob,int node,const char * prop_name,u8 * array,int count)845 int fdtdec_get_byte_array(const void *blob, int node, const char *prop_name,
846 u8 *array, int count)
847 {
848 const u8 *cell;
849 int err;
850
851 cell = get_prop_check_min_len(blob, node, prop_name, count, &err);
852 if (!err)
853 memcpy(array, cell, count);
854 return err;
855 }
856
fdtdec_locate_byte_array(const void * blob,int node,const char * prop_name,int count)857 const u8 *fdtdec_locate_byte_array(const void *blob, int node,
858 const char *prop_name, int count)
859 {
860 const u8 *cell;
861 int err;
862
863 cell = get_prop_check_min_len(blob, node, prop_name, count, &err);
864 if (err)
865 return NULL;
866 return cell;
867 }
868
fdtdec_get_config_int(const void * blob,const char * prop_name,int default_val)869 int fdtdec_get_config_int(const void *blob, const char *prop_name,
870 int default_val)
871 {
872 int config_node;
873
874 debug("%s: %s\n", __func__, prop_name);
875 config_node = fdt_path_offset(blob, "/config");
876 if (config_node < 0)
877 return default_val;
878 return fdtdec_get_int(blob, config_node, prop_name, default_val);
879 }
880
fdtdec_get_config_bool(const void * blob,const char * prop_name)881 int fdtdec_get_config_bool(const void *blob, const char *prop_name)
882 {
883 int config_node;
884 const void *prop;
885
886 debug("%s: %s\n", __func__, prop_name);
887 config_node = fdt_path_offset(blob, "/config");
888 if (config_node < 0)
889 return 0;
890 prop = fdt_get_property(blob, config_node, prop_name, NULL);
891
892 return prop != NULL;
893 }
894
fdtdec_get_config_string(const void * blob,const char * prop_name)895 char *fdtdec_get_config_string(const void *blob, const char *prop_name)
896 {
897 const char *nodep;
898 int nodeoffset;
899 int len;
900
901 debug("%s: %s\n", __func__, prop_name);
902 nodeoffset = fdt_path_offset(blob, "/config");
903 if (nodeoffset < 0)
904 return NULL;
905
906 nodep = fdt_getprop(blob, nodeoffset, prop_name, &len);
907 if (!nodep)
908 return NULL;
909
910 return (char *)nodep;
911 }
912
fdtdec_get_number(const fdt32_t * ptr,unsigned int cells)913 u64 fdtdec_get_number(const fdt32_t *ptr, unsigned int cells)
914 {
915 u64 number = 0;
916
917 while (cells--)
918 number = (number << 32) | fdt32_to_cpu(*ptr++);
919
920 return number;
921 }
922
fdt_get_resource(const void * fdt,int node,const char * property,unsigned int index,struct fdt_resource * res)923 int fdt_get_resource(const void *fdt, int node, const char *property,
924 unsigned int index, struct fdt_resource *res)
925 {
926 const fdt32_t *ptr, *end;
927 int na, ns, len, parent;
928 unsigned int i = 0;
929
930 parent = fdt_parent_offset(fdt, node);
931 if (parent < 0)
932 return parent;
933
934 na = fdt_address_cells(fdt, parent);
935 ns = fdt_size_cells(fdt, parent);
936
937 ptr = fdt_getprop(fdt, node, property, &len);
938 if (!ptr)
939 return len;
940
941 end = ptr + len / sizeof(*ptr);
942
943 while (ptr + na + ns <= end) {
944 if (i == index) {
945 if (CONFIG_IS_ENABLED(OF_TRANSLATE))
946 res->start = fdt_translate_address(fdt, node, ptr);
947 else
948 res->start = fdtdec_get_number(ptr, na);
949
950 res->end = res->start;
951 res->end += fdtdec_get_number(&ptr[na], ns) - 1;
952 return 0;
953 }
954
955 ptr += na + ns;
956 i++;
957 }
958
959 return -FDT_ERR_NOTFOUND;
960 }
961
fdt_get_named_resource(const void * fdt,int node,const char * property,const char * prop_names,const char * name,struct fdt_resource * res)962 int fdt_get_named_resource(const void *fdt, int node, const char *property,
963 const char *prop_names, const char *name,
964 struct fdt_resource *res)
965 {
966 int index;
967
968 index = fdt_stringlist_search(fdt, node, prop_names, name);
969 if (index < 0)
970 return index;
971
972 return fdt_get_resource(fdt, node, property, index, res);
973 }
974
decode_timing_property(const void * blob,int node,const char * name,struct timing_entry * result)975 static int decode_timing_property(const void *blob, int node, const char *name,
976 struct timing_entry *result)
977 {
978 int length, ret = 0;
979 const u32 *prop;
980
981 prop = fdt_getprop(blob, node, name, &length);
982 if (!prop) {
983 debug("%s: could not find property %s\n",
984 fdt_get_name(blob, node, NULL), name);
985 return length;
986 }
987
988 if (length == sizeof(u32)) {
989 result->typ = fdtdec_get_int(blob, node, name, 0);
990 result->min = result->typ;
991 result->max = result->typ;
992 } else {
993 ret = fdtdec_get_int_array(blob, node, name, &result->min, 3);
994 }
995
996 return ret;
997 }
998
fdtdec_decode_display_timing(const void * blob,int parent,int index,struct display_timing * dt)999 int fdtdec_decode_display_timing(const void *blob, int parent, int index,
1000 struct display_timing *dt)
1001 {
1002 int i, node, timings_node;
1003 u32 val = 0;
1004 int ret = 0;
1005
1006 timings_node = fdt_subnode_offset(blob, parent, "display-timings");
1007 if (timings_node < 0)
1008 return timings_node;
1009
1010 for (i = 0, node = fdt_first_subnode(blob, timings_node);
1011 node > 0 && i != index;
1012 node = fdt_next_subnode(blob, node))
1013 i++;
1014
1015 if (node < 0)
1016 return node;
1017
1018 memset(dt, 0, sizeof(*dt));
1019
1020 ret |= decode_timing_property(blob, node, "hback-porch",
1021 &dt->hback_porch);
1022 ret |= decode_timing_property(blob, node, "hfront-porch",
1023 &dt->hfront_porch);
1024 ret |= decode_timing_property(blob, node, "hactive", &dt->hactive);
1025 ret |= decode_timing_property(blob, node, "hsync-len", &dt->hsync_len);
1026 ret |= decode_timing_property(blob, node, "vback-porch",
1027 &dt->vback_porch);
1028 ret |= decode_timing_property(blob, node, "vfront-porch",
1029 &dt->vfront_porch);
1030 ret |= decode_timing_property(blob, node, "vactive", &dt->vactive);
1031 ret |= decode_timing_property(blob, node, "vsync-len", &dt->vsync_len);
1032 ret |= decode_timing_property(blob, node, "clock-frequency",
1033 &dt->pixelclock);
1034
1035 dt->flags = 0;
1036 val = fdtdec_get_int(blob, node, "vsync-active", -1);
1037 if (val != -1) {
1038 dt->flags |= val ? DISPLAY_FLAGS_VSYNC_HIGH :
1039 DISPLAY_FLAGS_VSYNC_LOW;
1040 }
1041 val = fdtdec_get_int(blob, node, "hsync-active", -1);
1042 if (val != -1) {
1043 dt->flags |= val ? DISPLAY_FLAGS_HSYNC_HIGH :
1044 DISPLAY_FLAGS_HSYNC_LOW;
1045 }
1046 val = fdtdec_get_int(blob, node, "de-active", -1);
1047 if (val != -1) {
1048 dt->flags |= val ? DISPLAY_FLAGS_DE_HIGH :
1049 DISPLAY_FLAGS_DE_LOW;
1050 }
1051 val = fdtdec_get_int(blob, node, "pixelclk-active", -1);
1052 if (val != -1) {
1053 dt->flags |= val ? DISPLAY_FLAGS_PIXDATA_POSEDGE :
1054 DISPLAY_FLAGS_PIXDATA_NEGEDGE;
1055 }
1056
1057 if (fdtdec_get_bool(blob, node, "interlaced"))
1058 dt->flags |= DISPLAY_FLAGS_INTERLACED;
1059 if (fdtdec_get_bool(blob, node, "doublescan"))
1060 dt->flags |= DISPLAY_FLAGS_DOUBLESCAN;
1061 if (fdtdec_get_bool(blob, node, "doubleclk"))
1062 dt->flags |= DISPLAY_FLAGS_DOUBLECLK;
1063
1064 return ret;
1065 }
1066
fdtdec_setup_mem_size_base(void)1067 int fdtdec_setup_mem_size_base(void)
1068 {
1069 int ret;
1070 ofnode mem;
1071 struct resource res;
1072
1073 mem = ofnode_path("/memory");
1074 if (!ofnode_valid(mem)) {
1075 debug("%s: Missing /memory node\n", __func__);
1076 return -EINVAL;
1077 }
1078
1079 ret = ofnode_read_resource(mem, 0, &res);
1080 if (ret != 0) {
1081 debug("%s: Unable to decode first memory bank\n", __func__);
1082 return -EINVAL;
1083 }
1084
1085 gd->ram_size = (phys_size_t)(res.end - res.start + 1);
1086 gd->ram_base = (unsigned long)res.start;
1087 debug("%s: Initial DRAM size %llx\n", __func__,
1088 (unsigned long long)gd->ram_size);
1089
1090 return 0;
1091 }
1092
get_next_memory_node(ofnode mem)1093 ofnode get_next_memory_node(ofnode mem)
1094 {
1095 do {
1096 mem = ofnode_by_prop_value(mem, "device_type", "memory", 7);
1097 } while (!ofnode_is_available(mem));
1098
1099 return mem;
1100 }
1101
fdtdec_setup_memory_banksize(void)1102 int fdtdec_setup_memory_banksize(void)
1103 {
1104 int bank, ret, reg = 0;
1105 struct resource res;
1106 ofnode mem = ofnode_null();
1107
1108 mem = get_next_memory_node(mem);
1109 if (!ofnode_valid(mem)) {
1110 debug("%s: Missing /memory node\n", __func__);
1111 return -EINVAL;
1112 }
1113
1114 for (bank = 0; bank < CONFIG_NR_DRAM_BANKS; bank++) {
1115 ret = ofnode_read_resource(mem, reg++, &res);
1116 if (ret < 0) {
1117 reg = 0;
1118 mem = get_next_memory_node(mem);
1119 if (!ofnode_valid(mem))
1120 break;
1121
1122 ret = ofnode_read_resource(mem, reg++, &res);
1123 if (ret < 0)
1124 break;
1125 }
1126
1127 if (ret != 0)
1128 return -EINVAL;
1129
1130 gd->bd->bi_dram[bank].start = (phys_addr_t)res.start;
1131 gd->bd->bi_dram[bank].size =
1132 (phys_size_t)(res.end - res.start + 1);
1133
1134 debug("%s: DRAM Bank #%d: start = 0x%llx, size = 0x%llx\n",
1135 __func__, bank,
1136 (unsigned long long)gd->bd->bi_dram[bank].start,
1137 (unsigned long long)gd->bd->bi_dram[bank].size);
1138 }
1139
1140 return 0;
1141 }
1142
fdtdec_setup_mem_size_base_lowest(void)1143 int fdtdec_setup_mem_size_base_lowest(void)
1144 {
1145 int bank, ret, reg = 0;
1146 struct resource res;
1147 unsigned long base;
1148 phys_size_t size;
1149 ofnode mem = ofnode_null();
1150
1151 gd->ram_base = (unsigned long)~0;
1152
1153 mem = get_next_memory_node(mem);
1154 if (!ofnode_valid(mem)) {
1155 debug("%s: Missing /memory node\n", __func__);
1156 return -EINVAL;
1157 }
1158
1159 for (bank = 0; bank < CONFIG_NR_DRAM_BANKS; bank++) {
1160 ret = ofnode_read_resource(mem, reg++, &res);
1161 if (ret < 0) {
1162 reg = 0;
1163 mem = get_next_memory_node(mem);
1164 if (!ofnode_valid(mem))
1165 break;
1166
1167 ret = ofnode_read_resource(mem, reg++, &res);
1168 if (ret < 0)
1169 break;
1170 }
1171
1172 if (ret != 0)
1173 return -EINVAL;
1174
1175 base = (unsigned long)res.start;
1176 size = (phys_size_t)(res.end - res.start + 1);
1177
1178 if (gd->ram_base > base && size) {
1179 gd->ram_base = base;
1180 gd->ram_size = size;
1181 debug("%s: Initial DRAM base %lx size %lx\n",
1182 __func__, base, (unsigned long)size);
1183 }
1184 }
1185
1186 return 0;
1187 }
1188
1189 #if CONFIG_IS_ENABLED(MULTI_DTB_FIT)
1190 # if CONFIG_IS_ENABLED(MULTI_DTB_FIT_GZIP) ||\
1191 CONFIG_IS_ENABLED(MULTI_DTB_FIT_LZO)
uncompress_blob(const void * src,ulong sz_src,void ** dstp)1192 static int uncompress_blob(const void *src, ulong sz_src, void **dstp)
1193 {
1194 size_t sz_out = CONFIG_VAL(MULTI_DTB_FIT_UNCOMPRESS_SZ);
1195 bool gzip = 0, lzo = 0;
1196 ulong sz_in = sz_src;
1197 void *dst;
1198 int rc;
1199
1200 if (CONFIG_IS_ENABLED(GZIP))
1201 if (gzip_parse_header(src, sz_in) >= 0)
1202 gzip = 1;
1203 if (CONFIG_IS_ENABLED(LZO))
1204 if (!gzip && lzop_is_valid_header(src))
1205 lzo = 1;
1206
1207 if (!gzip && !lzo)
1208 return -EBADMSG;
1209
1210
1211 if (CONFIG_IS_ENABLED(MULTI_DTB_FIT_DYN_ALLOC)) {
1212 dst = malloc(sz_out);
1213 if (!dst) {
1214 puts("uncompress_blob: Unable to allocate memory\n");
1215 return -ENOMEM;
1216 }
1217 } else {
1218 # if CONFIG_IS_ENABLED(MULTI_DTB_FIT_USER_DEFINED_AREA)
1219 dst = (void *)CONFIG_VAL(MULTI_DTB_FIT_USER_DEF_ADDR);
1220 # else
1221 return -ENOTSUPP;
1222 # endif
1223 }
1224
1225 if (CONFIG_IS_ENABLED(GZIP) && gzip)
1226 rc = gunzip(dst, sz_out, (u8 *)src, &sz_in);
1227 else if (CONFIG_IS_ENABLED(LZO) && lzo)
1228 rc = lzop_decompress(src, sz_in, dst, &sz_out);
1229 else
1230 hang();
1231
1232 if (rc < 0) {
1233 /* not a valid compressed blob */
1234 puts("uncompress_blob: Unable to uncompress\n");
1235 if (CONFIG_IS_ENABLED(MULTI_DTB_FIT_DYN_ALLOC))
1236 free(dst);
1237 return -EBADMSG;
1238 }
1239 *dstp = dst;
1240 return 0;
1241 }
1242 # else
uncompress_blob(const void * src,ulong sz_src,void ** dstp)1243 static int uncompress_blob(const void *src, ulong sz_src, void **dstp)
1244 {
1245 *dstp = (void *)src;
1246 return 0;
1247 }
1248 # endif
1249 #endif
1250
1251 #if defined(CONFIG_OF_BOARD) || defined(CONFIG_OF_SEPARATE)
1252 /*
1253 * For CONFIG_OF_SEPARATE, the board may optionally implement this to
1254 * provide and/or fixup the fdt.
1255 */
board_fdt_blob_setup(void)1256 __weak void *board_fdt_blob_setup(void)
1257 {
1258 void *fdt_blob = NULL;
1259 #ifdef CONFIG_SPL_BUILD
1260 /* FDT is at end of BSS unless it is in a different memory region */
1261 if (IS_ENABLED(CONFIG_SPL_SEPARATE_BSS))
1262 fdt_blob = (ulong *)&_image_binary_end;
1263 else
1264 fdt_blob = (ulong *)&__bss_end;
1265 #else
1266 /* FDT is at end of image */
1267 fdt_blob = (ulong *)&_end;
1268 #endif
1269 return fdt_blob;
1270 }
1271 #endif
1272
fdtdec_set_ethernet_mac_address(void * fdt,const u8 * mac,size_t size)1273 int fdtdec_set_ethernet_mac_address(void *fdt, const u8 *mac, size_t size)
1274 {
1275 const char *path;
1276 int offset, err;
1277
1278 if (!is_valid_ethaddr(mac))
1279 return -EINVAL;
1280
1281 path = fdt_get_alias(fdt, "ethernet");
1282 if (!path)
1283 return 0;
1284
1285 debug("ethernet alias found: %s\n", path);
1286
1287 offset = fdt_path_offset(fdt, path);
1288 if (offset < 0) {
1289 debug("ethernet alias points to absent node %s\n", path);
1290 return -ENOENT;
1291 }
1292
1293 err = fdt_setprop_inplace(fdt, offset, "local-mac-address", mac, size);
1294 if (err < 0)
1295 return err;
1296
1297 debug("MAC address: %pM\n", mac);
1298
1299 return 0;
1300 }
1301
fdtdec_init_reserved_memory(void * blob)1302 static int fdtdec_init_reserved_memory(void *blob)
1303 {
1304 int na, ns, node, err;
1305 fdt32_t value;
1306
1307 /* inherit #address-cells and #size-cells from the root node */
1308 na = fdt_address_cells(blob, 0);
1309 ns = fdt_size_cells(blob, 0);
1310
1311 node = fdt_add_subnode(blob, 0, "reserved-memory");
1312 if (node < 0)
1313 return node;
1314
1315 err = fdt_setprop(blob, node, "ranges", NULL, 0);
1316 if (err < 0)
1317 return err;
1318
1319 value = cpu_to_fdt32(ns);
1320
1321 err = fdt_setprop(blob, node, "#size-cells", &value, sizeof(value));
1322 if (err < 0)
1323 return err;
1324
1325 value = cpu_to_fdt32(na);
1326
1327 err = fdt_setprop(blob, node, "#address-cells", &value, sizeof(value));
1328 if (err < 0)
1329 return err;
1330
1331 return node;
1332 }
1333
fdtdec_add_reserved_memory(void * blob,const char * basename,const struct fdt_memory * carveout,uint32_t * phandlep,bool no_map)1334 int fdtdec_add_reserved_memory(void *blob, const char *basename,
1335 const struct fdt_memory *carveout,
1336 uint32_t *phandlep, bool no_map)
1337 {
1338 fdt32_t cells[4] = {}, *ptr = cells;
1339 uint32_t upper, lower, phandle;
1340 int parent, node, na, ns, err;
1341 fdt_size_t size;
1342 char name[64];
1343
1344 /* create an empty /reserved-memory node if one doesn't exist */
1345 parent = fdt_path_offset(blob, "/reserved-memory");
1346 if (parent < 0) {
1347 parent = fdtdec_init_reserved_memory(blob);
1348 if (parent < 0)
1349 return parent;
1350 }
1351
1352 /* only 1 or 2 #address-cells and #size-cells are supported */
1353 na = fdt_address_cells(blob, parent);
1354 if (na < 1 || na > 2)
1355 return -FDT_ERR_BADNCELLS;
1356
1357 ns = fdt_size_cells(blob, parent);
1358 if (ns < 1 || ns > 2)
1359 return -FDT_ERR_BADNCELLS;
1360
1361 /* find a matching node and return the phandle to that */
1362 fdt_for_each_subnode(node, blob, parent) {
1363 const char *name = fdt_get_name(blob, node, NULL);
1364 fdt_addr_t addr;
1365 fdt_size_t size;
1366
1367 addr = fdtdec_get_addr_size_fixed(blob, node, "reg", 0, na, ns,
1368 &size, false);
1369 if (addr == FDT_ADDR_T_NONE) {
1370 debug("failed to read address/size for %s\n", name);
1371 continue;
1372 }
1373
1374 if (addr == carveout->start && (addr + size - 1) ==
1375 carveout->end) {
1376 if (phandlep)
1377 *phandlep = fdt_get_phandle(blob, node);
1378 return 0;
1379 }
1380 }
1381
1382 /*
1383 * Unpack the start address and generate the name of the new node
1384 * base on the basename and the unit-address.
1385 */
1386 upper = upper_32_bits(carveout->start);
1387 lower = lower_32_bits(carveout->start);
1388
1389 if (na > 1 && upper > 0)
1390 snprintf(name, sizeof(name), "%s@%x,%x", basename, upper,
1391 lower);
1392 else {
1393 if (upper > 0) {
1394 debug("address %08x:%08x exceeds addressable space\n",
1395 upper, lower);
1396 return -FDT_ERR_BADVALUE;
1397 }
1398
1399 snprintf(name, sizeof(name), "%s@%x", basename, lower);
1400 }
1401
1402 node = fdt_add_subnode(blob, parent, name);
1403 if (node < 0)
1404 return node;
1405
1406 if (phandlep) {
1407 err = fdt_generate_phandle(blob, &phandle);
1408 if (err < 0)
1409 return err;
1410
1411 err = fdtdec_set_phandle(blob, node, phandle);
1412 if (err < 0)
1413 return err;
1414 }
1415
1416 /* store one or two address cells */
1417 if (na > 1)
1418 *ptr++ = cpu_to_fdt32(upper);
1419
1420 *ptr++ = cpu_to_fdt32(lower);
1421
1422 /* store one or two size cells */
1423 size = carveout->end - carveout->start + 1;
1424 upper = upper_32_bits(size);
1425 lower = lower_32_bits(size);
1426
1427 if (ns > 1)
1428 *ptr++ = cpu_to_fdt32(upper);
1429
1430 *ptr++ = cpu_to_fdt32(lower);
1431
1432 err = fdt_setprop(blob, node, "reg", cells, (na + ns) * sizeof(*cells));
1433 if (err < 0)
1434 return err;
1435
1436 if (no_map) {
1437 err = fdt_setprop(blob, node, "no-map", NULL, 0);
1438 if (err < 0)
1439 return err;
1440 }
1441
1442 /* return the phandle for the new node for the caller to use */
1443 if (phandlep)
1444 *phandlep = phandle;
1445
1446 return 0;
1447 }
1448
fdtdec_get_carveout(const void * blob,const char * node,const char * name,unsigned int index,struct fdt_memory * carveout)1449 int fdtdec_get_carveout(const void *blob, const char *node, const char *name,
1450 unsigned int index, struct fdt_memory *carveout)
1451 {
1452 const fdt32_t *prop;
1453 uint32_t phandle;
1454 int offset, len;
1455 fdt_size_t size;
1456
1457 offset = fdt_path_offset(blob, node);
1458 if (offset < 0)
1459 return offset;
1460
1461 prop = fdt_getprop(blob, offset, name, &len);
1462 if (!prop) {
1463 debug("failed to get %s for %s\n", name, node);
1464 return -FDT_ERR_NOTFOUND;
1465 }
1466
1467 if ((len % sizeof(phandle)) != 0) {
1468 debug("invalid phandle property\n");
1469 return -FDT_ERR_BADPHANDLE;
1470 }
1471
1472 if (len < (sizeof(phandle) * (index + 1))) {
1473 debug("invalid phandle index\n");
1474 return -FDT_ERR_BADPHANDLE;
1475 }
1476
1477 phandle = fdt32_to_cpu(prop[index]);
1478
1479 offset = fdt_node_offset_by_phandle(blob, phandle);
1480 if (offset < 0) {
1481 debug("failed to find node for phandle %u\n", phandle);
1482 return offset;
1483 }
1484
1485 carveout->start = fdtdec_get_addr_size_auto_noparent(blob, offset,
1486 "reg", 0, &size,
1487 true);
1488 if (carveout->start == FDT_ADDR_T_NONE) {
1489 debug("failed to read address/size from \"reg\" property\n");
1490 return -FDT_ERR_NOTFOUND;
1491 }
1492
1493 carveout->end = carveout->start + size - 1;
1494
1495 return 0;
1496 }
1497
fdtdec_set_carveout(void * blob,const char * node,const char * prop_name,unsigned int index,const char * name,const struct fdt_memory * carveout)1498 int fdtdec_set_carveout(void *blob, const char *node, const char *prop_name,
1499 unsigned int index, const char *name,
1500 const struct fdt_memory *carveout)
1501 {
1502 uint32_t phandle;
1503 int err, offset, len;
1504 fdt32_t value;
1505 void *prop;
1506
1507 err = fdtdec_add_reserved_memory(blob, name, carveout, &phandle, false);
1508 if (err < 0) {
1509 debug("failed to add reserved memory: %d\n", err);
1510 return err;
1511 }
1512
1513 offset = fdt_path_offset(blob, node);
1514 if (offset < 0) {
1515 debug("failed to find offset for node %s: %d\n", node, offset);
1516 return offset;
1517 }
1518
1519 value = cpu_to_fdt32(phandle);
1520
1521 if (!fdt_getprop(blob, offset, prop_name, &len)) {
1522 if (len == -FDT_ERR_NOTFOUND)
1523 len = 0;
1524 else
1525 return len;
1526 }
1527
1528 if ((index + 1) * sizeof(value) > len) {
1529 err = fdt_setprop_placeholder(blob, offset, prop_name,
1530 (index + 1) * sizeof(value),
1531 &prop);
1532 if (err < 0) {
1533 debug("failed to resize reserved memory property: %s\n",
1534 fdt_strerror(err));
1535 return err;
1536 }
1537 }
1538
1539 err = fdt_setprop_inplace_namelen_partial(blob, offset, prop_name,
1540 strlen(prop_name),
1541 index * sizeof(value),
1542 &value, sizeof(value));
1543 if (err < 0) {
1544 debug("failed to update %s property for node %s: %s\n",
1545 prop_name, node, fdt_strerror(err));
1546 return err;
1547 }
1548
1549 return 0;
1550 }
1551
fdtdec_board_setup(const void * fdt_blob)1552 __weak int fdtdec_board_setup(const void *fdt_blob)
1553 {
1554 return 0;
1555 }
1556
fdtdec_setup(void)1557 int fdtdec_setup(void)
1558 {
1559 int ret;
1560 #if CONFIG_IS_ENABLED(OF_CONTROL)
1561 # if CONFIG_IS_ENABLED(MULTI_DTB_FIT)
1562 void *fdt_blob;
1563 # endif
1564 # ifdef CONFIG_OF_EMBED
1565 /* Get a pointer to the FDT */
1566 # ifdef CONFIG_SPL_BUILD
1567 gd->fdt_blob = __dtb_dt_spl_begin;
1568 # else
1569 gd->fdt_blob = __dtb_dt_begin;
1570 # endif
1571 # elif defined(CONFIG_OF_BOARD) || defined(CONFIG_OF_SEPARATE)
1572 /* Allow the board to override the fdt address. */
1573 gd->fdt_blob = board_fdt_blob_setup();
1574 # elif defined(CONFIG_OF_HOSTFILE)
1575 if (sandbox_read_fdt_from_file()) {
1576 puts("Failed to read control FDT\n");
1577 return -1;
1578 }
1579 # elif defined(CONFIG_OF_PRIOR_STAGE)
1580 gd->fdt_blob = (void *)(uintptr_t)prior_stage_fdt_address;
1581 # endif
1582 # ifndef CONFIG_SPL_BUILD
1583 /* Allow the early environment to override the fdt address */
1584 gd->fdt_blob = map_sysmem
1585 (env_get_ulong("fdtcontroladdr", 16,
1586 (unsigned long)map_to_sysmem(gd->fdt_blob)), 0);
1587 # endif
1588
1589 # if CONFIG_IS_ENABLED(MULTI_DTB_FIT)
1590 /*
1591 * Try and uncompress the blob.
1592 * Unfortunately there is no way to know how big the input blob really
1593 * is. So let us set the maximum input size arbitrarily high. 16MB
1594 * ought to be more than enough for packed DTBs.
1595 */
1596 if (uncompress_blob(gd->fdt_blob, 0x1000000, &fdt_blob) == 0)
1597 gd->fdt_blob = fdt_blob;
1598
1599 /*
1600 * Check if blob is a FIT images containings DTBs.
1601 * If so, pick the most relevant
1602 */
1603 fdt_blob = locate_dtb_in_fit(gd->fdt_blob);
1604 if (fdt_blob) {
1605 gd->multi_dtb_fit = gd->fdt_blob;
1606 gd->fdt_blob = fdt_blob;
1607 }
1608
1609 # endif
1610 #endif
1611
1612 ret = fdtdec_prepare_fdt();
1613 if (!ret)
1614 ret = fdtdec_board_setup(gd->fdt_blob);
1615 return ret;
1616 }
1617
1618 #if CONFIG_IS_ENABLED(MULTI_DTB_FIT)
fdtdec_resetup(int * rescan)1619 int fdtdec_resetup(int *rescan)
1620 {
1621 void *fdt_blob;
1622
1623 /*
1624 * If the current DTB is part of a compressed FIT image,
1625 * try to locate the best match from the uncompressed
1626 * FIT image stillpresent there. Save the time and space
1627 * required to uncompress it again.
1628 */
1629 if (gd->multi_dtb_fit) {
1630 fdt_blob = locate_dtb_in_fit(gd->multi_dtb_fit);
1631
1632 if (fdt_blob == gd->fdt_blob) {
1633 /*
1634 * The best match did not change. no need to tear down
1635 * the DM and rescan the fdt.
1636 */
1637 *rescan = 0;
1638 return 0;
1639 }
1640
1641 *rescan = 1;
1642 gd->fdt_blob = fdt_blob;
1643 return fdtdec_prepare_fdt();
1644 }
1645
1646 /*
1647 * If multi_dtb_fit is NULL, it means that blob appended to u-boot is
1648 * not a FIT image containings DTB, but a single DTB. There is no need
1649 * to teard down DM and rescan the DT in this case.
1650 */
1651 *rescan = 0;
1652 return 0;
1653 }
1654 #endif
1655
fdtdec_decode_ram_size(const void * blob,const char * area,int board_id,phys_addr_t * basep,phys_size_t * sizep,struct bd_info * bd)1656 int fdtdec_decode_ram_size(const void *blob, const char *area, int board_id,
1657 phys_addr_t *basep, phys_size_t *sizep,
1658 struct bd_info *bd)
1659 {
1660 int addr_cells, size_cells;
1661 const u32 *cell, *end;
1662 u64 total_size, size, addr;
1663 int node, child;
1664 bool auto_size;
1665 int bank;
1666 int len;
1667
1668 debug("%s: board_id=%d\n", __func__, board_id);
1669 if (!area)
1670 area = "/memory";
1671 node = fdt_path_offset(blob, area);
1672 if (node < 0) {
1673 debug("No %s node found\n", area);
1674 return -ENOENT;
1675 }
1676
1677 cell = fdt_getprop(blob, node, "reg", &len);
1678 if (!cell) {
1679 debug("No reg property found\n");
1680 return -ENOENT;
1681 }
1682
1683 addr_cells = fdt_address_cells(blob, node);
1684 size_cells = fdt_size_cells(blob, node);
1685
1686 /* Check the board id and mask */
1687 for (child = fdt_first_subnode(blob, node);
1688 child >= 0;
1689 child = fdt_next_subnode(blob, child)) {
1690 int match_mask, match_value;
1691
1692 match_mask = fdtdec_get_int(blob, child, "match-mask", -1);
1693 match_value = fdtdec_get_int(blob, child, "match-value", -1);
1694
1695 if (match_value >= 0 &&
1696 ((board_id & match_mask) == match_value)) {
1697 /* Found matching mask */
1698 debug("Found matching mask %d\n", match_mask);
1699 node = child;
1700 cell = fdt_getprop(blob, node, "reg", &len);
1701 if (!cell) {
1702 debug("No memory-banks property found\n");
1703 return -EINVAL;
1704 }
1705 break;
1706 }
1707 }
1708 /* Note: if no matching subnode was found we use the parent node */
1709
1710 if (bd) {
1711 memset(bd->bi_dram, '\0', sizeof(bd->bi_dram[0]) *
1712 CONFIG_NR_DRAM_BANKS);
1713 }
1714
1715 auto_size = fdtdec_get_bool(blob, node, "auto-size");
1716
1717 total_size = 0;
1718 end = cell + len / 4 - addr_cells - size_cells;
1719 debug("cell at %p, end %p\n", cell, end);
1720 for (bank = 0; bank < CONFIG_NR_DRAM_BANKS; bank++) {
1721 if (cell > end)
1722 break;
1723 addr = 0;
1724 if (addr_cells == 2)
1725 addr += (u64)fdt32_to_cpu(*cell++) << 32UL;
1726 addr += fdt32_to_cpu(*cell++);
1727 if (bd)
1728 bd->bi_dram[bank].start = addr;
1729 if (basep && !bank)
1730 *basep = (phys_addr_t)addr;
1731
1732 size = 0;
1733 if (size_cells == 2)
1734 size += (u64)fdt32_to_cpu(*cell++) << 32UL;
1735 size += fdt32_to_cpu(*cell++);
1736
1737 if (auto_size) {
1738 u64 new_size;
1739
1740 debug("Auto-sizing %llx, size %llx: ", addr, size);
1741 new_size = get_ram_size((long *)(uintptr_t)addr, size);
1742 if (new_size == size) {
1743 debug("OK\n");
1744 } else {
1745 debug("sized to %llx\n", new_size);
1746 size = new_size;
1747 }
1748 }
1749
1750 if (bd)
1751 bd->bi_dram[bank].size = size;
1752 total_size += size;
1753 }
1754
1755 debug("Memory size %llu\n", total_size);
1756 if (sizep)
1757 *sizep = (phys_size_t)total_size;
1758
1759 return 0;
1760 }
1761
1762 #endif /* !USE_HOSTCC */
1763