1 /*
2 * Copyright 2007-2011 Freescale Semiconductor, Inc.
3 * Authors: York Sun <yorksun@freescale.com>
4 * Timur Tabi <timur@freescale.com>
5 *
6 * FSL DIU Framebuffer driver
7 *
8 * SPDX-License-Identifier: GPL-2.0+
9 */
10
11 #include <common.h>
12 #include <command.h>
13 #include <asm/io.h>
14 #include <fsl_diu_fb.h>
15 #include "../common/pixis.h"
16
17 #define PX_BRDCFG0_DLINK 0x10
18 #define PX_BRDCFG0_DVISEL 0x08
19
diu_set_pixel_clock(unsigned int pixclock)20 void diu_set_pixel_clock(unsigned int pixclock)
21 {
22 volatile immap_t *immap = (immap_t *)CONFIG_SYS_IMMR;
23 volatile ccsr_gur_t *gur = &immap->im_gur;
24 volatile unsigned int *guts_clkdvdr = &gur->clkdvdr;
25 unsigned long speed_ccb, temp, pixval;
26
27 speed_ccb = get_bus_freq(0);
28 temp = 1000000000/pixclock;
29 temp *= 1000;
30 pixval = speed_ccb / temp;
31 debug("DIU pixval = %lu\n", pixval);
32
33 /* Modify PXCLK in GUTS CLKDVDR */
34 debug("DIU: Current value of CLKDVDR = 0x%08x\n", *guts_clkdvdr);
35 temp = *guts_clkdvdr & 0x2000FFFF;
36 *guts_clkdvdr = temp; /* turn off clock */
37 *guts_clkdvdr = temp | 0x80000000 | ((pixval & 0x1F) << 16);
38 debug("DIU: Modified value of CLKDVDR = 0x%08x\n", *guts_clkdvdr);
39 }
40
platform_diu_init(unsigned int xres,unsigned int yres,const char * port)41 int platform_diu_init(unsigned int xres, unsigned int yres, const char *port)
42 {
43 const char *name;
44 int gamma_fix = 0;
45 u32 pixel_format = 0x88883316;
46 u8 temp;
47
48 temp = in_8(&pixis->brdcfg0);
49
50 if (strncmp(port, "dlvds", 5) == 0) {
51 /* Dual link LVDS */
52 gamma_fix = 1;
53 temp &= ~(PX_BRDCFG0_DLINK | PX_BRDCFG0_DVISEL);
54 name = "Dual-Link LVDS";
55 } else if (strncmp(port, "lvds", 4) == 0) {
56 /* Single link LVDS */
57 temp = (temp & ~PX_BRDCFG0_DVISEL) | PX_BRDCFG0_DLINK;
58 name = "Single-Link LVDS";
59 } else {
60 /* DVI */
61 if (in_8(&pixis->ver) == 1) /* Board version */
62 pixel_format = 0x88882317;
63 temp |= PX_BRDCFG0_DVISEL;
64 name = "DVI";
65 }
66
67 printf("DIU: Switching to %s monitor @ %ux%u\n", name, xres, yres);
68 out_8(&pixis->brdcfg0, temp);
69
70 return fsl_diu_init(xres, yres, pixel_format, gamma_fix);
71 }
72