1 /* 2 * Voipac PXA270 configuration file 3 * 4 * Copyright (C) 2010 Marek Vasut <marek.vasut@gmail.com> 5 * 6 * SPDX-License-Identifier: GPL-2.0+ 7 */ 8 9 #ifndef __CONFIG_H 10 #define __CONFIG_H 11 12 /* 13 * High Level Board Configuration Options 14 */ 15 #define CONFIG_CPU_PXA27X 1 /* Marvell PXA270 CPU */ 16 #define CONFIG_VPAC270 1 /* Voipac PXA270 board */ 17 #define CONFIG_SYS_TEXT_BASE 0xa0000000 18 19 #ifdef CONFIG_ONENAND 20 #define CONFIG_SPL_ONENAND_SUPPORT 21 #define CONFIG_SPL_ONENAND_LOAD_ADDR 0x2000 22 #define CONFIG_SPL_ONENAND_LOAD_SIZE \ 23 (512 * 1024 - CONFIG_SPL_ONENAND_LOAD_ADDR) 24 #define CONFIG_SPL_TEXT_BASE 0x5c000000 25 #define CONFIG_SPL_LDSCRIPT "board/vpac270/u-boot-spl.lds" 26 #endif 27 28 /* 29 * Environment settings 30 */ 31 #define CONFIG_ENV_OVERWRITE 32 #define CONFIG_SYS_MALLOC_LEN (128*1024) 33 #define CONFIG_ARCH_CPU_INIT 34 #define CONFIG_BOOTCOMMAND \ 35 "if mmc init && fatload mmc 0 0xa4000000 uImage; then " \ 36 "bootm 0xa4000000; " \ 37 "fi; " \ 38 "if usb reset && fatload usb 0 0xa4000000 uImage; then " \ 39 "bootm 0xa4000000; " \ 40 "fi; " \ 41 "if ide reset && fatload ide 0 0xa4000000 uImage; then " \ 42 "bootm 0xa4000000; " \ 43 "fi; " \ 44 "bootm 0x60000;" 45 46 #define CONFIG_EXTRA_ENV_SETTINGS \ 47 "update_onenand=" \ 48 "onenand erase 0x0 0x80000 ; " \ 49 "onenand write 0xa0000000 0x0 0x80000" 50 51 #define CONFIG_BOOTARGS "console=tty0 console=ttyS0,115200" 52 #define CONFIG_TIMESTAMP 53 #define CONFIG_BOOTDELAY 2 /* Autoboot delay */ 54 #define CONFIG_CMDLINE_TAG 55 #define CONFIG_SETUP_MEMORY_TAGS 56 #define CONFIG_LZMA /* LZMA compression support */ 57 #define CONFIG_OF_LIBFDT 58 59 /* 60 * Serial Console Configuration 61 */ 62 #define CONFIG_PXA_SERIAL 63 #define CONFIG_FFUART 1 64 #define CONFIG_CONS_INDEX 3 65 #define CONFIG_BAUDRATE 115200 66 67 /* 68 * Bootloader Components Configuration 69 */ 70 #define CONFIG_CMD_ENV 71 #define CONFIG_CMD_MMC 72 #define CONFIG_CMD_USB 73 #undef CONFIG_LCD 74 #define CONFIG_CMD_IDE 75 76 #ifdef CONFIG_ONENAND 77 #define CONFIG_CMD_ONENAND 78 #else 79 #undef CONFIG_CMD_ONENAND 80 #endif 81 82 /* 83 * Networking Configuration 84 * chip on the Voipac PXA270 board 85 */ 86 #ifdef CONFIG_CMD_NET 87 #define CONFIG_CMD_PING 88 #define CONFIG_CMD_DHCP 89 90 #define CONFIG_DRIVER_DM9000 1 91 #define CONFIG_DM9000_BASE 0x08000300 /* CS2 */ 92 #define DM9000_IO (CONFIG_DM9000_BASE) 93 #define DM9000_DATA (CONFIG_DM9000_BASE + 4) 94 #define CONFIG_NET_RETRY_COUNT 10 95 96 #define CONFIG_BOOTP_BOOTFILESIZE 97 #define CONFIG_BOOTP_BOOTPATH 98 #define CONFIG_BOOTP_GATEWAY 99 #define CONFIG_BOOTP_HOSTNAME 100 #endif 101 102 /* 103 * MMC Card Configuration 104 */ 105 #ifdef CONFIG_CMD_MMC 106 #define CONFIG_MMC 107 #define CONFIG_GENERIC_MMC 108 #define CONFIG_PXA_MMC_GENERIC 109 #define CONFIG_SYS_MMC_BASE 0xF0000000 110 #define CONFIG_CMD_FAT 111 #define CONFIG_CMD_EXT2 112 #define CONFIG_DOS_PARTITION 113 #endif 114 115 /* 116 * KGDB 117 */ 118 #ifdef CONFIG_CMD_KGDB 119 #define CONFIG_KGDB_BAUDRATE 230400 /* kgdb serial port speed */ 120 #endif 121 122 /* 123 * HUSH Shell Configuration 124 */ 125 #define CONFIG_SYS_HUSH_PARSER 1 126 127 #define CONFIG_SYS_LONGHELP 128 #ifdef CONFIG_SYS_HUSH_PARSER 129 #define CONFIG_SYS_PROMPT "$ " 130 #else 131 #endif 132 #define CONFIG_SYS_CBSIZE 256 133 #define CONFIG_SYS_PBSIZE \ 134 (CONFIG_SYS_CBSIZE+sizeof(CONFIG_SYS_PROMPT)+16) 135 #define CONFIG_SYS_MAXARGS 16 136 #define CONFIG_SYS_BARGSIZE CONFIG_SYS_CBSIZE 137 #define CONFIG_SYS_DEVICE_NULLDEV 1 138 #define CONFIG_CMDLINE_EDITING 1 139 #define CONFIG_AUTO_COMPLETE 1 140 141 /* 142 * Clock Configuration 143 */ 144 #define CONFIG_SYS_CPUSPEED 0x190 /* 312MHz */ 145 146 147 /* 148 * DRAM Map 149 */ 150 #define CONFIG_NR_DRAM_BANKS 2 /* 2 banks of DRAM */ 151 #define PHYS_SDRAM_1 0xa0000000 /* SDRAM Bank #1 */ 152 #define PHYS_SDRAM_1_SIZE 0x08000000 /* 128 MB */ 153 154 #ifdef CONFIG_RAM_256M 155 #define PHYS_SDRAM_2 0x80000000 /* SDRAM Bank #2 */ 156 #define PHYS_SDRAM_2_SIZE 0x08000000 /* 128 MB */ 157 #endif 158 159 #define CONFIG_SYS_DRAM_BASE 0xa0000000 /* CS0 */ 160 #ifdef CONFIG_RAM_256M 161 #define CONFIG_SYS_DRAM_SIZE 0x10000000 /* 256 MB DRAM */ 162 #else 163 #define CONFIG_SYS_DRAM_SIZE 0x08000000 /* 128 MB DRAM */ 164 #endif 165 166 #define CONFIG_SYS_MEMTEST_START 0xa0400000 /* memtest works on */ 167 #define CONFIG_SYS_MEMTEST_END 0xa0800000 /* 4 ... 8 MB in DRAM */ 168 169 #define CONFIG_SYS_LOAD_ADDR PHYS_SDRAM_1 170 #define CONFIG_SYS_SDRAM_BASE PHYS_SDRAM_1 171 #define CONFIG_SYS_INIT_SP_ADDR 0x5c010000 172 173 /* 174 * NOR FLASH 175 */ 176 #define CONFIG_SYS_MONITOR_BASE 0x0 177 #define CONFIG_SYS_MONITOR_LEN 0x80000 178 #define CONFIG_ENV_ADDR \ 179 (CONFIG_SYS_MONITOR_BASE + CONFIG_SYS_MONITOR_LEN) 180 #define CONFIG_ENV_SIZE 0x20000 181 #define CONFIG_ENV_SECT_SIZE 0x20000 182 183 #if defined(CONFIG_CMD_FLASH) /* NOR */ 184 #define PHYS_FLASH_1 0x00000000 /* Flash Bank #1 */ 185 186 #ifdef CONFIG_RAM_256M 187 #define PHYS_FLASH_2 0x02000000 /* Flash Bank #2 */ 188 #endif 189 190 #define CONFIG_SYS_FLASH_CFI 191 #define CONFIG_FLASH_CFI_DRIVER 1 192 193 #define CONFIG_SYS_MAX_FLASH_SECT (4 + 255) 194 #ifdef CONFIG_RAM_256M 195 #define CONFIG_SYS_MAX_FLASH_BANKS 2 196 #define CONFIG_SYS_FLASH_BANKS_LIST { PHYS_FLASH_1, PHYS_FLASH_2 } 197 #else 198 #define CONFIG_SYS_MAX_FLASH_BANKS 1 199 #define CONFIG_SYS_FLASH_BASE PHYS_FLASH_1 200 #endif 201 202 #define CONFIG_SYS_FLASH_ERASE_TOUT (25*CONFIG_SYS_HZ) 203 #define CONFIG_SYS_FLASH_WRITE_TOUT (25*CONFIG_SYS_HZ) 204 205 #define CONFIG_SYS_FLASH_USE_BUFFER_WRITE 1 206 #define CONFIG_SYS_FLASH_PROTECTION 1 207 208 #define CONFIG_ENV_IS_IN_FLASH 1 209 210 #elif defined(CONFIG_CMD_ONENAND) /* OneNAND */ 211 #define CONFIG_SYS_NO_FLASH 212 #define CONFIG_SYS_ONENAND_BASE 0x00000000 213 214 #define CONFIG_ENV_IS_IN_ONENAND 1 215 216 #else /* No flash */ 217 #define CONFIG_SYS_NO_FLASH 218 #define CONFIG_ENV_IS_NOWHERE 219 #endif 220 221 /* 222 * IDE 223 */ 224 #ifdef CONFIG_CMD_IDE 225 #define CONFIG_LBA48 226 #undef CONFIG_IDE_LED 227 #undef CONFIG_IDE_RESET 228 229 #define __io 230 231 #define CONFIG_SYS_IDE_MAXBUS 1 232 #define CONFIG_SYS_IDE_MAXDEVICE 1 233 234 #define CONFIG_SYS_ATA_BASE_ADDR 0x0c000000 235 #define CONFIG_SYS_ATA_IDE0_OFFSET 0x0 236 237 #define CONFIG_SYS_ATA_DATA_OFFSET 0x120 238 #define CONFIG_SYS_ATA_REG_OFFSET 0x120 239 #define CONFIG_SYS_ATA_ALT_OFFSET 0x120 240 241 #define CONFIG_SYS_ATA_STRIDE 2 242 #endif 243 244 /* 245 * GPIO settings 246 */ 247 #define CONFIG_SYS_GPSR0_VAL 0x01308800 248 #define CONFIG_SYS_GPSR1_VAL 0x00cf0000 249 #define CONFIG_SYS_GPSR2_VAL 0x922ac000 250 #define CONFIG_SYS_GPSR3_VAL 0x0161e800 251 252 #define CONFIG_SYS_GPCR0_VAL 0x00010000 253 #define CONFIG_SYS_GPCR1_VAL 0x0 254 #define CONFIG_SYS_GPCR2_VAL 0x0 255 #define CONFIG_SYS_GPCR3_VAL 0x0 256 257 #define CONFIG_SYS_GPDR0_VAL 0xcbb18800 258 #define CONFIG_SYS_GPDR1_VAL 0xfccfa981 259 #define CONFIG_SYS_GPDR2_VAL 0x922affff 260 #define CONFIG_SYS_GPDR3_VAL 0x0161e904 261 262 #define CONFIG_SYS_GAFR0_L_VAL 0x00100000 263 #define CONFIG_SYS_GAFR0_U_VAL 0xa5da8510 264 #define CONFIG_SYS_GAFR1_L_VAL 0x6992901a 265 #define CONFIG_SYS_GAFR1_U_VAL 0xaaa5a0aa 266 #define CONFIG_SYS_GAFR2_L_VAL 0xaaaaaaaa 267 #define CONFIG_SYS_GAFR2_U_VAL 0x4109a401 268 #define CONFIG_SYS_GAFR3_L_VAL 0x54010310 269 #define CONFIG_SYS_GAFR3_U_VAL 0x00025401 270 271 #define CONFIG_SYS_PSSR_VAL 0x30 272 273 /* 274 * Clock settings 275 */ 276 #define CONFIG_SYS_CKEN 0x00500240 277 #define CONFIG_SYS_CCCR 0x02000290 278 279 /* 280 * Memory settings 281 */ 282 #define CONFIG_SYS_MSC0_VAL 0x3ffc95f9 283 #define CONFIG_SYS_MSC1_VAL 0x02ccf974 284 #define CONFIG_SYS_MSC2_VAL 0x00000000 285 #ifdef CONFIG_RAM_256M 286 #define CONFIG_SYS_MDCNFG_VAL 0x8ad30ad3 287 #else 288 #define CONFIG_SYS_MDCNFG_VAL 0x88000ad3 289 #endif 290 #define CONFIG_SYS_MDREFR_VAL 0x201fe01e 291 #define CONFIG_SYS_MDMRS_VAL 0x00000000 292 #define CONFIG_SYS_FLYCNFG_VAL 0x00000000 293 #define CONFIG_SYS_SXCNFG_VAL 0x40044004 294 295 /* 296 * PCMCIA and CF Interfaces 297 */ 298 #define CONFIG_SYS_MECR_VAL 0x00000001 299 #define CONFIG_SYS_MCMEM0_VAL 0x00014307 300 #define CONFIG_SYS_MCMEM1_VAL 0x00014307 301 #define CONFIG_SYS_MCATT0_VAL 0x0001c787 302 #define CONFIG_SYS_MCATT1_VAL 0x0001c787 303 #define CONFIG_SYS_MCIO0_VAL 0x0001430f 304 #define CONFIG_SYS_MCIO1_VAL 0x0001430f 305 306 /* 307 * LCD 308 */ 309 #ifdef CONFIG_LCD 310 #define CONFIG_VOIPAC_LCD 311 #endif 312 313 /* 314 * USB 315 */ 316 #ifdef CONFIG_CMD_USB 317 #define CONFIG_USB_OHCI_NEW 318 #define CONFIG_SYS_USB_OHCI_CPU_INIT 319 #define CONFIG_SYS_USB_OHCI_BOARD_INIT 320 #define CONFIG_SYS_USB_OHCI_MAX_ROOT_PORTS 2 321 #define CONFIG_SYS_USB_OHCI_REGS_BASE 0x4C000000 322 #define CONFIG_SYS_USB_OHCI_SLOT_NAME "vpac270" 323 #define CONFIG_USB_STORAGE 324 #endif 325 326 #endif /* __CONFIG_H */ 327