1 /* SPDX-License-Identifier: GPL-2.0+ */ 2 /* 3 * (C) Copyright 2002 4 * Rich Ireland, Enterasys Networks, rireland@enterasys.com. 5 */ 6 7 #include <fpga.h> 8 9 #ifndef _ALTERA_H_ 10 #define _ALTERA_H_ 11 12 /* 13 * For the StratixV FPGA programming via SPI, the following 14 * information is coded in the 32bit cookie: 15 * Bit 31 ... Bit 0 16 * SPI-Bus | SPI-Dev | Config-Pin | Done-Pin 17 */ 18 #define FPGA_COOKIE(bus, dev, config, done) \ 19 (((bus) << 24) | ((dev) << 16) | ((config) << 8) | (done)) 20 #define COOKIE2SPI_BUS(c) (((c) >> 24) & 0xff) 21 #define COOKIE2SPI_DEV(c) (((c) >> 16) & 0xff) 22 #define COOKIE2CONFIG(c) (((c) >> 8) & 0xff) 23 #define COOKIE2DONE(c) ((c) & 0xff) 24 25 enum altera_iface { 26 /* insert all new types after this */ 27 min_altera_iface_type, 28 /* serial data and external clock */ 29 passive_serial, 30 /* parallel data */ 31 passive_parallel_synchronous, 32 /* parallel data */ 33 passive_parallel_asynchronous, 34 /* serial data w/ internal clock (not used) */ 35 passive_serial_asynchronous, 36 /* jtag/tap serial (not used ) */ 37 altera_jtag_mode, 38 /* fast passive parallel (FPP) */ 39 fast_passive_parallel, 40 /* fast passive parallel with security (FPPS) */ 41 fast_passive_parallel_security, 42 /* secure device manager (SDM) mailbox */ 43 secure_device_manager_mailbox, 44 /* insert all new types before this */ 45 max_altera_iface_type, 46 }; 47 48 enum altera_family { 49 /* insert all new types after this */ 50 min_altera_type, 51 /* ACEX1K Family */ 52 Altera_ACEX1K, 53 /* CYCLONII Family */ 54 Altera_CYC2, 55 /* StratixII Family */ 56 Altera_StratixII, 57 /* StratixV Family */ 58 Altera_StratixV, 59 /* SoCFPGA Family */ 60 Altera_SoCFPGA, 61 /* Intel FPGA Family with SDM (Secure Device Manager) Mailbox */ 62 Intel_FPGA_SDM_Mailbox, 63 64 /* Add new models here */ 65 66 /* insert all new types before this */ 67 max_altera_type, 68 }; 69 70 typedef struct { 71 /* part type */ 72 enum altera_family family; 73 /* interface type */ 74 enum altera_iface iface; 75 /* bytes of data part can accept */ 76 size_t size; 77 /* interface function table */ 78 void *iface_fns; 79 /* base interface address */ 80 void *base; 81 /* implementation specific cookie */ 82 int cookie; 83 } Altera_desc; 84 85 /* Generic Altera Functions 86 *********************************************************************/ 87 extern int altera_load(Altera_desc *desc, const void *image, size_t size); 88 extern int altera_dump(Altera_desc *desc, const void *buf, size_t bsize); 89 extern int altera_info(Altera_desc *desc); 90 91 /* Board specific implementation specific function types 92 *********************************************************************/ 93 typedef int (*Altera_pre_fn)( int cookie ); 94 typedef int (*Altera_config_fn)( int assert_config, int flush, int cookie ); 95 typedef int (*Altera_status_fn)( int cookie ); 96 typedef int (*Altera_done_fn)( int cookie ); 97 typedef int (*Altera_clk_fn)( int assert_clk, int flush, int cookie ); 98 typedef int (*Altera_data_fn)( int assert_data, int flush, int cookie ); 99 typedef int(*Altera_write_fn)(const void *buf, size_t len, int flush, int cookie); 100 typedef int (*Altera_abort_fn)( int cookie ); 101 typedef int (*Altera_post_fn)( int cookie ); 102 103 typedef struct { 104 Altera_pre_fn pre; 105 Altera_config_fn config; 106 Altera_status_fn status; 107 Altera_done_fn done; 108 Altera_clk_fn clk; 109 Altera_data_fn data; 110 Altera_write_fn write; 111 Altera_abort_fn abort; 112 Altera_post_fn post; 113 } altera_board_specific_func; 114 115 #ifdef CONFIG_FPGA_SOCFPGA 116 int socfpga_load(Altera_desc *desc, const void *rbf_data, size_t rbf_size); 117 #endif 118 119 #ifdef CONFIG_FPGA_STRATIX_V 120 int stratixv_load(Altera_desc *desc, const void *rbf_data, size_t rbf_size); 121 #endif 122 123 #ifdef CONFIG_FPGA_INTEL_SDM_MAILBOX 124 int intel_sdm_mb_load(Altera_desc *desc, const void *rbf_data, 125 size_t rbf_size); 126 #endif 127 128 #endif /* _ALTERA_H_ */ 129