1 /** @file 2 ACPI 6.3 definitions from the ACPI Specification Revision 6.3 Jan, 2019. 3 4 Copyright (c) 2017, Intel Corporation. All rights reserved.<BR> 5 Copyright (c) 2019, ARM Ltd. All rights reserved.<BR> 6 7 SPDX-License-Identifier: BSD-2-Clause-Patent 8 **/ 9 10 #ifndef _ACPI_6_3_H_ 11 #define _ACPI_6_3_H_ 12 13 #include <IndustryStandard/Acpi62.h> 14 15 // 16 // Ensure proper structure formats 17 // 18 #pragma pack(1) 19 20 /// 21 /// ACPI 6.3 Generic Address Space definition 22 /// 23 typedef struct { 24 UINT8 AddressSpaceId; 25 UINT8 RegisterBitWidth; 26 UINT8 RegisterBitOffset; 27 UINT8 AccessSize; 28 UINT64 Address; 29 } EFI_ACPI_6_3_GENERIC_ADDRESS_STRUCTURE; 30 31 // 32 // Generic Address Space Address IDs 33 // 34 #define EFI_ACPI_6_3_SYSTEM_MEMORY 0x00 35 #define EFI_ACPI_6_3_SYSTEM_IO 0x01 36 #define EFI_ACPI_6_3_PCI_CONFIGURATION_SPACE 0x02 37 #define EFI_ACPI_6_3_EMBEDDED_CONTROLLER 0x03 38 #define EFI_ACPI_6_3_SMBUS 0x04 39 #define EFI_ACPI_6_3_SYSTEM_CMOS 0x05 40 #define EFI_ACPI_6_3_PCI_BAR_TARGET 0x06 41 #define EFI_ACPI_6_3_IPMI 0x07 42 #define EFI_ACPI_6_3_GENERAL_PURPOSE_IO 0x08 43 #define EFI_ACPI_6_3_GENERIC_SERIAL_BUS 0x09 44 #define EFI_ACPI_6_3_PLATFORM_COMMUNICATION_CHANNEL 0x0A 45 #define EFI_ACPI_6_3_FUNCTIONAL_FIXED_HARDWARE 0x7F 46 47 // 48 // Generic Address Space Access Sizes 49 // 50 #define EFI_ACPI_6_3_UNDEFINED 0 51 #define EFI_ACPI_6_3_BYTE 1 52 #define EFI_ACPI_6_3_WORD 2 53 #define EFI_ACPI_6_3_DWORD 3 54 #define EFI_ACPI_6_3_QWORD 4 55 56 // 57 // ACPI 6.3 table structures 58 // 59 60 /// 61 /// Root System Description Pointer Structure 62 /// 63 typedef struct { 64 UINT64 Signature; 65 UINT8 Checksum; 66 UINT8 OemId[6]; 67 UINT8 Revision; 68 UINT32 RsdtAddress; 69 UINT32 Length; 70 UINT64 XsdtAddress; 71 UINT8 ExtendedChecksum; 72 UINT8 Reserved[3]; 73 } EFI_ACPI_6_3_ROOT_SYSTEM_DESCRIPTION_POINTER; 74 75 /// 76 /// RSD_PTR Revision (as defined in ACPI 6.3 spec.) 77 /// 78 #define EFI_ACPI_6_3_ROOT_SYSTEM_DESCRIPTION_POINTER_REVISION 0x02 ///< ACPISpec (Revision 6.3) says current value is 2 79 80 /// 81 /// Common table header, this prefaces all ACPI tables, including FACS, but 82 /// excluding the RSD PTR structure 83 /// 84 typedef struct { 85 UINT32 Signature; 86 UINT32 Length; 87 } EFI_ACPI_6_3_COMMON_HEADER; 88 89 // 90 // Root System Description Table 91 // No definition needed as it is a common description table header, the same with 92 // EFI_ACPI_DESCRIPTION_HEADER, followed by a variable number of UINT32 table pointers. 93 // 94 95 /// 96 /// RSDT Revision (as defined in ACPI 6.3 spec.) 97 /// 98 #define EFI_ACPI_6_3_ROOT_SYSTEM_DESCRIPTION_TABLE_REVISION 0x01 99 100 // 101 // Extended System Description Table 102 // No definition needed as it is a common description table header, the same with 103 // EFI_ACPI_DESCRIPTION_HEADER, followed by a variable number of UINT64 table pointers. 104 // 105 106 /// 107 /// XSDT Revision (as defined in ACPI 6.3 spec.) 108 /// 109 #define EFI_ACPI_6_3_EXTENDED_SYSTEM_DESCRIPTION_TABLE_REVISION 0x01 110 111 /// 112 /// Fixed ACPI Description Table Structure (FADT) 113 /// 114 typedef struct { 115 EFI_ACPI_DESCRIPTION_HEADER Header; 116 UINT32 FirmwareCtrl; 117 UINT32 Dsdt; 118 UINT8 Reserved0; 119 UINT8 PreferredPmProfile; 120 UINT16 SciInt; 121 UINT32 SmiCmd; 122 UINT8 AcpiEnable; 123 UINT8 AcpiDisable; 124 UINT8 S4BiosReq; 125 UINT8 PstateCnt; 126 UINT32 Pm1aEvtBlk; 127 UINT32 Pm1bEvtBlk; 128 UINT32 Pm1aCntBlk; 129 UINT32 Pm1bCntBlk; 130 UINT32 Pm2CntBlk; 131 UINT32 PmTmrBlk; 132 UINT32 Gpe0Blk; 133 UINT32 Gpe1Blk; 134 UINT8 Pm1EvtLen; 135 UINT8 Pm1CntLen; 136 UINT8 Pm2CntLen; 137 UINT8 PmTmrLen; 138 UINT8 Gpe0BlkLen; 139 UINT8 Gpe1BlkLen; 140 UINT8 Gpe1Base; 141 UINT8 CstCnt; 142 UINT16 PLvl2Lat; 143 UINT16 PLvl3Lat; 144 UINT16 FlushSize; 145 UINT16 FlushStride; 146 UINT8 DutyOffset; 147 UINT8 DutyWidth; 148 UINT8 DayAlrm; 149 UINT8 MonAlrm; 150 UINT8 Century; 151 UINT16 IaPcBootArch; 152 UINT8 Reserved1; 153 UINT32 Flags; 154 EFI_ACPI_6_3_GENERIC_ADDRESS_STRUCTURE ResetReg; 155 UINT8 ResetValue; 156 UINT16 ArmBootArch; 157 UINT8 MinorVersion; 158 UINT64 XFirmwareCtrl; 159 UINT64 XDsdt; 160 EFI_ACPI_6_3_GENERIC_ADDRESS_STRUCTURE XPm1aEvtBlk; 161 EFI_ACPI_6_3_GENERIC_ADDRESS_STRUCTURE XPm1bEvtBlk; 162 EFI_ACPI_6_3_GENERIC_ADDRESS_STRUCTURE XPm1aCntBlk; 163 EFI_ACPI_6_3_GENERIC_ADDRESS_STRUCTURE XPm1bCntBlk; 164 EFI_ACPI_6_3_GENERIC_ADDRESS_STRUCTURE XPm2CntBlk; 165 EFI_ACPI_6_3_GENERIC_ADDRESS_STRUCTURE XPmTmrBlk; 166 EFI_ACPI_6_3_GENERIC_ADDRESS_STRUCTURE XGpe0Blk; 167 EFI_ACPI_6_3_GENERIC_ADDRESS_STRUCTURE XGpe1Blk; 168 EFI_ACPI_6_3_GENERIC_ADDRESS_STRUCTURE SleepControlReg; 169 EFI_ACPI_6_3_GENERIC_ADDRESS_STRUCTURE SleepStatusReg; 170 UINT64 HypervisorVendorIdentity; 171 } EFI_ACPI_6_3_FIXED_ACPI_DESCRIPTION_TABLE; 172 173 /// 174 /// FADT Version (as defined in ACPI 6.3 spec.) 175 /// 176 #define EFI_ACPI_6_3_FIXED_ACPI_DESCRIPTION_TABLE_REVISION 0x06 177 #define EFI_ACPI_6_3_FIXED_ACPI_DESCRIPTION_TABLE_MINOR_REVISION 0x03 178 179 // 180 // Fixed ACPI Description Table Preferred Power Management Profile 181 // 182 #define EFI_ACPI_6_3_PM_PROFILE_UNSPECIFIED 0 183 #define EFI_ACPI_6_3_PM_PROFILE_DESKTOP 1 184 #define EFI_ACPI_6_3_PM_PROFILE_MOBILE 2 185 #define EFI_ACPI_6_3_PM_PROFILE_WORKSTATION 3 186 #define EFI_ACPI_6_3_PM_PROFILE_ENTERPRISE_SERVER 4 187 #define EFI_ACPI_6_3_PM_PROFILE_SOHO_SERVER 5 188 #define EFI_ACPI_6_3_PM_PROFILE_APPLIANCE_PC 6 189 #define EFI_ACPI_6_3_PM_PROFILE_PERFORMANCE_SERVER 7 190 #define EFI_ACPI_6_3_PM_PROFILE_TABLET 8 191 192 // 193 // Fixed ACPI Description Table Boot Architecture Flags 194 // All other bits are reserved and must be set to 0. 195 // 196 #define EFI_ACPI_6_3_LEGACY_DEVICES BIT0 197 #define EFI_ACPI_6_3_8042 BIT1 198 #define EFI_ACPI_6_3_VGA_NOT_PRESENT BIT2 199 #define EFI_ACPI_6_3_MSI_NOT_SUPPORTED BIT3 200 #define EFI_ACPI_6_3_PCIE_ASPM_CONTROLS BIT4 201 #define EFI_ACPI_6_3_CMOS_RTC_NOT_PRESENT BIT5 202 203 // 204 // Fixed ACPI Description Table Arm Boot Architecture Flags 205 // All other bits are reserved and must be set to 0. 206 // 207 #define EFI_ACPI_6_3_ARM_PSCI_COMPLIANT BIT0 208 #define EFI_ACPI_6_3_ARM_PSCI_USE_HVC BIT1 209 210 // 211 // Fixed ACPI Description Table Fixed Feature Flags 212 // All other bits are reserved and must be set to 0. 213 // 214 #define EFI_ACPI_6_3_WBINVD BIT0 215 #define EFI_ACPI_6_3_WBINVD_FLUSH BIT1 216 #define EFI_ACPI_6_3_PROC_C1 BIT2 217 #define EFI_ACPI_6_3_P_LVL2_UP BIT3 218 #define EFI_ACPI_6_3_PWR_BUTTON BIT4 219 #define EFI_ACPI_6_3_SLP_BUTTON BIT5 220 #define EFI_ACPI_6_3_FIX_RTC BIT6 221 #define EFI_ACPI_6_3_RTC_S4 BIT7 222 #define EFI_ACPI_6_3_TMR_VAL_EXT BIT8 223 #define EFI_ACPI_6_3_DCK_CAP BIT9 224 #define EFI_ACPI_6_3_RESET_REG_SUP BIT10 225 #define EFI_ACPI_6_3_SEALED_CASE BIT11 226 #define EFI_ACPI_6_3_HEADLESS BIT12 227 #define EFI_ACPI_6_3_CPU_SW_SLP BIT13 228 #define EFI_ACPI_6_3_PCI_EXP_WAK BIT14 229 #define EFI_ACPI_6_3_USE_PLATFORM_CLOCK BIT15 230 #define EFI_ACPI_6_3_S4_RTC_STS_VALID BIT16 231 #define EFI_ACPI_6_3_REMOTE_POWER_ON_CAPABLE BIT17 232 #define EFI_ACPI_6_3_FORCE_APIC_CLUSTER_MODEL BIT18 233 #define EFI_ACPI_6_3_FORCE_APIC_PHYSICAL_DESTINATION_MODE BIT19 234 #define EFI_ACPI_6_3_HW_REDUCED_ACPI BIT20 235 #define EFI_ACPI_6_3_LOW_POWER_S0_IDLE_CAPABLE BIT21 236 237 /// 238 /// Firmware ACPI Control Structure 239 /// 240 typedef struct { 241 UINT32 Signature; 242 UINT32 Length; 243 UINT32 HardwareSignature; 244 UINT32 FirmwareWakingVector; 245 UINT32 GlobalLock; 246 UINT32 Flags; 247 UINT64 XFirmwareWakingVector; 248 UINT8 Version; 249 UINT8 Reserved0[3]; 250 UINT32 OspmFlags; 251 UINT8 Reserved1[24]; 252 } EFI_ACPI_6_3_FIRMWARE_ACPI_CONTROL_STRUCTURE; 253 254 /// 255 /// FACS Version (as defined in ACPI 6.3 spec.) 256 /// 257 #define EFI_ACPI_6_3_FIRMWARE_ACPI_CONTROL_STRUCTURE_VERSION 0x02 258 259 /// 260 /// Firmware Control Structure Feature Flags 261 /// All other bits are reserved and must be set to 0. 262 /// 263 #define EFI_ACPI_6_3_S4BIOS_F BIT0 264 #define EFI_ACPI_6_3_64BIT_WAKE_SUPPORTED_F BIT1 265 266 /// 267 /// OSPM Enabled Firmware Control Structure Flags 268 /// All other bits are reserved and must be set to 0. 269 /// 270 #define EFI_ACPI_6_3_OSPM_64BIT_WAKE_F BIT0 271 272 // 273 // Differentiated System Description Table, 274 // Secondary System Description Table 275 // and Persistent System Description Table, 276 // no definition needed as they are common description table header, the same with 277 // EFI_ACPI_DESCRIPTION_HEADER, followed by a definition block. 278 // 279 #define EFI_ACPI_6_3_DIFFERENTIATED_SYSTEM_DESCRIPTION_TABLE_REVISION 0x02 280 #define EFI_ACPI_6_3_SECONDARY_SYSTEM_DESCRIPTION_TABLE_REVISION 0x02 281 282 /// 283 /// Multiple APIC Description Table header definition. The rest of the table 284 /// must be defined in a platform specific manner. 285 /// 286 typedef struct { 287 EFI_ACPI_DESCRIPTION_HEADER Header; 288 UINT32 LocalApicAddress; 289 UINT32 Flags; 290 } EFI_ACPI_6_3_MULTIPLE_APIC_DESCRIPTION_TABLE_HEADER; 291 292 /// 293 /// MADT Revision (as defined in ACPI 6.3 spec.) 294 /// 295 #define EFI_ACPI_6_3_MULTIPLE_APIC_DESCRIPTION_TABLE_REVISION 0x05 296 297 /// 298 /// Multiple APIC Flags 299 /// All other bits are reserved and must be set to 0. 300 /// 301 #define EFI_ACPI_6_3_PCAT_COMPAT BIT0 302 303 // 304 // Multiple APIC Description Table APIC structure types 305 // All other values between 0x0D and 0x7F are reserved and 306 // will be ignored by OSPM. 0x80 ~ 0xFF are reserved for OEM. 307 // 308 #define EFI_ACPI_6_3_PROCESSOR_LOCAL_APIC 0x00 309 #define EFI_ACPI_6_3_IO_APIC 0x01 310 #define EFI_ACPI_6_3_INTERRUPT_SOURCE_OVERRIDE 0x02 311 #define EFI_ACPI_6_3_NON_MASKABLE_INTERRUPT_SOURCE 0x03 312 #define EFI_ACPI_6_3_LOCAL_APIC_NMI 0x04 313 #define EFI_ACPI_6_3_LOCAL_APIC_ADDRESS_OVERRIDE 0x05 314 #define EFI_ACPI_6_3_IO_SAPIC 0x06 315 #define EFI_ACPI_6_3_LOCAL_SAPIC 0x07 316 #define EFI_ACPI_6_3_PLATFORM_INTERRUPT_SOURCES 0x08 317 #define EFI_ACPI_6_3_PROCESSOR_LOCAL_X2APIC 0x09 318 #define EFI_ACPI_6_3_LOCAL_X2APIC_NMI 0x0A 319 #define EFI_ACPI_6_3_GIC 0x0B 320 #define EFI_ACPI_6_3_GICD 0x0C 321 #define EFI_ACPI_6_3_GIC_MSI_FRAME 0x0D 322 #define EFI_ACPI_6_3_GICR 0x0E 323 #define EFI_ACPI_6_3_GIC_ITS 0x0F 324 325 // 326 // APIC Structure Definitions 327 // 328 329 /// 330 /// Processor Local APIC Structure Definition 331 /// 332 typedef struct { 333 UINT8 Type; 334 UINT8 Length; 335 UINT8 AcpiProcessorUid; 336 UINT8 ApicId; 337 UINT32 Flags; 338 } EFI_ACPI_6_3_PROCESSOR_LOCAL_APIC_STRUCTURE; 339 340 /// 341 /// Local APIC Flags. All other bits are reserved and must be 0. 342 /// 343 #define EFI_ACPI_6_3_LOCAL_APIC_ENABLED BIT0 344 #define EFI_ACPI_6_3_LOCAL_APIC_ONLINE_CAPABLE BIT1 345 346 /// 347 /// IO APIC Structure 348 /// 349 typedef struct { 350 UINT8 Type; 351 UINT8 Length; 352 UINT8 IoApicId; 353 UINT8 Reserved; 354 UINT32 IoApicAddress; 355 UINT32 GlobalSystemInterruptBase; 356 } EFI_ACPI_6_3_IO_APIC_STRUCTURE; 357 358 /// 359 /// Interrupt Source Override Structure 360 /// 361 typedef struct { 362 UINT8 Type; 363 UINT8 Length; 364 UINT8 Bus; 365 UINT8 Source; 366 UINT32 GlobalSystemInterrupt; 367 UINT16 Flags; 368 } EFI_ACPI_6_3_INTERRUPT_SOURCE_OVERRIDE_STRUCTURE; 369 370 /// 371 /// Platform Interrupt Sources Structure Definition 372 /// 373 typedef struct { 374 UINT8 Type; 375 UINT8 Length; 376 UINT16 Flags; 377 UINT8 InterruptType; 378 UINT8 ProcessorId; 379 UINT8 ProcessorEid; 380 UINT8 IoSapicVector; 381 UINT32 GlobalSystemInterrupt; 382 UINT32 PlatformInterruptSourceFlags; 383 UINT8 CpeiProcessorOverride; 384 UINT8 Reserved[31]; 385 } EFI_ACPI_6_3_PLATFORM_INTERRUPT_APIC_STRUCTURE; 386 387 // 388 // MPS INTI flags. 389 // All other bits are reserved and must be set to 0. 390 // 391 #define EFI_ACPI_6_3_POLARITY (3 << 0) 392 #define EFI_ACPI_6_3_TRIGGER_MODE (3 << 2) 393 394 /// 395 /// Non-Maskable Interrupt Source Structure 396 /// 397 typedef struct { 398 UINT8 Type; 399 UINT8 Length; 400 UINT16 Flags; 401 UINT32 GlobalSystemInterrupt; 402 } EFI_ACPI_6_3_NON_MASKABLE_INTERRUPT_SOURCE_STRUCTURE; 403 404 /// 405 /// Local APIC NMI Structure 406 /// 407 typedef struct { 408 UINT8 Type; 409 UINT8 Length; 410 UINT8 AcpiProcessorUid; 411 UINT16 Flags; 412 UINT8 LocalApicLint; 413 } EFI_ACPI_6_3_LOCAL_APIC_NMI_STRUCTURE; 414 415 /// 416 /// Local APIC Address Override Structure 417 /// 418 typedef struct { 419 UINT8 Type; 420 UINT8 Length; 421 UINT16 Reserved; 422 UINT64 LocalApicAddress; 423 } EFI_ACPI_6_3_LOCAL_APIC_ADDRESS_OVERRIDE_STRUCTURE; 424 425 /// 426 /// IO SAPIC Structure 427 /// 428 typedef struct { 429 UINT8 Type; 430 UINT8 Length; 431 UINT8 IoApicId; 432 UINT8 Reserved; 433 UINT32 GlobalSystemInterruptBase; 434 UINT64 IoSapicAddress; 435 } EFI_ACPI_6_3_IO_SAPIC_STRUCTURE; 436 437 /// 438 /// Local SAPIC Structure 439 /// This struct followed by a null-terminated ASCII string - ACPI Processor UID String 440 /// 441 typedef struct { 442 UINT8 Type; 443 UINT8 Length; 444 UINT8 AcpiProcessorId; 445 UINT8 LocalSapicId; 446 UINT8 LocalSapicEid; 447 UINT8 Reserved[3]; 448 UINT32 Flags; 449 UINT32 ACPIProcessorUIDValue; 450 } EFI_ACPI_6_3_PROCESSOR_LOCAL_SAPIC_STRUCTURE; 451 452 /// 453 /// Platform Interrupt Sources Structure 454 /// 455 typedef struct { 456 UINT8 Type; 457 UINT8 Length; 458 UINT16 Flags; 459 UINT8 InterruptType; 460 UINT8 ProcessorId; 461 UINT8 ProcessorEid; 462 UINT8 IoSapicVector; 463 UINT32 GlobalSystemInterrupt; 464 UINT32 PlatformInterruptSourceFlags; 465 } EFI_ACPI_6_3_PLATFORM_INTERRUPT_SOURCES_STRUCTURE; 466 467 /// 468 /// Platform Interrupt Source Flags. 469 /// All other bits are reserved and must be set to 0. 470 /// 471 #define EFI_ACPI_6_3_CPEI_PROCESSOR_OVERRIDE BIT0 472 473 /// 474 /// Processor Local x2APIC Structure Definition 475 /// 476 typedef struct { 477 UINT8 Type; 478 UINT8 Length; 479 UINT8 Reserved[2]; 480 UINT32 X2ApicId; 481 UINT32 Flags; 482 UINT32 AcpiProcessorUid; 483 } EFI_ACPI_6_3_PROCESSOR_LOCAL_X2APIC_STRUCTURE; 484 485 /// 486 /// Local x2APIC NMI Structure 487 /// 488 typedef struct { 489 UINT8 Type; 490 UINT8 Length; 491 UINT16 Flags; 492 UINT32 AcpiProcessorUid; 493 UINT8 LocalX2ApicLint; 494 UINT8 Reserved[3]; 495 } EFI_ACPI_6_3_LOCAL_X2APIC_NMI_STRUCTURE; 496 497 /// 498 /// GIC Structure 499 /// 500 typedef struct { 501 UINT8 Type; 502 UINT8 Length; 503 UINT16 Reserved; 504 UINT32 CPUInterfaceNumber; 505 UINT32 AcpiProcessorUid; 506 UINT32 Flags; 507 UINT32 ParkingProtocolVersion; 508 UINT32 PerformanceInterruptGsiv; 509 UINT64 ParkedAddress; 510 UINT64 PhysicalBaseAddress; 511 UINT64 GICV; 512 UINT64 GICH; 513 UINT32 VGICMaintenanceInterrupt; 514 UINT64 GICRBaseAddress; 515 UINT64 MPIDR; 516 UINT8 ProcessorPowerEfficiencyClass; 517 UINT8 Reserved2; 518 UINT16 SpeOverflowInterrupt; 519 } EFI_ACPI_6_3_GIC_STRUCTURE; 520 521 /// 522 /// GIC Flags. All other bits are reserved and must be 0. 523 /// 524 #define EFI_ACPI_6_3_GIC_ENABLED BIT0 525 #define EFI_ACPI_6_3_PERFORMANCE_INTERRUPT_MODEL BIT1 526 #define EFI_ACPI_6_3_VGIC_MAINTENANCE_INTERRUPT_MODE_FLAGS BIT2 527 528 /// 529 /// GIC Distributor Structure 530 /// 531 typedef struct { 532 UINT8 Type; 533 UINT8 Length; 534 UINT16 Reserved1; 535 UINT32 GicId; 536 UINT64 PhysicalBaseAddress; 537 UINT32 SystemVectorBase; 538 UINT8 GicVersion; 539 UINT8 Reserved2[3]; 540 } EFI_ACPI_6_3_GIC_DISTRIBUTOR_STRUCTURE; 541 542 /// 543 /// GIC Version 544 /// 545 #define EFI_ACPI_6_3_GIC_V1 0x01 546 #define EFI_ACPI_6_3_GIC_V2 0x02 547 #define EFI_ACPI_6_3_GIC_V3 0x03 548 #define EFI_ACPI_6_3_GIC_V4 0x04 549 550 /// 551 /// GIC MSI Frame Structure 552 /// 553 typedef struct { 554 UINT8 Type; 555 UINT8 Length; 556 UINT16 Reserved1; 557 UINT32 GicMsiFrameId; 558 UINT64 PhysicalBaseAddress; 559 UINT32 Flags; 560 UINT16 SPICount; 561 UINT16 SPIBase; 562 } EFI_ACPI_6_3_GIC_MSI_FRAME_STRUCTURE; 563 564 /// 565 /// GIC MSI Frame Flags. All other bits are reserved and must be 0. 566 /// 567 #define EFI_ACPI_6_3_SPI_COUNT_BASE_SELECT BIT0 568 569 /// 570 /// GICR Structure 571 /// 572 typedef struct { 573 UINT8 Type; 574 UINT8 Length; 575 UINT16 Reserved; 576 UINT64 DiscoveryRangeBaseAddress; 577 UINT32 DiscoveryRangeLength; 578 } EFI_ACPI_6_3_GICR_STRUCTURE; 579 580 /// 581 /// GIC Interrupt Translation Service Structure 582 /// 583 typedef struct { 584 UINT8 Type; 585 UINT8 Length; 586 UINT16 Reserved; 587 UINT32 GicItsId; 588 UINT64 PhysicalBaseAddress; 589 UINT32 Reserved2; 590 } EFI_ACPI_6_3_GIC_ITS_STRUCTURE; 591 592 /// 593 /// Smart Battery Description Table (SBST) 594 /// 595 typedef struct { 596 EFI_ACPI_DESCRIPTION_HEADER Header; 597 UINT32 WarningEnergyLevel; 598 UINT32 LowEnergyLevel; 599 UINT32 CriticalEnergyLevel; 600 } EFI_ACPI_6_3_SMART_BATTERY_DESCRIPTION_TABLE; 601 602 /// 603 /// SBST Version (as defined in ACPI 6.3 spec.) 604 /// 605 #define EFI_ACPI_6_3_SMART_BATTERY_DESCRIPTION_TABLE_REVISION 0x01 606 607 /// 608 /// Embedded Controller Boot Resources Table (ECDT) 609 /// The table is followed by a null terminated ASCII string that contains 610 /// a fully qualified reference to the name space object. 611 /// 612 typedef struct { 613 EFI_ACPI_DESCRIPTION_HEADER Header; 614 EFI_ACPI_6_3_GENERIC_ADDRESS_STRUCTURE EcControl; 615 EFI_ACPI_6_3_GENERIC_ADDRESS_STRUCTURE EcData; 616 UINT32 Uid; 617 UINT8 GpeBit; 618 } EFI_ACPI_6_3_EMBEDDED_CONTROLLER_BOOT_RESOURCES_TABLE; 619 620 /// 621 /// ECDT Version (as defined in ACPI 6.3 spec.) 622 /// 623 #define EFI_ACPI_6_3_EMBEDDED_CONTROLLER_BOOT_RESOURCES_TABLE_REVISION 0x01 624 625 /// 626 /// System Resource Affinity Table (SRAT). The rest of the table 627 /// must be defined in a platform specific manner. 628 /// 629 typedef struct { 630 EFI_ACPI_DESCRIPTION_HEADER Header; 631 UINT32 Reserved1; ///< Must be set to 1 632 UINT64 Reserved2; 633 } EFI_ACPI_6_3_SYSTEM_RESOURCE_AFFINITY_TABLE_HEADER; 634 635 /// 636 /// SRAT Version (as defined in ACPI 6.3 spec.) 637 /// 638 #define EFI_ACPI_6_3_SYSTEM_RESOURCE_AFFINITY_TABLE_REVISION 0x03 639 640 // 641 // SRAT structure types. 642 // All other values between 0x06 an 0xFF are reserved and 643 // will be ignored by OSPM. 644 // 645 #define EFI_ACPI_6_3_PROCESSOR_LOCAL_APIC_SAPIC_AFFINITY 0x00 646 #define EFI_ACPI_6_3_MEMORY_AFFINITY 0x01 647 #define EFI_ACPI_6_3_PROCESSOR_LOCAL_X2APIC_AFFINITY 0x02 648 #define EFI_ACPI_6_3_GICC_AFFINITY 0x03 649 #define EFI_ACPI_6_3_GIC_ITS_AFFINITY 0x04 650 #define EFI_ACPI_6_3_GENERIC_INITIATOR_AFFINITY 0x05 651 652 /// 653 /// Processor Local APIC/SAPIC Affinity Structure Definition 654 /// 655 typedef struct { 656 UINT8 Type; 657 UINT8 Length; 658 UINT8 ProximityDomain7To0; 659 UINT8 ApicId; 660 UINT32 Flags; 661 UINT8 LocalSapicEid; 662 UINT8 ProximityDomain31To8[3]; 663 UINT32 ClockDomain; 664 } EFI_ACPI_6_3_PROCESSOR_LOCAL_APIC_SAPIC_AFFINITY_STRUCTURE; 665 666 /// 667 /// Local APIC/SAPIC Flags. All other bits are reserved and must be 0. 668 /// 669 #define EFI_ACPI_6_3_PROCESSOR_LOCAL_APIC_SAPIC_ENABLED (1 << 0) 670 671 /// 672 /// Memory Affinity Structure Definition 673 /// 674 typedef struct { 675 UINT8 Type; 676 UINT8 Length; 677 UINT32 ProximityDomain; 678 UINT16 Reserved1; 679 UINT32 AddressBaseLow; 680 UINT32 AddressBaseHigh; 681 UINT32 LengthLow; 682 UINT32 LengthHigh; 683 UINT32 Reserved2; 684 UINT32 Flags; 685 UINT64 Reserved3; 686 } EFI_ACPI_6_3_MEMORY_AFFINITY_STRUCTURE; 687 688 // 689 // Memory Flags. All other bits are reserved and must be 0. 690 // 691 #define EFI_ACPI_6_3_MEMORY_ENABLED (1 << 0) 692 #define EFI_ACPI_6_3_MEMORY_HOT_PLUGGABLE (1 << 1) 693 #define EFI_ACPI_6_3_MEMORY_NONVOLATILE (1 << 2) 694 695 /// 696 /// Processor Local x2APIC Affinity Structure Definition 697 /// 698 typedef struct { 699 UINT8 Type; 700 UINT8 Length; 701 UINT8 Reserved1[2]; 702 UINT32 ProximityDomain; 703 UINT32 X2ApicId; 704 UINT32 Flags; 705 UINT32 ClockDomain; 706 UINT8 Reserved2[4]; 707 } EFI_ACPI_6_3_PROCESSOR_LOCAL_X2APIC_AFFINITY_STRUCTURE; 708 709 /// 710 /// GICC Affinity Structure Definition 711 /// 712 typedef struct { 713 UINT8 Type; 714 UINT8 Length; 715 UINT32 ProximityDomain; 716 UINT32 AcpiProcessorUid; 717 UINT32 Flags; 718 UINT32 ClockDomain; 719 } EFI_ACPI_6_3_GICC_AFFINITY_STRUCTURE; 720 721 /// 722 /// GICC Flags. All other bits are reserved and must be 0. 723 /// 724 #define EFI_ACPI_6_3_GICC_ENABLED (1 << 0) 725 726 /// 727 /// GIC Interrupt Translation Service (ITS) Affinity Structure Definition 728 /// 729 typedef struct { 730 UINT8 Type; 731 UINT8 Length; 732 UINT32 ProximityDomain; 733 UINT8 Reserved[2]; 734 UINT32 ItsId; 735 } EFI_ACPI_6_3_GIC_ITS_AFFINITY_STRUCTURE; 736 737 // 738 // Generic Initiator Affinity Structure Device Handle Types 739 // All other values between 0x02 an 0xFF are reserved and 740 // will be ignored by OSPM. 741 // 742 #define EFI_ACPI_6_3_ACPI_DEVICE_HANDLE 0x00 743 #define EFI_ACPI_6_3_PCI_DEVICE_HANDLE 0x01 744 745 /// 746 /// Device Handle - ACPI 747 /// 748 typedef struct { 749 UINT64 AcpiHid; 750 UINT32 AcpiUid; 751 UINT8 Reserved[4]; 752 } EFI_ACPI_6_3_DEVICE_HANDLE_ACPI; 753 754 /// 755 /// Device Handle - PCI 756 /// 757 typedef struct { 758 UINT16 PciSegment; 759 UINT16 PciBdfNumber; 760 UINT8 Reserved[12]; 761 } EFI_ACPI_6_3_DEVICE_HANDLE_PCI; 762 763 /// 764 /// Generic Initiator Affinity Structure 765 /// 766 typedef struct { 767 UINT8 Type; 768 UINT8 Length; 769 UINT8 Reserved1; 770 UINT8 DeviceHandleType; 771 UINT32 ProximityDomain; 772 773 union { 774 EFI_ACPI_6_3_DEVICE_HANDLE_ACPI Acpi; 775 EFI_ACPI_6_3_DEVICE_HANDLE_PCI Pci; 776 } DeviceHandle; 777 778 UINT32 Flags; 779 UINT8 Reserved2[4]; 780 } EFI_ACPI_6_3_GENERIC_INITIATOR_AFFINITY_STRUCTURE; 781 782 /// 783 /// Generic Initiator Affinity Structure Flags. All other bits are reserved 784 /// and must be 0. 785 /// 786 #define EFI_ACPI_6_3_GENERIC_INITIATOR_AFFINITY_STRUCTURE_ENABLED (1 << 0) 787 788 /// 789 /// System Locality Distance Information Table (SLIT). 790 /// The rest of the table is a matrix. 791 /// 792 typedef struct { 793 EFI_ACPI_DESCRIPTION_HEADER Header; 794 UINT64 NumberOfSystemLocalities; 795 } EFI_ACPI_6_3_SYSTEM_LOCALITY_DISTANCE_INFORMATION_TABLE_HEADER; 796 797 /// 798 /// SLIT Version (as defined in ACPI 6.3 spec.) 799 /// 800 #define EFI_ACPI_6_3_SYSTEM_LOCALITY_DISTANCE_INFORMATION_TABLE_REVISION 0x01 801 802 /// 803 /// Corrected Platform Error Polling Table (CPEP) 804 /// 805 typedef struct { 806 EFI_ACPI_DESCRIPTION_HEADER Header; 807 UINT8 Reserved[8]; 808 } EFI_ACPI_6_3_CORRECTED_PLATFORM_ERROR_POLLING_TABLE_HEADER; 809 810 /// 811 /// CPEP Version (as defined in ACPI 6.3 spec.) 812 /// 813 #define EFI_ACPI_6_3_CORRECTED_PLATFORM_ERROR_POLLING_TABLE_REVISION 0x01 814 815 // 816 // CPEP processor structure types. 817 // 818 #define EFI_ACPI_6_3_CPEP_PROCESSOR_APIC_SAPIC 0x00 819 820 /// 821 /// Corrected Platform Error Polling Processor Structure Definition 822 /// 823 typedef struct { 824 UINT8 Type; 825 UINT8 Length; 826 UINT8 ProcessorId; 827 UINT8 ProcessorEid; 828 UINT32 PollingInterval; 829 } EFI_ACPI_6_3_CPEP_PROCESSOR_APIC_SAPIC_STRUCTURE; 830 831 /// 832 /// Maximum System Characteristics Table (MSCT) 833 /// 834 typedef struct { 835 EFI_ACPI_DESCRIPTION_HEADER Header; 836 UINT32 OffsetProxDomInfo; 837 UINT32 MaximumNumberOfProximityDomains; 838 UINT32 MaximumNumberOfClockDomains; 839 UINT64 MaximumPhysicalAddress; 840 } EFI_ACPI_6_3_MAXIMUM_SYSTEM_CHARACTERISTICS_TABLE_HEADER; 841 842 /// 843 /// MSCT Version (as defined in ACPI 6.3 spec.) 844 /// 845 #define EFI_ACPI_6_3_MAXIMUM_SYSTEM_CHARACTERISTICS_TABLE_REVISION 0x01 846 847 /// 848 /// Maximum Proximity Domain Information Structure Definition 849 /// 850 typedef struct { 851 UINT8 Revision; 852 UINT8 Length; 853 UINT32 ProximityDomainRangeLow; 854 UINT32 ProximityDomainRangeHigh; 855 UINT32 MaximumProcessorCapacity; 856 UINT64 MaximumMemoryCapacity; 857 } EFI_ACPI_6_3_MAXIMUM_PROXIMITY_DOMAIN_INFORMATION_STRUCTURE; 858 859 /// 860 /// ACPI RAS Feature Table definition. 861 /// 862 typedef struct { 863 EFI_ACPI_DESCRIPTION_HEADER Header; 864 UINT8 PlatformCommunicationChannelIdentifier[12]; 865 } EFI_ACPI_6_3_RAS_FEATURE_TABLE; 866 867 /// 868 /// RASF Version (as defined in ACPI 6.3 spec.) 869 /// 870 #define EFI_ACPI_6_3_RAS_FEATURE_TABLE_REVISION 0x01 871 872 /// 873 /// ACPI RASF Platform Communication Channel Shared Memory Region definition. 874 /// 875 typedef struct { 876 UINT32 Signature; 877 UINT16 Command; 878 UINT16 Status; 879 UINT16 Version; 880 UINT8 RASCapabilities[16]; 881 UINT8 SetRASCapabilities[16]; 882 UINT16 NumberOfRASFParameterBlocks; 883 UINT32 SetRASCapabilitiesStatus; 884 } EFI_ACPI_6_3_RASF_PLATFORM_COMMUNICATION_CHANNEL_SHARED_MEMORY_REGION; 885 886 /// 887 /// ACPI RASF PCC command code 888 /// 889 #define EFI_ACPI_6_3_RASF_PCC_COMMAND_CODE_EXECUTE_RASF_COMMAND 0x01 890 891 /// 892 /// ACPI RASF Platform RAS Capabilities 893 /// 894 #define EFI_ACPI_6_3_RASF_PLATFORM_RAS_CAPABILITY_HARDWARE_BASED_PATROL_SCRUB_SUPPORTED BIT0 895 #define EFI_ACPI_6_3_RASF_PLATFORM_RAS_CAPABILITY_HARDWARE_BASED_PATROL_SCRUB_SUPPORTED_AND_EXPOSED_TO_SOFTWARE BIT1 896 #define EFI_ACPI_6_3_RASF_PLATFORM_RAS_CAPABILITY_CPU_CACHE_FLUSH_TO_NVDIMM_DURABILITY_ON_POWER_LOSS BIT2 897 #define EFI_ACPI_6_3_RASF_PLATFORM_RAS_CAPABILITY_MEMORY_CONTROLLER_FLUSH_TO_NVDIMM_DURABILITY_ON_POWER_LOSS BIT3 898 #define EFI_ACPI_6_3_RASF_PLATFORM_RAS_CAPABILITY_BYTE_ADDRESSABLE_PERSISTENT_MEMORY_HARDWARE_MIRRORING BIT4 899 900 /// 901 /// ACPI RASF Parameter Block structure for PATROL_SCRUB 902 /// 903 typedef struct { 904 UINT16 Type; 905 UINT16 Version; 906 UINT16 Length; 907 UINT16 PatrolScrubCommand; 908 UINT64 RequestedAddressRange[2]; 909 UINT64 ActualAddressRange[2]; 910 UINT16 Flags; 911 UINT8 RequestedSpeed; 912 } EFI_ACPI_6_3_RASF_PATROL_SCRUB_PLATFORM_BLOCK_STRUCTURE; 913 914 /// 915 /// ACPI RASF Patrol Scrub command 916 /// 917 #define EFI_ACPI_6_3_RASF_PATROL_SCRUB_COMMAND_GET_PATROL_PARAMETERS 0x01 918 #define EFI_ACPI_6_3_RASF_PATROL_SCRUB_COMMAND_START_PATROL_SCRUBBER 0x02 919 #define EFI_ACPI_6_3_RASF_PATROL_SCRUB_COMMAND_STOP_PATROL_SCRUBBER 0x03 920 921 /// 922 /// Memory Power State Table definition. 923 /// 924 typedef struct { 925 EFI_ACPI_DESCRIPTION_HEADER Header; 926 UINT8 PlatformCommunicationChannelIdentifier; 927 UINT8 Reserved[3]; 928 // Memory Power Node Structure 929 // Memory Power State Characteristics 930 } EFI_ACPI_6_3_MEMORY_POWER_STATUS_TABLE; 931 932 /// 933 /// MPST Version (as defined in ACPI 6.3 spec.) 934 /// 935 #define EFI_ACPI_6_3_MEMORY_POWER_STATE_TABLE_REVISION 0x01 936 937 /// 938 /// MPST Platform Communication Channel Shared Memory Region definition. 939 /// 940 typedef struct { 941 UINT32 Signature; 942 UINT16 Command; 943 UINT16 Status; 944 UINT32 MemoryPowerCommandRegister; 945 UINT32 MemoryPowerStatusRegister; 946 UINT32 PowerStateId; 947 UINT32 MemoryPowerNodeId; 948 UINT64 MemoryEnergyConsumed; 949 UINT64 ExpectedAveragePowerComsuned; 950 } EFI_ACPI_6_3_MPST_PLATFORM_COMMUNICATION_CHANNEL_SHARED_MEMORY_REGION; 951 952 /// 953 /// ACPI MPST PCC command code 954 /// 955 #define EFI_ACPI_6_3_MPST_PCC_COMMAND_CODE_EXECUTE_MPST_COMMAND 0x03 956 957 /// 958 /// ACPI MPST Memory Power command 959 /// 960 #define EFI_ACPI_6_3_MPST_MEMORY_POWER_COMMAND_GET_MEMORY_POWER_STATE 0x01 961 #define EFI_ACPI_6_3_MPST_MEMORY_POWER_COMMAND_SET_MEMORY_POWER_STATE 0x02 962 #define EFI_ACPI_6_3_MPST_MEMORY_POWER_COMMAND_GET_AVERAGE_POWER_CONSUMED 0x03 963 #define EFI_ACPI_6_3_MPST_MEMORY_POWER_COMMAND_GET_MEMORY_ENERGY_CONSUMED 0x04 964 965 /// 966 /// MPST Memory Power Node Table 967 /// 968 typedef struct { 969 UINT8 PowerStateValue; 970 UINT8 PowerStateInformationIndex; 971 } EFI_ACPI_6_3_MPST_MEMORY_POWER_STATE; 972 973 typedef struct { 974 UINT8 Flag; 975 UINT8 Reserved; 976 UINT16 MemoryPowerNodeId; 977 UINT32 Length; 978 UINT64 AddressBase; 979 UINT64 AddressLength; 980 UINT32 NumberOfPowerStates; 981 UINT32 NumberOfPhysicalComponents; 982 //EFI_ACPI_6_3_MPST_MEMORY_POWER_STATE MemoryPowerState[NumberOfPowerStates]; 983 //UINT16 PhysicalComponentIdentifier[NumberOfPhysicalComponents]; 984 } EFI_ACPI_6_3_MPST_MEMORY_POWER_STRUCTURE; 985 986 #define EFI_ACPI_6_3_MPST_MEMORY_POWER_STRUCTURE_FLAG_ENABLE 0x01 987 #define EFI_ACPI_6_3_MPST_MEMORY_POWER_STRUCTURE_FLAG_POWER_MANAGED 0x02 988 #define EFI_ACPI_6_3_MPST_MEMORY_POWER_STRUCTURE_FLAG_HOT_PLUGGABLE 0x04 989 990 typedef struct { 991 UINT16 MemoryPowerNodeCount; 992 UINT8 Reserved[2]; 993 } EFI_ACPI_6_3_MPST_MEMORY_POWER_NODE_TABLE; 994 995 /// 996 /// MPST Memory Power State Characteristics Table 997 /// 998 typedef struct { 999 UINT8 PowerStateStructureID; 1000 UINT8 Flag; 1001 UINT16 Reserved; 1002 UINT32 AveragePowerConsumedInMPS0; 1003 UINT32 RelativePowerSavingToMPS0; 1004 UINT64 ExitLatencyToMPS0; 1005 } EFI_ACPI_6_3_MPST_MEMORY_POWER_STATE_CHARACTERISTICS_STRUCTURE; 1006 1007 #define EFI_ACPI_6_3_MPST_MEMORY_POWER_STATE_CHARACTERISTICS_STRUCTURE_FLAG_MEMORY_CONTENT_PRESERVED 0x01 1008 #define EFI_ACPI_6_3_MPST_MEMORY_POWER_STATE_CHARACTERISTICS_STRUCTURE_FLAG_AUTONOMOUS_MEMORY_POWER_STATE_ENTRY 0x02 1009 #define EFI_ACPI_6_3_MPST_MEMORY_POWER_STATE_CHARACTERISTICS_STRUCTURE_FLAG_AUTONOMOUS_MEMORY_POWER_STATE_EXIT 0x04 1010 1011 typedef struct { 1012 UINT16 MemoryPowerStateCharacteristicsCount; 1013 UINT8 Reserved[2]; 1014 } EFI_ACPI_6_3_MPST_MEMORY_POWER_STATE_CHARACTERISTICS_TABLE; 1015 1016 /// 1017 /// Memory Topology Table definition. 1018 /// 1019 typedef struct { 1020 EFI_ACPI_DESCRIPTION_HEADER Header; 1021 UINT32 Reserved; 1022 } EFI_ACPI_6_3_MEMORY_TOPOLOGY_TABLE; 1023 1024 /// 1025 /// PMTT Version (as defined in ACPI 6.3 spec.) 1026 /// 1027 #define EFI_ACPI_6_3_MEMORY_TOPOLOGY_TABLE_REVISION 0x01 1028 1029 /// 1030 /// Common Memory Aggregator Device Structure. 1031 /// 1032 typedef struct { 1033 UINT8 Type; 1034 UINT8 Reserved; 1035 UINT16 Length; 1036 UINT16 Flags; 1037 UINT16 Reserved1; 1038 } EFI_ACPI_6_3_PMMT_COMMON_MEMORY_AGGREGATOR_DEVICE_STRUCTURE; 1039 1040 /// 1041 /// Memory Aggregator Device Type 1042 /// 1043 #define EFI_ACPI_6_3_PMMT_MEMORY_AGGREGATOR_DEVICE_TYPE_SOCKET 0x1 1044 #define EFI_ACPI_6_3_PMMT_MEMORY_AGGREGATOR_DEVICE_TYPE_MEMORY_CONTROLLER 0x2 1045 #define EFI_ACPI_6_3_PMMT_MEMORY_AGGREGATOR_DEVICE_TYPE_DIMM 0x3 1046 1047 /// 1048 /// Socket Memory Aggregator Device Structure. 1049 /// 1050 typedef struct { 1051 EFI_ACPI_6_3_PMMT_COMMON_MEMORY_AGGREGATOR_DEVICE_STRUCTURE Header; 1052 UINT16 SocketIdentifier; 1053 UINT16 Reserved; 1054 //EFI_ACPI_6_3_PMMT_MEMORY_CONTROLLER_MEMORY_AGGREGATOR_DEVICE_STRUCTURE MemoryController[]; 1055 } EFI_ACPI_6_3_PMMT_SOCKET_MEMORY_AGGREGATOR_DEVICE_STRUCTURE; 1056 1057 /// 1058 /// MemoryController Memory Aggregator Device Structure. 1059 /// 1060 typedef struct { 1061 EFI_ACPI_6_3_PMMT_COMMON_MEMORY_AGGREGATOR_DEVICE_STRUCTURE Header; 1062 UINT32 ReadLatency; 1063 UINT32 WriteLatency; 1064 UINT32 ReadBandwidth; 1065 UINT32 WriteBandwidth; 1066 UINT16 OptimalAccessUnit; 1067 UINT16 OptimalAccessAlignment; 1068 UINT16 Reserved; 1069 UINT16 NumberOfProximityDomains; 1070 //UINT32 ProximityDomain[NumberOfProximityDomains]; 1071 //EFI_ACPI_6_3_PMMT_DIMM_MEMORY_AGGREGATOR_DEVICE_STRUCTURE PhysicalComponent[]; 1072 } EFI_ACPI_6_3_PMMT_MEMORY_CONTROLLER_MEMORY_AGGREGATOR_DEVICE_STRUCTURE; 1073 1074 /// 1075 /// DIMM Memory Aggregator Device Structure. 1076 /// 1077 typedef struct { 1078 EFI_ACPI_6_3_PMMT_COMMON_MEMORY_AGGREGATOR_DEVICE_STRUCTURE Header; 1079 UINT16 PhysicalComponentIdentifier; 1080 UINT16 Reserved; 1081 UINT32 SizeOfDimm; 1082 UINT32 SmbiosHandle; 1083 } EFI_ACPI_6_3_PMMT_DIMM_MEMORY_AGGREGATOR_DEVICE_STRUCTURE; 1084 1085 /// 1086 /// Boot Graphics Resource Table definition. 1087 /// 1088 typedef struct { 1089 EFI_ACPI_DESCRIPTION_HEADER Header; 1090 /// 1091 /// 2-bytes (16 bit) version ID. This value must be 1. 1092 /// 1093 UINT16 Version; 1094 /// 1095 /// 1-byte status field indicating current status about the table. 1096 /// Bits[7:1] = Reserved (must be zero) 1097 /// Bit [0] = Valid. A one indicates the boot image graphic is valid. 1098 /// 1099 UINT8 Status; 1100 /// 1101 /// 1-byte enumerated type field indicating format of the image. 1102 /// 0 = Bitmap 1103 /// 1 - 255 Reserved (for future use) 1104 /// 1105 UINT8 ImageType; 1106 /// 1107 /// 8-byte (64 bit) physical address pointing to the firmware's in-memory copy 1108 /// of the image bitmap. 1109 /// 1110 UINT64 ImageAddress; 1111 /// 1112 /// A 4-byte (32-bit) unsigned long describing the display X-offset of the boot image. 1113 /// (X, Y) display offset of the top left corner of the boot image. 1114 /// The top left corner of the display is at offset (0, 0). 1115 /// 1116 UINT32 ImageOffsetX; 1117 /// 1118 /// A 4-byte (32-bit) unsigned long describing the display Y-offset of the boot image. 1119 /// (X, Y) display offset of the top left corner of the boot image. 1120 /// The top left corner of the display is at offset (0, 0). 1121 /// 1122 UINT32 ImageOffsetY; 1123 } EFI_ACPI_6_3_BOOT_GRAPHICS_RESOURCE_TABLE; 1124 1125 /// 1126 /// BGRT Revision 1127 /// 1128 #define EFI_ACPI_6_3_BOOT_GRAPHICS_RESOURCE_TABLE_REVISION 1 1129 1130 /// 1131 /// BGRT Version 1132 /// 1133 #define EFI_ACPI_6_3_BGRT_VERSION 0x01 1134 1135 /// 1136 /// BGRT Status 1137 /// 1138 #define EFI_ACPI_6_3_BGRT_STATUS_NOT_DISPLAYED 0x00 1139 #define EFI_ACPI_6_3_BGRT_STATUS_DISPLAYED 0x01 1140 1141 /// 1142 /// BGRT Image Type 1143 /// 1144 #define EFI_ACPI_6_3_BGRT_IMAGE_TYPE_BMP 0x00 1145 1146 /// 1147 /// FPDT Version (as defined in ACPI 6.3 spec.) 1148 /// 1149 #define EFI_ACPI_6_3_FIRMWARE_PERFORMANCE_DATA_TABLE_REVISION 0x01 1150 1151 /// 1152 /// FPDT Performance Record Types 1153 /// 1154 #define EFI_ACPI_6_3_FPDT_RECORD_TYPE_FIRMWARE_BASIC_BOOT_POINTER 0x0000 1155 #define EFI_ACPI_6_3_FPDT_RECORD_TYPE_S3_PERFORMANCE_TABLE_POINTER 0x0001 1156 1157 /// 1158 /// FPDT Performance Record Revision 1159 /// 1160 #define EFI_ACPI_6_3_FPDT_RECORD_REVISION_FIRMWARE_BASIC_BOOT_POINTER 0x01 1161 #define EFI_ACPI_6_3_FPDT_RECORD_REVISION_S3_PERFORMANCE_TABLE_POINTER 0x01 1162 1163 /// 1164 /// FPDT Runtime Performance Record Types 1165 /// 1166 #define EFI_ACPI_6_3_FPDT_RUNTIME_RECORD_TYPE_S3_RESUME 0x0000 1167 #define EFI_ACPI_6_3_FPDT_RUNTIME_RECORD_TYPE_S3_SUSPEND 0x0001 1168 #define EFI_ACPI_6_3_FPDT_RUNTIME_RECORD_TYPE_FIRMWARE_BASIC_BOOT 0x0002 1169 1170 /// 1171 /// FPDT Runtime Performance Record Revision 1172 /// 1173 #define EFI_ACPI_6_3_FPDT_RUNTIME_RECORD_REVISION_S3_RESUME 0x01 1174 #define EFI_ACPI_6_3_FPDT_RUNTIME_RECORD_REVISION_S3_SUSPEND 0x01 1175 #define EFI_ACPI_6_3_FPDT_RUNTIME_RECORD_REVISION_FIRMWARE_BASIC_BOOT 0x02 1176 1177 /// 1178 /// FPDT Performance Record header 1179 /// 1180 typedef struct { 1181 UINT16 Type; 1182 UINT8 Length; 1183 UINT8 Revision; 1184 } EFI_ACPI_6_3_FPDT_PERFORMANCE_RECORD_HEADER; 1185 1186 /// 1187 /// FPDT Performance Table header 1188 /// 1189 typedef struct { 1190 UINT32 Signature; 1191 UINT32 Length; 1192 } EFI_ACPI_6_3_FPDT_PERFORMANCE_TABLE_HEADER; 1193 1194 /// 1195 /// FPDT Firmware Basic Boot Performance Pointer Record Structure 1196 /// 1197 typedef struct { 1198 EFI_ACPI_6_3_FPDT_PERFORMANCE_RECORD_HEADER Header; 1199 UINT32 Reserved; 1200 /// 1201 /// 64-bit processor-relative physical address of the Basic Boot Performance Table. 1202 /// 1203 UINT64 BootPerformanceTablePointer; 1204 } EFI_ACPI_6_3_FPDT_BOOT_PERFORMANCE_TABLE_POINTER_RECORD; 1205 1206 /// 1207 /// FPDT S3 Performance Table Pointer Record Structure 1208 /// 1209 typedef struct { 1210 EFI_ACPI_6_3_FPDT_PERFORMANCE_RECORD_HEADER Header; 1211 UINT32 Reserved; 1212 /// 1213 /// 64-bit processor-relative physical address of the S3 Performance Table. 1214 /// 1215 UINT64 S3PerformanceTablePointer; 1216 } EFI_ACPI_6_3_FPDT_S3_PERFORMANCE_TABLE_POINTER_RECORD; 1217 1218 /// 1219 /// FPDT Firmware Basic Boot Performance Record Structure 1220 /// 1221 typedef struct { 1222 EFI_ACPI_6_3_FPDT_PERFORMANCE_RECORD_HEADER Header; 1223 UINT32 Reserved; 1224 /// 1225 /// Timer value logged at the beginning of firmware image execution. 1226 /// This may not always be zero or near zero. 1227 /// 1228 UINT64 ResetEnd; 1229 /// 1230 /// Timer value logged just prior to loading the OS boot loader into memory. 1231 /// For non-UEFI compatible boots, this field must be zero. 1232 /// 1233 UINT64 OsLoaderLoadImageStart; 1234 /// 1235 /// Timer value logged just prior to launching the previously loaded OS boot loader image. 1236 /// For non-UEFI compatible boots, the timer value logged will be just prior 1237 /// to the INT 19h handler invocation. 1238 /// 1239 UINT64 OsLoaderStartImageStart; 1240 /// 1241 /// Timer value logged at the point when the OS loader calls the 1242 /// ExitBootServices function for UEFI compatible firmware. 1243 /// For non-UEFI compatible boots, this field must be zero. 1244 /// 1245 UINT64 ExitBootServicesEntry; 1246 /// 1247 /// Timer value logged at the point just prior towhen the OS loader gaining 1248 /// control back from calls the ExitBootServices function for UEFI compatible firmware. 1249 /// For non-UEFI compatible boots, this field must be zero. 1250 /// 1251 UINT64 ExitBootServicesExit; 1252 } EFI_ACPI_6_3_FPDT_FIRMWARE_BASIC_BOOT_RECORD; 1253 1254 /// 1255 /// FPDT Firmware Basic Boot Performance Table signature 1256 /// 1257 #define EFI_ACPI_6_3_FPDT_BOOT_PERFORMANCE_TABLE_SIGNATURE SIGNATURE_32('F', 'B', 'P', 'T') 1258 1259 // 1260 // FPDT Firmware Basic Boot Performance Table 1261 // 1262 typedef struct { 1263 EFI_ACPI_6_3_FPDT_PERFORMANCE_TABLE_HEADER Header; 1264 // 1265 // one or more Performance Records. 1266 // 1267 } EFI_ACPI_6_3_FPDT_FIRMWARE_BASIC_BOOT_TABLE; 1268 1269 /// 1270 /// FPDT "S3PT" S3 Performance Table 1271 /// 1272 #define EFI_ACPI_6_3_FPDT_S3_PERFORMANCE_TABLE_SIGNATURE SIGNATURE_32('S', '3', 'P', 'T') 1273 1274 // 1275 // FPDT Firmware S3 Boot Performance Table 1276 // 1277 typedef struct { 1278 EFI_ACPI_6_3_FPDT_PERFORMANCE_TABLE_HEADER Header; 1279 // 1280 // one or more Performance Records. 1281 // 1282 } EFI_ACPI_6_3_FPDT_FIRMWARE_S3_BOOT_TABLE; 1283 1284 /// 1285 /// FPDT Basic S3 Resume Performance Record 1286 /// 1287 typedef struct { 1288 EFI_ACPI_6_3_FPDT_PERFORMANCE_RECORD_HEADER Header; 1289 /// 1290 /// A count of the number of S3 resume cycles since the last full boot sequence. 1291 /// 1292 UINT32 ResumeCount; 1293 /// 1294 /// Timer recorded at the end of BIOS S3 resume, just prior to handoff to the 1295 /// OS waking vector. Only the most recent resume cycle's time is retained. 1296 /// 1297 UINT64 FullResume; 1298 /// 1299 /// Average timer value of all resume cycles logged since the last full boot 1300 /// sequence, including the most recent resume. Note that the entire log of 1301 /// timer values does not need to be retained in order to calculate this average. 1302 /// 1303 UINT64 AverageResume; 1304 } EFI_ACPI_6_3_FPDT_S3_RESUME_RECORD; 1305 1306 /// 1307 /// FPDT Basic S3 Suspend Performance Record 1308 /// 1309 typedef struct { 1310 EFI_ACPI_6_3_FPDT_PERFORMANCE_RECORD_HEADER Header; 1311 /// 1312 /// Timer value recorded at the OS write to SLP_TYP upon entry to S3. 1313 /// Only the most recent suspend cycle's timer value is retained. 1314 /// 1315 UINT64 SuspendStart; 1316 /// 1317 /// Timer value recorded at the final firmware write to SLP_TYP (or other 1318 /// mechanism) used to trigger hardware entry to S3. 1319 /// Only the most recent suspend cycle's timer value is retained. 1320 /// 1321 UINT64 SuspendEnd; 1322 } EFI_ACPI_6_3_FPDT_S3_SUSPEND_RECORD; 1323 1324 /// 1325 /// Firmware Performance Record Table definition. 1326 /// 1327 typedef struct { 1328 EFI_ACPI_DESCRIPTION_HEADER Header; 1329 } EFI_ACPI_6_3_FIRMWARE_PERFORMANCE_RECORD_TABLE; 1330 1331 /// 1332 /// Generic Timer Description Table definition. 1333 /// 1334 typedef struct { 1335 EFI_ACPI_DESCRIPTION_HEADER Header; 1336 UINT64 CntControlBasePhysicalAddress; 1337 UINT32 Reserved; 1338 UINT32 SecurePL1TimerGSIV; 1339 UINT32 SecurePL1TimerFlags; 1340 UINT32 NonSecurePL1TimerGSIV; 1341 UINT32 NonSecurePL1TimerFlags; 1342 UINT32 VirtualTimerGSIV; 1343 UINT32 VirtualTimerFlags; 1344 UINT32 NonSecurePL2TimerGSIV; 1345 UINT32 NonSecurePL2TimerFlags; 1346 UINT64 CntReadBasePhysicalAddress; 1347 UINT32 PlatformTimerCount; 1348 UINT32 PlatformTimerOffset; 1349 UINT32 VirtualPL2TimerGSIV; 1350 UINT32 VirtualPL2TimerFlags; 1351 } EFI_ACPI_6_3_GENERIC_TIMER_DESCRIPTION_TABLE; 1352 1353 /// 1354 /// GTDT Version (as defined in ACPI 6.3 spec.) 1355 /// 1356 #define EFI_ACPI_6_3_GENERIC_TIMER_DESCRIPTION_TABLE_REVISION 0x03 1357 1358 /// 1359 /// Timer Flags. All other bits are reserved and must be 0. 1360 /// 1361 #define EFI_ACPI_6_3_GTDT_TIMER_FLAG_TIMER_INTERRUPT_MODE BIT0 1362 #define EFI_ACPI_6_3_GTDT_TIMER_FLAG_TIMER_INTERRUPT_POLARITY BIT1 1363 #define EFI_ACPI_6_3_GTDT_TIMER_FLAG_ALWAYS_ON_CAPABILITY BIT2 1364 1365 /// 1366 /// Platform Timer Type 1367 /// 1368 #define EFI_ACPI_6_3_GTDT_GT_BLOCK 0 1369 #define EFI_ACPI_6_3_GTDT_SBSA_GENERIC_WATCHDOG 1 1370 1371 /// 1372 /// GT Block Structure 1373 /// 1374 typedef struct { 1375 UINT8 Type; 1376 UINT16 Length; 1377 UINT8 Reserved; 1378 UINT64 CntCtlBase; 1379 UINT32 GTBlockTimerCount; 1380 UINT32 GTBlockTimerOffset; 1381 } EFI_ACPI_6_3_GTDT_GT_BLOCK_STRUCTURE; 1382 1383 /// 1384 /// GT Block Timer Structure 1385 /// 1386 typedef struct { 1387 UINT8 GTFrameNumber; 1388 UINT8 Reserved[3]; 1389 UINT64 CntBaseX; 1390 UINT64 CntEL0BaseX; 1391 UINT32 GTxPhysicalTimerGSIV; 1392 UINT32 GTxPhysicalTimerFlags; 1393 UINT32 GTxVirtualTimerGSIV; 1394 UINT32 GTxVirtualTimerFlags; 1395 UINT32 GTxCommonFlags; 1396 } EFI_ACPI_6_3_GTDT_GT_BLOCK_TIMER_STRUCTURE; 1397 1398 /// 1399 /// GT Block Physical Timers and Virtual Timers Flags. All other bits are reserved and must be 0. 1400 /// 1401 #define EFI_ACPI_6_3_GTDT_GT_BLOCK_TIMER_FLAG_TIMER_INTERRUPT_MODE BIT0 1402 #define EFI_ACPI_6_3_GTDT_GT_BLOCK_TIMER_FLAG_TIMER_INTERRUPT_POLARITY BIT1 1403 1404 /// 1405 /// Common Flags Flags. All other bits are reserved and must be 0. 1406 /// 1407 #define EFI_ACPI_6_3_GTDT_GT_BLOCK_COMMON_FLAG_SECURE_TIMER BIT0 1408 #define EFI_ACPI_6_3_GTDT_GT_BLOCK_COMMON_FLAG_ALWAYS_ON_CAPABILITY BIT1 1409 1410 /// 1411 /// SBSA Generic Watchdog Structure 1412 /// 1413 typedef struct { 1414 UINT8 Type; 1415 UINT16 Length; 1416 UINT8 Reserved; 1417 UINT64 RefreshFramePhysicalAddress; 1418 UINT64 WatchdogControlFramePhysicalAddress; 1419 UINT32 WatchdogTimerGSIV; 1420 UINT32 WatchdogTimerFlags; 1421 } EFI_ACPI_6_3_GTDT_SBSA_GENERIC_WATCHDOG_STRUCTURE; 1422 1423 /// 1424 /// SBSA Generic Watchdog Timer Flags. All other bits are reserved and must be 0. 1425 /// 1426 #define EFI_ACPI_6_3_GTDT_SBSA_GENERIC_WATCHDOG_FLAG_TIMER_INTERRUPT_MODE BIT0 1427 #define EFI_ACPI_6_3_GTDT_SBSA_GENERIC_WATCHDOG_FLAG_TIMER_INTERRUPT_POLARITY BIT1 1428 #define EFI_ACPI_6_3_GTDT_SBSA_GENERIC_WATCHDOG_FLAG_SECURE_TIMER BIT2 1429 1430 // 1431 // NVDIMM Firmware Interface Table definition. 1432 // 1433 typedef struct { 1434 EFI_ACPI_DESCRIPTION_HEADER Header; 1435 UINT32 Reserved; 1436 } EFI_ACPI_6_3_NVDIMM_FIRMWARE_INTERFACE_TABLE; 1437 1438 // 1439 // NFIT Version (as defined in ACPI 6.3 spec.) 1440 // 1441 #define EFI_ACPI_6_3_NVDIMM_FIRMWARE_INTERFACE_TABLE_REVISION 0x1 1442 1443 // 1444 // Definition for NFIT Table Structure Types 1445 // 1446 #define EFI_ACPI_6_3_NFIT_SYSTEM_PHYSICAL_ADDRESS_RANGE_STRUCTURE_TYPE 0 1447 #define EFI_ACPI_6_3_NFIT_NVDIMM_REGION_MAPPING_STRUCTURE_TYPE 1 1448 #define EFI_ACPI_6_3_NFIT_INTERLEAVE_STRUCTURE_TYPE 2 1449 #define EFI_ACPI_6_3_NFIT_SMBIOS_MANAGEMENT_INFORMATION_STRUCTURE_TYPE 3 1450 #define EFI_ACPI_6_3_NFIT_NVDIMM_CONTROL_REGION_STRUCTURE_TYPE 4 1451 #define EFI_ACPI_6_3_NFIT_NVDIMM_BLOCK_DATA_WINDOW_REGION_STRUCTURE_TYPE 5 1452 #define EFI_ACPI_6_3_NFIT_FLUSH_HINT_ADDRESS_STRUCTURE_TYPE 6 1453 1454 // 1455 // Definition for NFIT Structure Header 1456 // 1457 typedef struct { 1458 UINT16 Type; 1459 UINT16 Length; 1460 } EFI_ACPI_6_3_NFIT_STRUCTURE_HEADER; 1461 1462 // 1463 // Definition for System Physical Address Range Structure 1464 // 1465 #define EFI_ACPI_6_3_NFIT_SYSTEM_PHYSICAL_ADDRESS_RANGE_FLAGS_CONTROL_REGION_FOR_MANAGEMENT BIT0 1466 #define EFI_ACPI_6_3_NFIT_SYSTEM_PHYSICAL_ADDRESS_RANGE_FLAGS_PROXIMITY_DOMAIN_VALID BIT1 1467 #define EFI_ACPI_6_3_NFIT_GUID_VOLATILE_MEMORY_REGION { 0x7305944F, 0xFDDA, 0x44E3, { 0xB1, 0x6C, 0x3F, 0x22, 0xD2, 0x52, 0xE5, 0xD0 }} 1468 #define EFI_ACPI_6_3_NFIT_GUID_BYTE_ADDRESSABLE_PERSISTENT_MEMORY_REGION { 0x66F0D379, 0xB4F3, 0x4074, { 0xAC, 0x43, 0x0D, 0x33, 0x18, 0xB7, 0x8C, 0xDB }} 1469 #define EFI_ACPI_6_3_NFIT_GUID_NVDIMM_CONTROL_REGION { 0x92F701F6, 0x13B4, 0x405D, { 0x91, 0x0B, 0x29, 0x93, 0x67, 0xE8, 0x23, 0x4C }} 1470 #define EFI_ACPI_6_3_NFIT_GUID_NVDIMM_BLOCK_DATA_WINDOW_REGION { 0x91AF0530, 0x5D86, 0x470E, { 0xA6, 0xB0, 0x0A, 0x2D, 0xB9, 0x40, 0x82, 0x49 }} 1471 #define EFI_ACPI_6_3_NFIT_GUID_RAM_DISK_SUPPORTING_VIRTUAL_DISK_REGION_VOLATILE { 0x77AB535A, 0x45FC, 0x624B, { 0x55, 0x60, 0xF7, 0xB2, 0x81, 0xD1, 0xF9, 0x6E }} 1472 #define EFI_ACPI_6_3_NFIT_GUID_RAM_DISK_SUPPORTING_VIRTUAL_CD_REGION_VOLATILE { 0x3D5ABD30, 0x4175, 0x87CE, { 0x6D, 0x64, 0xD2, 0xAD, 0xE5, 0x23, 0xC4, 0xBB }} 1473 #define EFI_ACPI_6_3_NFIT_GUID_RAM_DISK_SUPPORTING_VIRTUAL_DISK_REGION_PERSISTENT { 0x5CEA02C9, 0x4D07, 0x69D3, { 0x26, 0x9F ,0x44, 0x96, 0xFB, 0xE0, 0x96, 0xF9 }} 1474 #define EFI_ACPI_6_3_NFIT_GUID_RAM_DISK_SUPPORTING_VIRTUAL_CD_REGION_PERSISTENT { 0x08018188, 0x42CD, 0xBB48, { 0x10, 0x0F, 0x53, 0x87, 0xD5, 0x3D, 0xED, 0x3D }} 1475 typedef struct { 1476 UINT16 Type; 1477 UINT16 Length; 1478 UINT16 SPARangeStructureIndex; 1479 UINT16 Flags; 1480 UINT32 Reserved_8; 1481 UINT32 ProximityDomain; 1482 GUID AddressRangeTypeGUID; 1483 UINT64 SystemPhysicalAddressRangeBase; 1484 UINT64 SystemPhysicalAddressRangeLength; 1485 UINT64 AddressRangeMemoryMappingAttribute; 1486 } EFI_ACPI_6_3_NFIT_SYSTEM_PHYSICAL_ADDRESS_RANGE_STRUCTURE; 1487 1488 // 1489 // Definition for Memory Device to System Physical Address Range Mapping Structure 1490 // 1491 typedef struct { 1492 UINT32 DIMMNumber:4; 1493 UINT32 MemoryChannelNumber:4; 1494 UINT32 MemoryControllerID:4; 1495 UINT32 SocketID:4; 1496 UINT32 NodeControllerID:12; 1497 UINT32 Reserved_28:4; 1498 } EFI_ACPI_6_3_NFIT_DEVICE_HANDLE; 1499 1500 #define EFI_ACPI_6_3_NFIT_MEMORY_DEVICE_STATE_FLAGS_PREVIOUS_SAVE_FAIL BIT0 1501 #define EFI_ACPI_6_3_NFIT_MEMORY_DEVICE_STATE_FLAGS_LAST_RESTORE_FAIL BIT1 1502 #define EFI_ACPI_6_3_NFIT_MEMORY_DEVICE_STATE_FLAGS_PLATFORM_FLUSH_FAIL BIT2 1503 #define EFI_ACPI_6_3_NFIT_MEMORY_DEVICE_STATE_FLAGS_NOT_ARMED_PRIOR_TO_OSPM_HAND_OFF BIT3 1504 #define EFI_ACPI_6_3_NFIT_MEMORY_DEVICE_STATE_FLAGS_SMART_HEALTH_EVENTS_PRIOR_OSPM_HAND_OFF BIT4 1505 #define EFI_ACPI_6_3_NFIT_MEMORY_DEVICE_STATE_FLAGS_FIRMWARE_ENABLED_TO_NOTIFY_OSPM_ON_SMART_HEALTH_EVENTS BIT5 1506 #define EFI_ACPI_6_3_NFIT_MEMORY_DEVICE_STATE_FLAGS_FIRMWARE_NOT_MAP_NVDIMM_TO_SPA BIT6 1507 typedef struct { 1508 UINT16 Type; 1509 UINT16 Length; 1510 EFI_ACPI_6_3_NFIT_DEVICE_HANDLE NFITDeviceHandle; 1511 UINT16 NVDIMMPhysicalID; 1512 UINT16 NVDIMMRegionID; 1513 UINT16 SPARangeStructureIndex ; 1514 UINT16 NVDIMMControlRegionStructureIndex; 1515 UINT64 NVDIMMRegionSize; 1516 UINT64 RegionOffset; 1517 UINT64 NVDIMMPhysicalAddressRegionBase; 1518 UINT16 InterleaveStructureIndex; 1519 UINT16 InterleaveWays; 1520 UINT16 NVDIMMStateFlags; 1521 UINT16 Reserved_46; 1522 } EFI_ACPI_6_3_NFIT_NVDIMM_REGION_MAPPING_STRUCTURE; 1523 1524 // 1525 // Definition for Interleave Structure 1526 // 1527 typedef struct { 1528 UINT16 Type; 1529 UINT16 Length; 1530 UINT16 InterleaveStructureIndex; 1531 UINT16 Reserved_6; 1532 UINT32 NumberOfLines; 1533 UINT32 LineSize; 1534 //UINT32 LineOffset[NumberOfLines]; 1535 } EFI_ACPI_6_3_NFIT_INTERLEAVE_STRUCTURE; 1536 1537 // 1538 // Definition for SMBIOS Management Information Structure 1539 // 1540 typedef struct { 1541 UINT16 Type; 1542 UINT16 Length; 1543 UINT32 Reserved_4; 1544 //UINT8 Data[]; 1545 } EFI_ACPI_6_3_NFIT_SMBIOS_MANAGEMENT_INFORMATION_STRUCTURE; 1546 1547 // 1548 // Definition for NVDIMM Control Region Structure 1549 // 1550 #define EFI_ACPI_6_3_NFIT_NVDIMM_CONTROL_REGION_VALID_FIELDS_MANUFACTURING BIT0 1551 1552 #define EFI_ACPI_6_3_NFIT_NVDIMM_CONTROL_REGION_FLAGS_BLOCK_DATA_WINDOWS_BUFFERED BIT0 1553 typedef struct { 1554 UINT16 Type; 1555 UINT16 Length; 1556 UINT16 NVDIMMControlRegionStructureIndex; 1557 UINT16 VendorID; 1558 UINT16 DeviceID; 1559 UINT16 RevisionID; 1560 UINT16 SubsystemVendorID; 1561 UINT16 SubsystemDeviceID; 1562 UINT16 SubsystemRevisionID; 1563 UINT8 ValidFields; 1564 UINT8 ManufacturingLocation; 1565 UINT16 ManufacturingDate; 1566 UINT8 Reserved_22[2]; 1567 UINT32 SerialNumber; 1568 UINT16 RegionFormatInterfaceCode; 1569 UINT16 NumberOfBlockControlWindows; 1570 UINT64 SizeOfBlockControlWindow; 1571 UINT64 CommandRegisterOffsetInBlockControlWindow; 1572 UINT64 SizeOfCommandRegisterInBlockControlWindows; 1573 UINT64 StatusRegisterOffsetInBlockControlWindow; 1574 UINT64 SizeOfStatusRegisterInBlockControlWindows; 1575 UINT16 NVDIMMControlRegionFlag; 1576 UINT8 Reserved_74[6]; 1577 } EFI_ACPI_6_3_NFIT_NVDIMM_CONTROL_REGION_STRUCTURE; 1578 1579 // 1580 // Definition for NVDIMM Block Data Window Region Structure 1581 // 1582 typedef struct { 1583 UINT16 Type; 1584 UINT16 Length; 1585 UINT16 NVDIMMControlRegionStructureIndex; 1586 UINT16 NumberOfBlockDataWindows; 1587 UINT64 BlockDataWindowStartOffset; 1588 UINT64 SizeOfBlockDataWindow; 1589 UINT64 BlockAccessibleMemoryCapacity; 1590 UINT64 BeginningAddressOfFirstBlockInBlockAccessibleMemory; 1591 } EFI_ACPI_6_3_NFIT_NVDIMM_BLOCK_DATA_WINDOW_REGION_STRUCTURE; 1592 1593 // 1594 // Definition for Flush Hint Address Structure 1595 // 1596 typedef struct { 1597 UINT16 Type; 1598 UINT16 Length; 1599 EFI_ACPI_6_3_NFIT_DEVICE_HANDLE NFITDeviceHandle; 1600 UINT16 NumberOfFlushHintAddresses; 1601 UINT8 Reserved_10[6]; 1602 //UINT64 FlushHintAddress[NumberOfFlushHintAddresses]; 1603 } EFI_ACPI_6_3_NFIT_FLUSH_HINT_ADDRESS_STRUCTURE; 1604 1605 /// 1606 /// Secure DEVices Table (SDEV) 1607 /// 1608 typedef struct { 1609 EFI_ACPI_DESCRIPTION_HEADER Header; 1610 } EFI_ACPI_6_3_SECURE_DEVICES_TABLE_HEADER; 1611 1612 /// 1613 /// SDEV Revision (as defined in ACPI 6.3 spec.) 1614 /// 1615 #define EFI_ACPI_6_3_SECURE_DEVICES_TABLE_REVISION 0x01 1616 1617 /// 1618 /// Secure Devcice types 1619 /// 1620 #define EFI_ACPI_6_3_SDEV_TYPE_PCIE_ENDPOINT_DEVICE 0x01 1621 #define EFI_ACPI_6_3_SDEV_TYPE_ACPI_NAMESPACE_DEVICE 0x00 1622 1623 /// 1624 /// Secure Devcice flags 1625 /// 1626 #define EFI_ACPI_6_3_SDEV_FLAG_ALLOW_HANDOFF BIT0 1627 1628 /// 1629 /// SDEV Structure Header 1630 /// 1631 typedef struct { 1632 UINT8 Type; 1633 UINT8 Flags; 1634 UINT16 Length; 1635 } EFI_ACPI_6_3_SDEV_STRUCTURE_HEADER; 1636 1637 /// 1638 /// PCIe Endpoint Device based Secure Device Structure 1639 /// 1640 typedef struct { 1641 UINT8 Type; 1642 UINT8 Flags; 1643 UINT16 Length; 1644 UINT16 PciSegmentNumber; 1645 UINT16 StartBusNumber; 1646 UINT16 PciPathOffset; 1647 UINT16 PciPathLength; 1648 UINT16 VendorSpecificDataOffset; 1649 UINT16 VendorSpecificDataLength; 1650 } EFI_ACPI_6_3_SDEV_STRUCTURE_PCIE_ENDPOINT_DEVICE; 1651 1652 /// 1653 /// ACPI_NAMESPACE_DEVICE based Secure Device Structure 1654 /// 1655 typedef struct { 1656 UINT8 Type; 1657 UINT8 Flags; 1658 UINT16 Length; 1659 UINT16 DeviceIdentifierOffset; 1660 UINT16 DeviceIdentifierLength; 1661 UINT16 VendorSpecificDataOffset; 1662 UINT16 VendorSpecificDataLength; 1663 } EFI_ACPI_6_3_SDEV_STRUCTURE_ACPI_NAMESPACE_DEVICE; 1664 1665 /// 1666 /// Boot Error Record Table (BERT) 1667 /// 1668 typedef struct { 1669 EFI_ACPI_DESCRIPTION_HEADER Header; 1670 UINT32 BootErrorRegionLength; 1671 UINT64 BootErrorRegion; 1672 } EFI_ACPI_6_3_BOOT_ERROR_RECORD_TABLE_HEADER; 1673 1674 /// 1675 /// BERT Version (as defined in ACPI 6.3 spec.) 1676 /// 1677 #define EFI_ACPI_6_3_BOOT_ERROR_RECORD_TABLE_REVISION 0x01 1678 1679 /// 1680 /// Boot Error Region Block Status Definition 1681 /// 1682 typedef struct { 1683 UINT32 UncorrectableErrorValid:1; 1684 UINT32 CorrectableErrorValid:1; 1685 UINT32 MultipleUncorrectableErrors:1; 1686 UINT32 MultipleCorrectableErrors:1; 1687 UINT32 ErrorDataEntryCount:10; 1688 UINT32 Reserved:18; 1689 } EFI_ACPI_6_3_ERROR_BLOCK_STATUS; 1690 1691 /// 1692 /// Boot Error Region Definition 1693 /// 1694 typedef struct { 1695 EFI_ACPI_6_3_ERROR_BLOCK_STATUS BlockStatus; 1696 UINT32 RawDataOffset; 1697 UINT32 RawDataLength; 1698 UINT32 DataLength; 1699 UINT32 ErrorSeverity; 1700 } EFI_ACPI_6_3_BOOT_ERROR_REGION_STRUCTURE; 1701 1702 // 1703 // Boot Error Severity types 1704 // 1705 #define EFI_ACPI_6_3_ERROR_SEVERITY_CORRECTABLE 0x00 1706 #define EFI_ACPI_6_3_ERROR_SEVERITY_FATAL 0x01 1707 #define EFI_ACPI_6_3_ERROR_SEVERITY_CORRECTED 0x02 1708 #define EFI_ACPI_6_3_ERROR_SEVERITY_NONE 0x03 1709 1710 /// 1711 /// Generic Error Data Entry Definition 1712 /// 1713 typedef struct { 1714 UINT8 SectionType[16]; 1715 UINT32 ErrorSeverity; 1716 UINT16 Revision; 1717 UINT8 ValidationBits; 1718 UINT8 Flags; 1719 UINT32 ErrorDataLength; 1720 UINT8 FruId[16]; 1721 UINT8 FruText[20]; 1722 UINT8 Timestamp[8]; 1723 } EFI_ACPI_6_3_GENERIC_ERROR_DATA_ENTRY_STRUCTURE; 1724 1725 /// 1726 /// Generic Error Data Entry Version (as defined in ACPI 6.3 spec.) 1727 /// 1728 #define EFI_ACPI_6_3_GENERIC_ERROR_DATA_ENTRY_REVISION 0x0300 1729 1730 /// 1731 /// HEST - Hardware Error Source Table 1732 /// 1733 typedef struct { 1734 EFI_ACPI_DESCRIPTION_HEADER Header; 1735 UINT32 ErrorSourceCount; 1736 } EFI_ACPI_6_3_HARDWARE_ERROR_SOURCE_TABLE_HEADER; 1737 1738 /// 1739 /// HEST Version (as defined in ACPI 6.3 spec.) 1740 /// 1741 #define EFI_ACPI_6_3_HARDWARE_ERROR_SOURCE_TABLE_REVISION 0x01 1742 1743 // 1744 // Error Source structure types. 1745 // 1746 #define EFI_ACPI_6_3_IA32_ARCHITECTURE_MACHINE_CHECK_EXCEPTION 0x00 1747 #define EFI_ACPI_6_3_IA32_ARCHITECTURE_CORRECTED_MACHINE_CHECK 0x01 1748 #define EFI_ACPI_6_3_IA32_ARCHITECTURE_NMI_ERROR 0x02 1749 #define EFI_ACPI_6_3_PCI_EXPRESS_ROOT_PORT_AER 0x06 1750 #define EFI_ACPI_6_3_PCI_EXPRESS_DEVICE_AER 0x07 1751 #define EFI_ACPI_6_3_PCI_EXPRESS_BRIDGE_AER 0x08 1752 #define EFI_ACPI_6_3_GENERIC_HARDWARE_ERROR 0x09 1753 #define EFI_ACPI_6_3_GENERIC_HARDWARE_ERROR_VERSION_2 0x0A 1754 #define EFI_ACPI_6_3_IA32_ARCHITECTURE_DEFERRED_MACHINE_CHECK 0x0B 1755 1756 // 1757 // Error Source structure flags. 1758 // 1759 #define EFI_ACPI_6_3_ERROR_SOURCE_FLAG_FIRMWARE_FIRST (1 << 0) 1760 #define EFI_ACPI_6_3_ERROR_SOURCE_FLAG_GLOBAL (1 << 1) 1761 #define EFI_ACPI_6_3_ERROR_SOURCE_FLAG_GHES_ASSIST (1 << 2) 1762 1763 /// 1764 /// IA-32 Architecture Machine Check Exception Structure Definition 1765 /// 1766 typedef struct { 1767 UINT16 Type; 1768 UINT16 SourceId; 1769 UINT8 Reserved0[2]; 1770 UINT8 Flags; 1771 UINT8 Enabled; 1772 UINT32 NumberOfRecordsToPreAllocate; 1773 UINT32 MaxSectionsPerRecord; 1774 UINT64 GlobalCapabilityInitData; 1775 UINT64 GlobalControlInitData; 1776 UINT8 NumberOfHardwareBanks; 1777 UINT8 Reserved1[7]; 1778 } EFI_ACPI_6_3_IA32_ARCHITECTURE_MACHINE_CHECK_EXCEPTION_STRUCTURE; 1779 1780 /// 1781 /// IA-32 Architecture Machine Check Bank Structure Definition 1782 /// 1783 typedef struct { 1784 UINT8 BankNumber; 1785 UINT8 ClearStatusOnInitialization; 1786 UINT8 StatusDataFormat; 1787 UINT8 Reserved0; 1788 UINT32 ControlRegisterMsrAddress; 1789 UINT64 ControlInitData; 1790 UINT32 StatusRegisterMsrAddress; 1791 UINT32 AddressRegisterMsrAddress; 1792 UINT32 MiscRegisterMsrAddress; 1793 } EFI_ACPI_6_3_IA32_ARCHITECTURE_MACHINE_CHECK_ERROR_BANK_STRUCTURE; 1794 1795 /// 1796 /// IA-32 Architecture Machine Check Bank Structure MCA data format 1797 /// 1798 #define EFI_ACPI_6_3_IA32_ARCHITECTURE_MACHINE_CHECK_ERROR_DATA_FORMAT_IA32 0x00 1799 #define EFI_ACPI_6_3_IA32_ARCHITECTURE_MACHINE_CHECK_ERROR_DATA_FORMAT_INTEL64 0x01 1800 #define EFI_ACPI_6_3_IA32_ARCHITECTURE_MACHINE_CHECK_ERROR_DATA_FORMAT_AMD64 0x02 1801 1802 // 1803 // Hardware Error Notification types. All other values are reserved 1804 // 1805 #define EFI_ACPI_6_3_HARDWARE_ERROR_NOTIFICATION_POLLED 0x00 1806 #define EFI_ACPI_6_3_HARDWARE_ERROR_NOTIFICATION_EXTERNAL_INTERRUPT 0x01 1807 #define EFI_ACPI_6_3_HARDWARE_ERROR_NOTIFICATION_LOCAL_INTERRUPT 0x02 1808 #define EFI_ACPI_6_3_HARDWARE_ERROR_NOTIFICATION_SCI 0x03 1809 #define EFI_ACPI_6_3_HARDWARE_ERROR_NOTIFICATION_NMI 0x04 1810 #define EFI_ACPI_6_3_HARDWARE_ERROR_NOTIFICATION_CMCI 0x05 1811 #define EFI_ACPI_6_3_HARDWARE_ERROR_NOTIFICATION_MCE 0x06 1812 #define EFI_ACPI_6_3_HARDWARE_ERROR_NOTIFICATION_GPIO_SIGNAL 0x07 1813 #define EFI_ACPI_6_3_HARDWARE_ERROR_NOTIFICATION_ARMV8_SEA 0x08 1814 #define EFI_ACPI_6_3_HARDWARE_ERROR_NOTIFICATION_ARMV8_SEI 0x09 1815 #define EFI_ACPI_6_3_HARDWARE_ERROR_NOTIFICATION_GSIV 0x0A 1816 #define EFI_ACPI_6_3_HARDWARE_ERROR_NOTIFICATION_SOFTWARE_DELEGATED_EXCEPTION 0x0B 1817 1818 /// 1819 /// Hardware Error Notification Configuration Write Enable Structure Definition 1820 /// 1821 typedef struct { 1822 UINT16 Type:1; 1823 UINT16 PollInterval:1; 1824 UINT16 SwitchToPollingThresholdValue:1; 1825 UINT16 SwitchToPollingThresholdWindow:1; 1826 UINT16 ErrorThresholdValue:1; 1827 UINT16 ErrorThresholdWindow:1; 1828 UINT16 Reserved:10; 1829 } EFI_ACPI_6_3_HARDWARE_ERROR_NOTIFICATION_CONFIGURATION_WRITE_ENABLE_STRUCTURE; 1830 1831 /// 1832 /// Hardware Error Notification Structure Definition 1833 /// 1834 typedef struct { 1835 UINT8 Type; 1836 UINT8 Length; 1837 EFI_ACPI_6_3_HARDWARE_ERROR_NOTIFICATION_CONFIGURATION_WRITE_ENABLE_STRUCTURE ConfigurationWriteEnable; 1838 UINT32 PollInterval; 1839 UINT32 Vector; 1840 UINT32 SwitchToPollingThresholdValue; 1841 UINT32 SwitchToPollingThresholdWindow; 1842 UINT32 ErrorThresholdValue; 1843 UINT32 ErrorThresholdWindow; 1844 } EFI_ACPI_6_3_HARDWARE_ERROR_NOTIFICATION_STRUCTURE; 1845 1846 /// 1847 /// IA-32 Architecture Corrected Machine Check Structure Definition 1848 /// 1849 typedef struct { 1850 UINT16 Type; 1851 UINT16 SourceId; 1852 UINT8 Reserved0[2]; 1853 UINT8 Flags; 1854 UINT8 Enabled; 1855 UINT32 NumberOfRecordsToPreAllocate; 1856 UINT32 MaxSectionsPerRecord; 1857 EFI_ACPI_6_3_HARDWARE_ERROR_NOTIFICATION_STRUCTURE NotificationStructure; 1858 UINT8 NumberOfHardwareBanks; 1859 UINT8 Reserved1[3]; 1860 } EFI_ACPI_6_3_IA32_ARCHITECTURE_CORRECTED_MACHINE_CHECK_STRUCTURE; 1861 1862 /// 1863 /// IA-32 Architecture NMI Error Structure Definition 1864 /// 1865 typedef struct { 1866 UINT16 Type; 1867 UINT16 SourceId; 1868 UINT8 Reserved0[2]; 1869 UINT32 NumberOfRecordsToPreAllocate; 1870 UINT32 MaxSectionsPerRecord; 1871 UINT32 MaxRawDataLength; 1872 } EFI_ACPI_6_3_IA32_ARCHITECTURE_NMI_ERROR_STRUCTURE; 1873 1874 /// 1875 /// PCI Express Root Port AER Structure Definition 1876 /// 1877 typedef struct { 1878 UINT16 Type; 1879 UINT16 SourceId; 1880 UINT8 Reserved0[2]; 1881 UINT8 Flags; 1882 UINT8 Enabled; 1883 UINT32 NumberOfRecordsToPreAllocate; 1884 UINT32 MaxSectionsPerRecord; 1885 UINT32 Bus; 1886 UINT16 Device; 1887 UINT16 Function; 1888 UINT16 DeviceControl; 1889 UINT8 Reserved1[2]; 1890 UINT32 UncorrectableErrorMask; 1891 UINT32 UncorrectableErrorSeverity; 1892 UINT32 CorrectableErrorMask; 1893 UINT32 AdvancedErrorCapabilitiesAndControl; 1894 UINT32 RootErrorCommand; 1895 } EFI_ACPI_6_3_PCI_EXPRESS_ROOT_PORT_AER_STRUCTURE; 1896 1897 /// 1898 /// PCI Express Device AER Structure Definition 1899 /// 1900 typedef struct { 1901 UINT16 Type; 1902 UINT16 SourceId; 1903 UINT8 Reserved0[2]; 1904 UINT8 Flags; 1905 UINT8 Enabled; 1906 UINT32 NumberOfRecordsToPreAllocate; 1907 UINT32 MaxSectionsPerRecord; 1908 UINT32 Bus; 1909 UINT16 Device; 1910 UINT16 Function; 1911 UINT16 DeviceControl; 1912 UINT8 Reserved1[2]; 1913 UINT32 UncorrectableErrorMask; 1914 UINT32 UncorrectableErrorSeverity; 1915 UINT32 CorrectableErrorMask; 1916 UINT32 AdvancedErrorCapabilitiesAndControl; 1917 } EFI_ACPI_6_3_PCI_EXPRESS_DEVICE_AER_STRUCTURE; 1918 1919 /// 1920 /// PCI Express Bridge AER Structure Definition 1921 /// 1922 typedef struct { 1923 UINT16 Type; 1924 UINT16 SourceId; 1925 UINT8 Reserved0[2]; 1926 UINT8 Flags; 1927 UINT8 Enabled; 1928 UINT32 NumberOfRecordsToPreAllocate; 1929 UINT32 MaxSectionsPerRecord; 1930 UINT32 Bus; 1931 UINT16 Device; 1932 UINT16 Function; 1933 UINT16 DeviceControl; 1934 UINT8 Reserved1[2]; 1935 UINT32 UncorrectableErrorMask; 1936 UINT32 UncorrectableErrorSeverity; 1937 UINT32 CorrectableErrorMask; 1938 UINT32 AdvancedErrorCapabilitiesAndControl; 1939 UINT32 SecondaryUncorrectableErrorMask; 1940 UINT32 SecondaryUncorrectableErrorSeverity; 1941 UINT32 SecondaryAdvancedErrorCapabilitiesAndControl; 1942 } EFI_ACPI_6_3_PCI_EXPRESS_BRIDGE_AER_STRUCTURE; 1943 1944 /// 1945 /// Generic Hardware Error Source Structure Definition 1946 /// 1947 typedef struct { 1948 UINT16 Type; 1949 UINT16 SourceId; 1950 UINT16 RelatedSourceId; 1951 UINT8 Flags; 1952 UINT8 Enabled; 1953 UINT32 NumberOfRecordsToPreAllocate; 1954 UINT32 MaxSectionsPerRecord; 1955 UINT32 MaxRawDataLength; 1956 EFI_ACPI_6_3_GENERIC_ADDRESS_STRUCTURE ErrorStatusAddress; 1957 EFI_ACPI_6_3_HARDWARE_ERROR_NOTIFICATION_STRUCTURE NotificationStructure; 1958 UINT32 ErrorStatusBlockLength; 1959 } EFI_ACPI_6_3_GENERIC_HARDWARE_ERROR_SOURCE_STRUCTURE; 1960 1961 /// 1962 /// Generic Hardware Error Source Version 2 Structure Definition 1963 /// 1964 typedef struct { 1965 UINT16 Type; 1966 UINT16 SourceId; 1967 UINT16 RelatedSourceId; 1968 UINT8 Flags; 1969 UINT8 Enabled; 1970 UINT32 NumberOfRecordsToPreAllocate; 1971 UINT32 MaxSectionsPerRecord; 1972 UINT32 MaxRawDataLength; 1973 EFI_ACPI_6_3_GENERIC_ADDRESS_STRUCTURE ErrorStatusAddress; 1974 EFI_ACPI_6_3_HARDWARE_ERROR_NOTIFICATION_STRUCTURE NotificationStructure; 1975 UINT32 ErrorStatusBlockLength; 1976 EFI_ACPI_6_3_GENERIC_ADDRESS_STRUCTURE ReadAckRegister; 1977 UINT64 ReadAckPreserve; 1978 UINT64 ReadAckWrite; 1979 } EFI_ACPI_6_3_GENERIC_HARDWARE_ERROR_SOURCE_VERSION_2_STRUCTURE; 1980 1981 /// 1982 /// Generic Error Status Definition 1983 /// 1984 typedef struct { 1985 EFI_ACPI_6_3_ERROR_BLOCK_STATUS BlockStatus; 1986 UINT32 RawDataOffset; 1987 UINT32 RawDataLength; 1988 UINT32 DataLength; 1989 UINT32 ErrorSeverity; 1990 } EFI_ACPI_6_3_GENERIC_ERROR_STATUS_STRUCTURE; 1991 1992 /// 1993 /// IA-32 Architecture Deferred Machine Check Structure Definition 1994 /// 1995 typedef struct { 1996 UINT16 Type; 1997 UINT16 SourceId; 1998 UINT8 Reserved0[2]; 1999 UINT8 Flags; 2000 UINT8 Enabled; 2001 UINT32 NumberOfRecordsToPreAllocate; 2002 UINT32 MaxSectionsPerRecord; 2003 EFI_ACPI_6_3_HARDWARE_ERROR_NOTIFICATION_STRUCTURE NotificationStructure; 2004 UINT8 NumberOfHardwareBanks; 2005 UINT8 Reserved1[3]; 2006 } EFI_ACPI_6_3_IA32_ARCHITECTURE_DEFERRED_MACHINE_CHECK_STRUCTURE;; 2007 2008 /// 2009 /// HMAT - Heterogeneous Memory Attribute Table 2010 /// 2011 typedef struct { 2012 EFI_ACPI_DESCRIPTION_HEADER Header; 2013 UINT8 Reserved[4]; 2014 } EFI_ACPI_6_3_HETEROGENEOUS_MEMORY_ATTRIBUTE_TABLE_HEADER; 2015 2016 /// 2017 /// HMAT Revision (as defined in ACPI 6.3 spec.) 2018 /// 2019 #define EFI_ACPI_6_3_HETEROGENEOUS_MEMORY_ATTRIBUTE_TABLE_REVISION 0x02 2020 2021 /// 2022 /// HMAT types 2023 /// 2024 #define EFI_ACPI_6_3_HMAT_TYPE_MEMORY_PROXIMITY_DOMAIN_ATTRIBUTES 0x00 2025 #define EFI_ACPI_6_3_HMAT_TYPE_SYSTEM_LOCALITY_LATENCY_AND_BANDWIDTH_INFO 0x01 2026 #define EFI_ACPI_6_3_HMAT_TYPE_MEMORY_SIDE_CACHE_INFO 0x02 2027 2028 /// 2029 /// HMAT Structure Header 2030 /// 2031 typedef struct { 2032 UINT16 Type; 2033 UINT8 Reserved[2]; 2034 UINT32 Length; 2035 } EFI_ACPI_6_3_HMAT_STRUCTURE_HEADER; 2036 2037 /// 2038 /// Memory Proximity Domain Attributes Structure flags 2039 /// 2040 typedef struct { 2041 UINT16 InitiatorProximityDomainValid:1; 2042 UINT16 Reserved:15; 2043 } EFI_ACPI_6_3_HMAT_STRUCTURE_MEMORY_PROXIMITY_DOMAIN_ATTRIBUTES_FLAGS; 2044 2045 /// 2046 /// Memory Proximity Domain Attributes Structure 2047 /// 2048 typedef struct { 2049 UINT16 Type; 2050 UINT8 Reserved[2]; 2051 UINT32 Length; 2052 EFI_ACPI_6_3_HMAT_STRUCTURE_MEMORY_PROXIMITY_DOMAIN_ATTRIBUTES_FLAGS Flags; 2053 UINT8 Reserved1[2]; 2054 UINT32 InitiatorProximityDomain; 2055 UINT32 MemoryProximityDomain; 2056 UINT8 Reserved2[20]; 2057 } EFI_ACPI_6_3_HMAT_STRUCTURE_MEMORY_PROXIMITY_DOMAIN_ATTRIBUTES; 2058 2059 /// 2060 /// System Locality Latency and Bandwidth Information Structure flags 2061 /// 2062 typedef struct { 2063 UINT8 MemoryHierarchy:4; 2064 UINT8 Reserved:4; 2065 } EFI_ACPI_6_3_HMAT_STRUCTURE_SYSTEM_LOCALITY_LATENCY_AND_BANDWIDTH_INFO_FLAGS; 2066 2067 /// 2068 /// System Locality Latency and Bandwidth Information Structure 2069 /// 2070 typedef struct { 2071 UINT16 Type; 2072 UINT8 Reserved[2]; 2073 UINT32 Length; 2074 EFI_ACPI_6_3_HMAT_STRUCTURE_SYSTEM_LOCALITY_LATENCY_AND_BANDWIDTH_INFO_FLAGS Flags; 2075 UINT8 DataType; 2076 UINT8 Reserved1[2]; 2077 UINT32 NumberOfInitiatorProximityDomains; 2078 UINT32 NumberOfTargetProximityDomains; 2079 UINT8 Reserved2[4]; 2080 UINT64 EntryBaseUnit; 2081 } EFI_ACPI_6_3_HMAT_STRUCTURE_SYSTEM_LOCALITY_LATENCY_AND_BANDWIDTH_INFO; 2082 2083 /// 2084 /// Memory Side Cache Information Structure cache attributes 2085 /// 2086 typedef struct { 2087 UINT32 TotalCacheLevels:4; 2088 UINT32 CacheLevel:4; 2089 UINT32 CacheAssociativity:4; 2090 UINT32 WritePolicy:4; 2091 UINT32 CacheLineSize:16; 2092 } EFI_ACPI_6_3_HMAT_STRUCTURE_MEMORY_SIDE_CACHE_INFO_CACHE_ATTRIBUTES; 2093 2094 /// 2095 /// Memory Side Cache Information Structure 2096 /// 2097 typedef struct { 2098 UINT16 Type; 2099 UINT8 Reserved[2]; 2100 UINT32 Length; 2101 UINT32 MemoryProximityDomain; 2102 UINT8 Reserved1[4]; 2103 UINT64 MemorySideCacheSize; 2104 EFI_ACPI_6_3_HMAT_STRUCTURE_MEMORY_SIDE_CACHE_INFO_CACHE_ATTRIBUTES CacheAttributes; 2105 UINT8 Reserved2[2]; 2106 UINT16 NumberOfSmbiosHandles; 2107 } EFI_ACPI_6_3_HMAT_STRUCTURE_MEMORY_SIDE_CACHE_INFO; 2108 2109 /// 2110 /// ERST - Error Record Serialization Table 2111 /// 2112 typedef struct { 2113 EFI_ACPI_DESCRIPTION_HEADER Header; 2114 UINT32 SerializationHeaderSize; 2115 UINT8 Reserved0[4]; 2116 UINT32 InstructionEntryCount; 2117 } EFI_ACPI_6_3_ERROR_RECORD_SERIALIZATION_TABLE_HEADER; 2118 2119 /// 2120 /// ERST Version (as defined in ACPI 6.3 spec.) 2121 /// 2122 #define EFI_ACPI_6_3_ERROR_RECORD_SERIALIZATION_TABLE_REVISION 0x01 2123 2124 /// 2125 /// ERST Serialization Actions 2126 /// 2127 #define EFI_ACPI_6_3_ERST_BEGIN_WRITE_OPERATION 0x00 2128 #define EFI_ACPI_6_3_ERST_BEGIN_READ_OPERATION 0x01 2129 #define EFI_ACPI_6_3_ERST_BEGIN_CLEAR_OPERATION 0x02 2130 #define EFI_ACPI_6_3_ERST_END_OPERATION 0x03 2131 #define EFI_ACPI_6_3_ERST_SET_RECORD_OFFSET 0x04 2132 #define EFI_ACPI_6_3_ERST_EXECUTE_OPERATION 0x05 2133 #define EFI_ACPI_6_3_ERST_CHECK_BUSY_STATUS 0x06 2134 #define EFI_ACPI_6_3_ERST_GET_COMMAND_STATUS 0x07 2135 #define EFI_ACPI_6_3_ERST_GET_RECORD_IDENTIFIER 0x08 2136 #define EFI_ACPI_6_3_ERST_SET_RECORD_IDENTIFIER 0x09 2137 #define EFI_ACPI_6_3_ERST_GET_RECORD_COUNT 0x0A 2138 #define EFI_ACPI_6_3_ERST_BEGIN_DUMMY_WRITE_OPERATION 0x0B 2139 #define EFI_ACPI_6_3_ERST_GET_ERROR_LOG_ADDRESS_RANGE 0x0D 2140 #define EFI_ACPI_6_3_ERST_GET_ERROR_LOG_ADDRESS_RANGE_LENGTH 0x0E 2141 #define EFI_ACPI_6_3_ERST_GET_ERROR_LOG_ADDRESS_RANGE_ATTRIBUTES 0x0F 2142 #define EFI_ACPI_6_3_ERST_GET_EXECUTE_OPERATION_TIMINGS 0x10 2143 2144 /// 2145 /// ERST Action Command Status 2146 /// 2147 #define EFI_ACPI_6_3_ERST_STATUS_SUCCESS 0x00 2148 #define EFI_ACPI_6_3_ERST_STATUS_NOT_ENOUGH_SPACE 0x01 2149 #define EFI_ACPI_6_3_ERST_STATUS_HARDWARE_NOT_AVAILABLE 0x02 2150 #define EFI_ACPI_6_3_ERST_STATUS_FAILED 0x03 2151 #define EFI_ACPI_6_3_ERST_STATUS_RECORD_STORE_EMPTY 0x04 2152 #define EFI_ACPI_6_3_ERST_STATUS_RECORD_NOT_FOUND 0x05 2153 2154 /// 2155 /// ERST Serialization Instructions 2156 /// 2157 #define EFI_ACPI_6_3_ERST_READ_REGISTER 0x00 2158 #define EFI_ACPI_6_3_ERST_READ_REGISTER_VALUE 0x01 2159 #define EFI_ACPI_6_3_ERST_WRITE_REGISTER 0x02 2160 #define EFI_ACPI_6_3_ERST_WRITE_REGISTER_VALUE 0x03 2161 #define EFI_ACPI_6_3_ERST_NOOP 0x04 2162 #define EFI_ACPI_6_3_ERST_LOAD_VAR1 0x05 2163 #define EFI_ACPI_6_3_ERST_LOAD_VAR2 0x06 2164 #define EFI_ACPI_6_3_ERST_STORE_VAR1 0x07 2165 #define EFI_ACPI_6_3_ERST_ADD 0x08 2166 #define EFI_ACPI_6_3_ERST_SUBTRACT 0x09 2167 #define EFI_ACPI_6_3_ERST_ADD_VALUE 0x0A 2168 #define EFI_ACPI_6_3_ERST_SUBTRACT_VALUE 0x0B 2169 #define EFI_ACPI_6_3_ERST_STALL 0x0C 2170 #define EFI_ACPI_6_3_ERST_STALL_WHILE_TRUE 0x0D 2171 #define EFI_ACPI_6_3_ERST_SKIP_NEXT_INSTRUCTION_IF_TRUE 0x0E 2172 #define EFI_ACPI_6_3_ERST_GOTO 0x0F 2173 #define EFI_ACPI_6_3_ERST_SET_SRC_ADDRESS_BASE 0x10 2174 #define EFI_ACPI_6_3_ERST_SET_DST_ADDRESS_BASE 0x11 2175 #define EFI_ACPI_6_3_ERST_MOVE_DATA 0x12 2176 2177 /// 2178 /// ERST Instruction Flags 2179 /// 2180 #define EFI_ACPI_6_3_ERST_PRESERVE_REGISTER 0x01 2181 2182 /// 2183 /// ERST Serialization Instruction Entry 2184 /// 2185 typedef struct { 2186 UINT8 SerializationAction; 2187 UINT8 Instruction; 2188 UINT8 Flags; 2189 UINT8 Reserved0; 2190 EFI_ACPI_6_3_GENERIC_ADDRESS_STRUCTURE RegisterRegion; 2191 UINT64 Value; 2192 UINT64 Mask; 2193 } EFI_ACPI_6_3_ERST_SERIALIZATION_INSTRUCTION_ENTRY; 2194 2195 /// 2196 /// EINJ - Error Injection Table 2197 /// 2198 typedef struct { 2199 EFI_ACPI_DESCRIPTION_HEADER Header; 2200 UINT32 InjectionHeaderSize; 2201 UINT8 InjectionFlags; 2202 UINT8 Reserved0[3]; 2203 UINT32 InjectionEntryCount; 2204 } EFI_ACPI_6_3_ERROR_INJECTION_TABLE_HEADER; 2205 2206 /// 2207 /// EINJ Version (as defined in ACPI 6.3 spec.) 2208 /// 2209 #define EFI_ACPI_6_3_ERROR_INJECTION_TABLE_REVISION 0x01 2210 2211 /// 2212 /// EINJ Error Injection Actions 2213 /// 2214 #define EFI_ACPI_6_3_EINJ_BEGIN_INJECTION_OPERATION 0x00 2215 #define EFI_ACPI_6_3_EINJ_GET_TRIGGER_ERROR_ACTION_TABLE 0x01 2216 #define EFI_ACPI_6_3_EINJ_SET_ERROR_TYPE 0x02 2217 #define EFI_ACPI_6_3_EINJ_GET_ERROR_TYPE 0x03 2218 #define EFI_ACPI_6_3_EINJ_END_OPERATION 0x04 2219 #define EFI_ACPI_6_3_EINJ_EXECUTE_OPERATION 0x05 2220 #define EFI_ACPI_6_3_EINJ_CHECK_BUSY_STATUS 0x06 2221 #define EFI_ACPI_6_3_EINJ_GET_COMMAND_STATUS 0x07 2222 #define EFI_ACPI_6_3_EINJ_TRIGGER_ERROR 0xFF 2223 2224 /// 2225 /// EINJ Action Command Status 2226 /// 2227 #define EFI_ACPI_6_3_EINJ_STATUS_SUCCESS 0x00 2228 #define EFI_ACPI_6_3_EINJ_STATUS_UNKNOWN_FAILURE 0x01 2229 #define EFI_ACPI_6_3_EINJ_STATUS_INVALID_ACCESS 0x02 2230 2231 /// 2232 /// EINJ Error Type Definition 2233 /// 2234 #define EFI_ACPI_6_3_EINJ_ERROR_PROCESSOR_CORRECTABLE (1 << 0) 2235 #define EFI_ACPI_6_3_EINJ_ERROR_PROCESSOR_UNCORRECTABLE_NONFATAL (1 << 1) 2236 #define EFI_ACPI_6_3_EINJ_ERROR_PROCESSOR_UNCORRECTABLE_FATAL (1 << 2) 2237 #define EFI_ACPI_6_3_EINJ_ERROR_MEMORY_CORRECTABLE (1 << 3) 2238 #define EFI_ACPI_6_3_EINJ_ERROR_MEMORY_UNCORRECTABLE_NONFATAL (1 << 4) 2239 #define EFI_ACPI_6_3_EINJ_ERROR_MEMORY_UNCORRECTABLE_FATAL (1 << 5) 2240 #define EFI_ACPI_6_3_EINJ_ERROR_PCI_EXPRESS_CORRECTABLE (1 << 6) 2241 #define EFI_ACPI_6_3_EINJ_ERROR_PCI_EXPRESS_UNCORRECTABLE_NONFATAL (1 << 7) 2242 #define EFI_ACPI_6_3_EINJ_ERROR_PCI_EXPRESS_UNCORRECTABLE_FATAL (1 << 8) 2243 #define EFI_ACPI_6_3_EINJ_ERROR_PLATFORM_CORRECTABLE (1 << 9) 2244 #define EFI_ACPI_6_3_EINJ_ERROR_PLATFORM_UNCORRECTABLE_NONFATAL (1 << 10) 2245 #define EFI_ACPI_6_3_EINJ_ERROR_PLATFORM_UNCORRECTABLE_FATAL (1 << 11) 2246 2247 /// 2248 /// EINJ Injection Instructions 2249 /// 2250 #define EFI_ACPI_6_3_EINJ_READ_REGISTER 0x00 2251 #define EFI_ACPI_6_3_EINJ_READ_REGISTER_VALUE 0x01 2252 #define EFI_ACPI_6_3_EINJ_WRITE_REGISTER 0x02 2253 #define EFI_ACPI_6_3_EINJ_WRITE_REGISTER_VALUE 0x03 2254 #define EFI_ACPI_6_3_EINJ_NOOP 0x04 2255 2256 /// 2257 /// EINJ Instruction Flags 2258 /// 2259 #define EFI_ACPI_6_3_EINJ_PRESERVE_REGISTER 0x01 2260 2261 /// 2262 /// EINJ Injection Instruction Entry 2263 /// 2264 typedef struct { 2265 UINT8 InjectionAction; 2266 UINT8 Instruction; 2267 UINT8 Flags; 2268 UINT8 Reserved0; 2269 EFI_ACPI_6_3_GENERIC_ADDRESS_STRUCTURE RegisterRegion; 2270 UINT64 Value; 2271 UINT64 Mask; 2272 } EFI_ACPI_6_3_EINJ_INJECTION_INSTRUCTION_ENTRY; 2273 2274 /// 2275 /// EINJ Trigger Action Table 2276 /// 2277 typedef struct { 2278 UINT32 HeaderSize; 2279 UINT32 Revision; 2280 UINT32 TableSize; 2281 UINT32 EntryCount; 2282 } EFI_ACPI_6_3_EINJ_TRIGGER_ACTION_TABLE; 2283 2284 /// 2285 /// Platform Communications Channel Table (PCCT) 2286 /// 2287 typedef struct { 2288 EFI_ACPI_DESCRIPTION_HEADER Header; 2289 UINT32 Flags; 2290 UINT64 Reserved; 2291 } EFI_ACPI_6_3_PLATFORM_COMMUNICATION_CHANNEL_TABLE_HEADER; 2292 2293 /// 2294 /// PCCT Version (as defined in ACPI 6.3 spec.) 2295 /// 2296 #define EFI_ACPI_6_3_PLATFORM_COMMUNICATION_CHANNEL_TABLE_REVISION 0x02 2297 2298 /// 2299 /// PCCT Global Flags 2300 /// 2301 #define EFI_ACPI_6_3_PCCT_FLAGS_PLATFORM_INTERRUPT BIT0 2302 2303 // 2304 // PCCT Subspace type 2305 // 2306 #define EFI_ACPI_6_3_PCCT_SUBSPACE_TYPE_GENERIC 0x00 2307 #define EFI_ACPI_6_3_PCCT_SUBSPACE_TYPE_1_HW_REDUCED_COMMUNICATIONS 0x01 2308 #define EFI_ACPI_6_3_PCCT_SUBSPACE_TYPE_2_HW_REDUCED_COMMUNICATIONS 0x02 2309 #define EFI_ACPI_6_3_PCCT_SUBSPACE_TYPE_3_EXTENDED_PCC 0x03 2310 #define EFI_ACPI_6_3_PCCT_SUBSPACE_TYPE_4_EXTENDED_PCC 0x04 2311 2312 /// 2313 /// PCC Subspace Structure Header 2314 /// 2315 typedef struct { 2316 UINT8 Type; 2317 UINT8 Length; 2318 } EFI_ACPI_6_3_PCCT_SUBSPACE_HEADER; 2319 2320 /// 2321 /// Generic Communications Subspace Structure 2322 /// 2323 typedef struct { 2324 UINT8 Type; 2325 UINT8 Length; 2326 UINT8 Reserved[6]; 2327 UINT64 BaseAddress; 2328 UINT64 AddressLength; 2329 EFI_ACPI_6_3_GENERIC_ADDRESS_STRUCTURE DoorbellRegister; 2330 UINT64 DoorbellPreserve; 2331 UINT64 DoorbellWrite; 2332 UINT32 NominalLatency; 2333 UINT32 MaximumPeriodicAccessRate; 2334 UINT16 MinimumRequestTurnaroundTime; 2335 } EFI_ACPI_6_3_PCCT_SUBSPACE_GENERIC; 2336 2337 /// 2338 /// Generic Communications Channel Shared Memory Region 2339 /// 2340 2341 typedef struct { 2342 UINT8 Command; 2343 UINT8 Reserved:7; 2344 UINT8 NotifyOnCompletion:1; 2345 } EFI_ACPI_6_3_PCCT_GENERIC_SHARED_MEMORY_REGION_COMMAND; 2346 2347 typedef struct { 2348 UINT8 CommandComplete:1; 2349 UINT8 PlatformInterrupt:1; 2350 UINT8 Error:1; 2351 UINT8 PlatformNotification:1; 2352 UINT8 Reserved:4; 2353 UINT8 Reserved1; 2354 } EFI_ACPI_6_3_PCCT_GENERIC_SHARED_MEMORY_REGION_STATUS; 2355 2356 typedef struct { 2357 UINT32 Signature; 2358 EFI_ACPI_6_3_PCCT_GENERIC_SHARED_MEMORY_REGION_COMMAND Command; 2359 EFI_ACPI_6_3_PCCT_GENERIC_SHARED_MEMORY_REGION_STATUS Status; 2360 } EFI_ACPI_6_3_PCCT_GENERIC_SHARED_MEMORY_REGION_HEADER; 2361 2362 #define EFI_ACPI_6_3_PCCT_SUBSPACE_PLATFORM_INTERRUPT_FLAGS_POLARITY BIT0 2363 #define EFI_ACPI_6_3_PCCT_SUBSPACE_PLATFORM_INTERRUPT_FLAGS_MODE BIT1 2364 2365 /// 2366 /// Type 1 HW-Reduced Communications Subspace Structure 2367 /// 2368 typedef struct { 2369 UINT8 Type; 2370 UINT8 Length; 2371 UINT32 PlatformInterrupt; 2372 UINT8 PlatformInterruptFlags; 2373 UINT8 Reserved; 2374 UINT64 BaseAddress; 2375 UINT64 AddressLength; 2376 EFI_ACPI_6_3_GENERIC_ADDRESS_STRUCTURE DoorbellRegister; 2377 UINT64 DoorbellPreserve; 2378 UINT64 DoorbellWrite; 2379 UINT32 NominalLatency; 2380 UINT32 MaximumPeriodicAccessRate; 2381 UINT16 MinimumRequestTurnaroundTime; 2382 } EFI_ACPI_6_3_PCCT_SUBSPACE_1_HW_REDUCED_COMMUNICATIONS; 2383 2384 /// 2385 /// Type 2 HW-Reduced Communications Subspace Structure 2386 /// 2387 typedef struct { 2388 UINT8 Type; 2389 UINT8 Length; 2390 UINT32 PlatformInterrupt; 2391 UINT8 PlatformInterruptFlags; 2392 UINT8 Reserved; 2393 UINT64 BaseAddress; 2394 UINT64 AddressLength; 2395 EFI_ACPI_6_3_GENERIC_ADDRESS_STRUCTURE DoorbellRegister; 2396 UINT64 DoorbellPreserve; 2397 UINT64 DoorbellWrite; 2398 UINT32 NominalLatency; 2399 UINT32 MaximumPeriodicAccessRate; 2400 UINT16 MinimumRequestTurnaroundTime; 2401 EFI_ACPI_6_3_GENERIC_ADDRESS_STRUCTURE PlatformInterruptAckRegister; 2402 UINT64 PlatformInterruptAckPreserve; 2403 UINT64 PlatformInterruptAckWrite; 2404 } EFI_ACPI_6_3_PCCT_SUBSPACE_2_HW_REDUCED_COMMUNICATIONS; 2405 2406 /// 2407 /// Type 3 Extended PCC Subspace Structure 2408 /// 2409 typedef struct { 2410 UINT8 Type; 2411 UINT8 Length; 2412 UINT32 PlatformInterrupt; 2413 UINT8 PlatformInterruptFlags; 2414 UINT8 Reserved; 2415 UINT64 BaseAddress; 2416 UINT32 AddressLength; 2417 EFI_ACPI_6_3_GENERIC_ADDRESS_STRUCTURE DoorbellRegister; 2418 UINT64 DoorbellPreserve; 2419 UINT64 DoorbellWrite; 2420 UINT32 NominalLatency; 2421 UINT32 MaximumPeriodicAccessRate; 2422 UINT32 MinimumRequestTurnaroundTime; 2423 EFI_ACPI_6_3_GENERIC_ADDRESS_STRUCTURE PlatformInterruptAckRegister; 2424 UINT64 PlatformInterruptAckPreserve; 2425 UINT64 PlatformInterruptAckSet; 2426 UINT8 Reserved1[8]; 2427 EFI_ACPI_6_3_GENERIC_ADDRESS_STRUCTURE CommandCompleteCheckRegister; 2428 UINT64 CommandCompleteCheckMask; 2429 EFI_ACPI_6_3_GENERIC_ADDRESS_STRUCTURE CommandCompleteUpdateRegister; 2430 UINT64 CommandCompleteUpdatePreserve; 2431 UINT64 CommandCompleteUpdateSet; 2432 EFI_ACPI_6_3_GENERIC_ADDRESS_STRUCTURE ErrorStatusRegister; 2433 UINT64 ErrorStatusMask; 2434 } EFI_ACPI_6_3_PCCT_SUBSPACE_3_EXTENDED_PCC; 2435 2436 /// 2437 /// Type 4 Extended PCC Subspace Structure 2438 /// 2439 typedef EFI_ACPI_6_3_PCCT_SUBSPACE_3_EXTENDED_PCC EFI_ACPI_6_3_PCCT_SUBSPACE_4_EXTENDED_PCC; 2440 2441 #define EFI_ACPI_6_3_PCCT_MASTER_SLAVE_COMMUNICATIONS_CHANNEL_FLAGS_NOTIFY_ON_COMPLETION BIT0 2442 2443 typedef struct { 2444 UINT32 Signature; 2445 UINT32 Flags; 2446 UINT32 Length; 2447 UINT32 Command; 2448 } EFI_ACPI_6_3_PCCT_EXTENDED_PCC_SHARED_MEMORY_REGION_HEADER; 2449 2450 /// 2451 /// Platform Debug Trigger Table (PDTT) 2452 /// 2453 typedef struct { 2454 EFI_ACPI_DESCRIPTION_HEADER Header; 2455 UINT8 TriggerCount; 2456 UINT8 Reserved[3]; 2457 UINT32 TriggerIdentifierArrayOffset; 2458 } EFI_ACPI_6_3_PLATFORM_DEBUG_TRIGGER_TABLE_HEADER; 2459 2460 /// 2461 /// PDTT Revision (as defined in ACPI 6.3 spec.) 2462 /// 2463 #define EFI_ACPI_6_3_PLATFORM_DEBUG_TRIGGER_TABLE_REVISION 0x00 2464 2465 /// 2466 /// PDTT Platform Communication Channel Identifier Structure 2467 /// 2468 typedef struct { 2469 UINT16 SubChannelIdentifer:8; 2470 UINT16 Runtime:1; 2471 UINT16 WaitForCompletion:1; 2472 UINT16 TriggerOrder:1; 2473 UINT16 Reserved:5; 2474 } EFI_ACPI_6_3_PDTT_PCC_IDENTIFIER; 2475 2476 /// 2477 /// PCC Commands Codes used by Platform Debug Trigger Table 2478 /// 2479 #define EFI_ACPI_6_3_PDTT_PCC_COMMAND_DOORBELL_ONLY 0x00 2480 #define EFI_ACPI_6_3_PDTT_PCC_COMMAND_VENDOR_SPECIFIC 0x01 2481 2482 /// 2483 /// PPTT Platform Communication Channel 2484 /// 2485 typedef EFI_ACPI_6_3_PCCT_GENERIC_SHARED_MEMORY_REGION_HEADER EFI_ACPI_6_3_PDTT_PCC; 2486 2487 /// 2488 /// Processor Properties Topology Table (PPTT) 2489 /// 2490 typedef struct { 2491 EFI_ACPI_DESCRIPTION_HEADER Header; 2492 } EFI_ACPI_6_3_PROCESSOR_PROPERTIES_TOPOLOGY_TABLE_HEADER; 2493 2494 /// 2495 /// PPTT Revision (as defined in ACPI 6.3 spec.) 2496 /// 2497 #define EFI_ACPI_6_3_PROCESSOR_PROPERTIES_TOPOLOGY_TABLE_REVISION 0x02 2498 2499 /// 2500 /// PPTT types 2501 /// 2502 #define EFI_ACPI_6_3_PPTT_TYPE_PROCESSOR 0x00 2503 #define EFI_ACPI_6_3_PPTT_TYPE_CACHE 0x01 2504 #define EFI_ACPI_6_3_PPTT_TYPE_ID 0x02 2505 2506 /// 2507 /// PPTT Structure Header 2508 /// 2509 typedef struct { 2510 UINT8 Type; 2511 UINT8 Length; 2512 UINT8 Reserved[2]; 2513 } EFI_ACPI_6_3_PPTT_STRUCTURE_HEADER; 2514 2515 /// 2516 /// For PPTT struct processor flags 2517 /// 2518 #define EFI_ACPI_6_3_PPTT_PACKAGE_NOT_PHYSICAL 0x0 2519 #define EFI_ACPI_6_3_PPTT_PACKAGE_PHYSICAL 0x1 2520 #define EFI_ACPI_6_3_PPTT_PROCESSOR_ID_INVALID 0x0 2521 #define EFI_ACPI_6_3_PPTT_PROCESSOR_ID_VALID 0x1 2522 #define EFI_ACPI_6_3_PPTT_PROCESSOR_IS_NOT_THREAD 0x0 2523 #define EFI_ACPI_6_3_PPTT_PROCESSOR_IS_THREAD 0x1 2524 #define EFI_ACPI_6_3_PPTT_NODE_IS_NOT_LEAF 0x0 2525 #define EFI_ACPI_6_3_PPTT_NODE_IS_LEAF 0x1 2526 #define EFI_ACPI_6_3_PPTT_IMPLEMENTATION_NOT_IDENTICAL 0x0 2527 #define EFI_ACPI_6_3_PPTT_IMPLEMENTATION_IDENTICAL 0x1 2528 2529 /// 2530 /// Processor hierarchy node structure flags 2531 /// 2532 typedef struct { 2533 UINT32 PhysicalPackage:1; 2534 UINT32 AcpiProcessorIdValid:1; 2535 UINT32 ProcessorIsAThread:1; 2536 UINT32 NodeIsALeaf:1; 2537 UINT32 IdenticalImplementation:1; 2538 UINT32 Reserved:27; 2539 } EFI_ACPI_6_3_PPTT_STRUCTURE_PROCESSOR_FLAGS; 2540 2541 /// 2542 /// Processor hierarchy node structure 2543 /// 2544 typedef struct { 2545 UINT8 Type; 2546 UINT8 Length; 2547 UINT8 Reserved[2]; 2548 EFI_ACPI_6_3_PPTT_STRUCTURE_PROCESSOR_FLAGS Flags; 2549 UINT32 Parent; 2550 UINT32 AcpiProcessorId; 2551 UINT32 NumberOfPrivateResources; 2552 } EFI_ACPI_6_3_PPTT_STRUCTURE_PROCESSOR; 2553 2554 /// 2555 /// For PPTT struct cache flags 2556 /// 2557 #define EFI_ACPI_6_3_PPTT_CACHE_SIZE_INVALID 0x0 2558 #define EFI_ACPI_6_3_PPTT_CACHE_SIZE_VALID 0x1 2559 #define EFI_ACPI_6_3_PPTT_NUMBER_OF_SETS_INVALID 0x0 2560 #define EFI_ACPI_6_3_PPTT_NUMBER_OF_SETS_VALID 0x1 2561 #define EFI_ACPI_6_3_PPTT_ASSOCIATIVITY_INVALID 0x0 2562 #define EFI_ACPI_6_3_PPTT_ASSOCIATIVITY_VALID 0x1 2563 #define EFI_ACPI_6_3_PPTT_ALLOCATION_TYPE_INVALID 0x0 2564 #define EFI_ACPI_6_3_PPTT_ALLOCATION_TYPE_VALID 0x1 2565 #define EFI_ACPI_6_3_PPTT_CACHE_TYPE_INVALID 0x0 2566 #define EFI_ACPI_6_3_PPTT_CACHE_TYPE_VALID 0x1 2567 #define EFI_ACPI_6_3_PPTT_WRITE_POLICY_INVALID 0x0 2568 #define EFI_ACPI_6_3_PPTT_WRITE_POLICY_VALID 0x1 2569 #define EFI_ACPI_6_3_PPTT_LINE_SIZE_INVALID 0x0 2570 #define EFI_ACPI_6_3_PPTT_LINE_SIZE_VALID 0x1 2571 2572 /// 2573 /// Cache Type Structure flags 2574 /// 2575 typedef struct { 2576 UINT32 SizePropertyValid:1; 2577 UINT32 NumberOfSetsValid:1; 2578 UINT32 AssociativityValid:1; 2579 UINT32 AllocationTypeValid:1; 2580 UINT32 CacheTypeValid:1; 2581 UINT32 WritePolicyValid:1; 2582 UINT32 LineSizeValid:1; 2583 UINT32 Reserved:25; 2584 } EFI_ACPI_6_3_PPTT_STRUCTURE_CACHE_FLAGS; 2585 2586 /// 2587 /// For cache attributes 2588 /// 2589 #define EFI_ACPI_6_3_CACHE_ATTRIBUTES_ALLOCATION_READ 0x0 2590 #define EFI_ACPI_6_3_CACHE_ATTRIBUTES_ALLOCATION_WRITE 0x1 2591 #define EFI_ACPI_6_3_CACHE_ATTRIBUTES_ALLOCATION_READ_WRITE 0x2 2592 #define EFI_ACPI_6_3_CACHE_ATTRIBUTES_CACHE_TYPE_DATA 0x0 2593 #define EFI_ACPI_6_3_CACHE_ATTRIBUTES_CACHE_TYPE_INSTRUCTION 0x1 2594 #define EFI_ACPI_6_3_CACHE_ATTRIBUTES_CACHE_TYPE_UNIFIED 0x2 2595 #define EFI_ACPI_6_3_CACHE_ATTRIBUTES_WRITE_POLICY_WRITE_BACK 0x0 2596 #define EFI_ACPI_6_3_CACHE_ATTRIBUTES_WRITE_POLICY_WRITE_THROUGH 0x1 2597 2598 /// 2599 /// Cache Type Structure cache attributes 2600 /// 2601 typedef struct { 2602 UINT8 AllocationType:2; 2603 UINT8 CacheType:2; 2604 UINT8 WritePolicy:1; 2605 UINT8 Reserved:3; 2606 } EFI_ACPI_6_3_PPTT_STRUCTURE_CACHE_ATTRIBUTES; 2607 2608 /// 2609 /// Cache Type Structure 2610 /// 2611 typedef struct { 2612 UINT8 Type; 2613 UINT8 Length; 2614 UINT8 Reserved[2]; 2615 EFI_ACPI_6_3_PPTT_STRUCTURE_CACHE_FLAGS Flags; 2616 UINT32 NextLevelOfCache; 2617 UINT32 Size; 2618 UINT32 NumberOfSets; 2619 UINT8 Associativity; 2620 EFI_ACPI_6_3_PPTT_STRUCTURE_CACHE_ATTRIBUTES Attributes; 2621 UINT16 LineSize; 2622 } EFI_ACPI_6_3_PPTT_STRUCTURE_CACHE; 2623 2624 /// 2625 /// ID structure 2626 /// 2627 typedef struct { 2628 UINT8 Type; 2629 UINT8 Length; 2630 UINT8 Reserved[2]; 2631 UINT32 VendorId; 2632 UINT64 Level1Id; 2633 UINT64 Level2Id; 2634 UINT16 MajorRev; 2635 UINT16 MinorRev; 2636 UINT16 SpinRev; 2637 } EFI_ACPI_6_3_PPTT_STRUCTURE_ID; 2638 2639 // 2640 // Known table signatures 2641 // 2642 2643 /// 2644 /// "RSD PTR " Root System Description Pointer 2645 /// 2646 #define EFI_ACPI_6_3_ROOT_SYSTEM_DESCRIPTION_POINTER_SIGNATURE SIGNATURE_64('R', 'S', 'D', ' ', 'P', 'T', 'R', ' ') 2647 2648 /// 2649 /// "APIC" Multiple APIC Description Table 2650 /// 2651 #define EFI_ACPI_6_3_MULTIPLE_APIC_DESCRIPTION_TABLE_SIGNATURE SIGNATURE_32('A', 'P', 'I', 'C') 2652 2653 /// 2654 /// "BERT" Boot Error Record Table 2655 /// 2656 #define EFI_ACPI_6_3_BOOT_ERROR_RECORD_TABLE_SIGNATURE SIGNATURE_32('B', 'E', 'R', 'T') 2657 2658 /// 2659 /// "BGRT" Boot Graphics Resource Table 2660 /// 2661 #define EFI_ACPI_6_3_BOOT_GRAPHICS_RESOURCE_TABLE_SIGNATURE SIGNATURE_32('B', 'G', 'R', 'T') 2662 2663 /// 2664 /// "CDIT" Component Distance Information Table 2665 /// 2666 #define EFI_ACPI_6_3_COMPONENT_DISTANCE_INFORMATION_TABLE_SIGNATURE SIGNATURE_32('C', 'D', 'I', 'T') 2667 2668 /// 2669 /// "CPEP" Corrected Platform Error Polling Table 2670 /// 2671 #define EFI_ACPI_6_3_CORRECTED_PLATFORM_ERROR_POLLING_TABLE_SIGNATURE SIGNATURE_32('C', 'P', 'E', 'P') 2672 2673 /// 2674 /// "CRAT" Component Resource Attribute Table 2675 /// 2676 #define EFI_ACPI_6_3_COMPONENT_RESOURCE_ATTRIBUTE_TABLE_SIGNATURE SIGNATURE_32('C', 'R', 'A', 'T') 2677 2678 /// 2679 /// "DSDT" Differentiated System Description Table 2680 /// 2681 #define EFI_ACPI_6_3_DIFFERENTIATED_SYSTEM_DESCRIPTION_TABLE_SIGNATURE SIGNATURE_32('D', 'S', 'D', 'T') 2682 2683 /// 2684 /// "ECDT" Embedded Controller Boot Resources Table 2685 /// 2686 #define EFI_ACPI_6_3_EMBEDDED_CONTROLLER_BOOT_RESOURCES_TABLE_SIGNATURE SIGNATURE_32('E', 'C', 'D', 'T') 2687 2688 /// 2689 /// "EINJ" Error Injection Table 2690 /// 2691 #define EFI_ACPI_6_3_ERROR_INJECTION_TABLE_SIGNATURE SIGNATURE_32('E', 'I', 'N', 'J') 2692 2693 /// 2694 /// "ERST" Error Record Serialization Table 2695 /// 2696 #define EFI_ACPI_6_3_ERROR_RECORD_SERIALIZATION_TABLE_SIGNATURE SIGNATURE_32('E', 'R', 'S', 'T') 2697 2698 /// 2699 /// "FACP" Fixed ACPI Description Table 2700 /// 2701 #define EFI_ACPI_6_3_FIXED_ACPI_DESCRIPTION_TABLE_SIGNATURE SIGNATURE_32('F', 'A', 'C', 'P') 2702 2703 /// 2704 /// "FACS" Firmware ACPI Control Structure 2705 /// 2706 #define EFI_ACPI_6_3_FIRMWARE_ACPI_CONTROL_STRUCTURE_SIGNATURE SIGNATURE_32('F', 'A', 'C', 'S') 2707 2708 /// 2709 /// "FPDT" Firmware Performance Data Table 2710 /// 2711 #define EFI_ACPI_6_3_FIRMWARE_PERFORMANCE_DATA_TABLE_SIGNATURE SIGNATURE_32('F', 'P', 'D', 'T') 2712 2713 /// 2714 /// "GTDT" Generic Timer Description Table 2715 /// 2716 #define EFI_ACPI_6_3_GENERIC_TIMER_DESCRIPTION_TABLE_SIGNATURE SIGNATURE_32('G', 'T', 'D', 'T') 2717 2718 /// 2719 /// "HEST" Hardware Error Source Table 2720 /// 2721 #define EFI_ACPI_6_3_HARDWARE_ERROR_SOURCE_TABLE_SIGNATURE SIGNATURE_32('H', 'E', 'S', 'T') 2722 2723 /// 2724 /// "HMAT" Heterogeneous Memory Attribute Table 2725 /// 2726 #define EFI_ACPI_6_3_HETEROGENEOUS_MEMORY_ATTRIBUTE_TABLE_SIGNATURE SIGNATURE_32('H', 'M', 'A', 'T') 2727 2728 /// 2729 /// "MPST" Memory Power State Table 2730 /// 2731 #define EFI_ACPI_6_3_MEMORY_POWER_STATE_TABLE_SIGNATURE SIGNATURE_32('M', 'P', 'S', 'T') 2732 2733 /// 2734 /// "MSCT" Maximum System Characteristics Table 2735 /// 2736 #define EFI_ACPI_6_3_MAXIMUM_SYSTEM_CHARACTERISTICS_TABLE_SIGNATURE SIGNATURE_32('M', 'S', 'C', 'T') 2737 2738 /// 2739 /// "NFIT" NVDIMM Firmware Interface Table 2740 /// 2741 #define EFI_ACPI_6_3_NVDIMM_FIRMWARE_INTERFACE_TABLE_STRUCTURE_SIGNATURE SIGNATURE_32('N', 'F', 'I', 'T') 2742 2743 /// 2744 /// "PDTT" Platform Debug Trigger Table 2745 /// 2746 #define EFI_ACPI_6_3_PLATFORM_DEBUG_TRIGGER_TABLE_STRUCTURE_SIGNATURE SIGNATURE_32('P', 'D', 'T', 'T') 2747 2748 /// 2749 /// "PMTT" Platform Memory Topology Table 2750 /// 2751 #define EFI_ACPI_6_3_PLATFORM_MEMORY_TOPOLOGY_TABLE_SIGNATURE SIGNATURE_32('P', 'M', 'T', 'T') 2752 2753 /// 2754 /// "PPTT" Processor Properties Topology Table 2755 /// 2756 #define EFI_ACPI_6_3_PROCESSOR_PROPERTIES_TOPOLOGY_TABLE_STRUCTURE_SIGNATURE SIGNATURE_32('P', 'P', 'T', 'T') 2757 2758 /// 2759 /// "PSDT" Persistent System Description Table 2760 /// 2761 #define EFI_ACPI_6_3_PERSISTENT_SYSTEM_DESCRIPTION_TABLE_SIGNATURE SIGNATURE_32('P', 'S', 'D', 'T') 2762 2763 /// 2764 /// "RASF" ACPI RAS Feature Table 2765 /// 2766 #define EFI_ACPI_6_3_ACPI_RAS_FEATURE_TABLE_SIGNATURE SIGNATURE_32('R', 'A', 'S', 'F') 2767 2768 /// 2769 /// "RSDT" Root System Description Table 2770 /// 2771 #define EFI_ACPI_6_3_ROOT_SYSTEM_DESCRIPTION_TABLE_SIGNATURE SIGNATURE_32('R', 'S', 'D', 'T') 2772 2773 /// 2774 /// "SBST" Smart Battery Specification Table 2775 /// 2776 #define EFI_ACPI_6_3_SMART_BATTERY_SPECIFICATION_TABLE_SIGNATURE SIGNATURE_32('S', 'B', 'S', 'T') 2777 2778 /// 2779 /// "SDEV" Secure DEVices Table 2780 /// 2781 #define EFI_ACPI_6_3_SECURE_DEVICES_TABLE_SIGNATURE SIGNATURE_32('S', 'D', 'E', 'V') 2782 2783 /// 2784 /// "SLIT" System Locality Information Table 2785 /// 2786 #define EFI_ACPI_6_3_SYSTEM_LOCALITY_INFORMATION_TABLE_SIGNATURE SIGNATURE_32('S', 'L', 'I', 'T') 2787 2788 /// 2789 /// "SRAT" System Resource Affinity Table 2790 /// 2791 #define EFI_ACPI_6_3_SYSTEM_RESOURCE_AFFINITY_TABLE_SIGNATURE SIGNATURE_32('S', 'R', 'A', 'T') 2792 2793 /// 2794 /// "SSDT" Secondary System Description Table 2795 /// 2796 #define EFI_ACPI_6_3_SECONDARY_SYSTEM_DESCRIPTION_TABLE_SIGNATURE SIGNATURE_32('S', 'S', 'D', 'T') 2797 2798 /// 2799 /// "XSDT" Extended System Description Table 2800 /// 2801 #define EFI_ACPI_6_3_EXTENDED_SYSTEM_DESCRIPTION_TABLE_SIGNATURE SIGNATURE_32('X', 'S', 'D', 'T') 2802 2803 /// 2804 /// "BOOT" MS Simple Boot Spec 2805 /// 2806 #define EFI_ACPI_6_3_SIMPLE_BOOT_FLAG_TABLE_SIGNATURE SIGNATURE_32('B', 'O', 'O', 'T') 2807 2808 /// 2809 /// "CSRT" MS Core System Resource Table 2810 /// 2811 #define EFI_ACPI_6_3_CORE_SYSTEM_RESOURCE_TABLE_SIGNATURE SIGNATURE_32('C', 'S', 'R', 'T') 2812 2813 /// 2814 /// "DBG2" MS Debug Port 2 Spec 2815 /// 2816 #define EFI_ACPI_6_3_DEBUG_PORT_2_TABLE_SIGNATURE SIGNATURE_32('D', 'B', 'G', '2') 2817 2818 /// 2819 /// "DBGP" MS Debug Port Spec 2820 /// 2821 #define EFI_ACPI_6_3_DEBUG_PORT_TABLE_SIGNATURE SIGNATURE_32('D', 'B', 'G', 'P') 2822 2823 /// 2824 /// "DMAR" DMA Remapping Table 2825 /// 2826 #define EFI_ACPI_6_3_DMA_REMAPPING_TABLE_SIGNATURE SIGNATURE_32('D', 'M', 'A', 'R') 2827 2828 /// 2829 /// "DPPT" DMA Protection Policy Table 2830 /// 2831 #define EFI_ACPI_6_3_DMA_PROTECTION_POLICY_TABLE_SIGNATURE SIGNATURE_32('D', 'P', 'P', 'T') 2832 2833 /// 2834 /// "DRTM" Dynamic Root of Trust for Measurement Table 2835 /// 2836 #define EFI_ACPI_6_3_DYNAMIC_ROOT_OF_TRUST_FOR_MEASUREMENT_TABLE_SIGNATURE SIGNATURE_32('D', 'R', 'T', 'M') 2837 2838 /// 2839 /// "ETDT" Event Timer Description Table 2840 /// 2841 #define EFI_ACPI_6_3_EVENT_TIMER_DESCRIPTION_TABLE_SIGNATURE SIGNATURE_32('E', 'T', 'D', 'T') 2842 2843 /// 2844 /// "HPET" IA-PC High Precision Event Timer Table 2845 /// 2846 #define EFI_ACPI_6_3_HIGH_PRECISION_EVENT_TIMER_TABLE_SIGNATURE SIGNATURE_32('H', 'P', 'E', 'T') 2847 2848 /// 2849 /// "iBFT" iSCSI Boot Firmware Table 2850 /// 2851 #define EFI_ACPI_6_3_ISCSI_BOOT_FIRMWARE_TABLE_SIGNATURE SIGNATURE_32('i', 'B', 'F', 'T') 2852 2853 /// 2854 /// "IORT" I/O Remapping Table 2855 /// 2856 #define EFI_ACPI_6_3_IO_REMAPPING_TABLE_SIGNATURE SIGNATURE_32('I', 'O', 'R', 'T') 2857 2858 /// 2859 /// "IVRS" I/O Virtualization Reporting Structure 2860 /// 2861 #define EFI_ACPI_6_3_IO_VIRTUALIZATION_REPORTING_STRUCTURE_SIGNATURE SIGNATURE_32('I', 'V', 'R', 'S') 2862 2863 /// 2864 /// "LPIT" Low Power Idle Table 2865 /// 2866 #define EFI_ACPI_6_3_LOW_POWER_IDLE_TABLE_STRUCTURE_SIGNATURE SIGNATURE_32('L', 'P', 'I', 'T') 2867 2868 /// 2869 /// "MCFG" PCI Express Memory Mapped Configuration Space Base Address Description Table 2870 /// 2871 #define EFI_ACPI_6_3_PCI_EXPRESS_MEMORY_MAPPED_CONFIGURATION_SPACE_BASE_ADDRESS_DESCRIPTION_TABLE_SIGNATURE SIGNATURE_32('M', 'C', 'F', 'G') 2872 2873 /// 2874 /// "MCHI" Management Controller Host Interface Table 2875 /// 2876 #define EFI_ACPI_6_3_MANAGEMENT_CONTROLLER_HOST_INTERFACE_TABLE_SIGNATURE SIGNATURE_32('M', 'C', 'H', 'I') 2877 2878 /// 2879 /// "MSDM" MS Data Management Table 2880 /// 2881 #define EFI_ACPI_6_3_DATA_MANAGEMENT_TABLE_SIGNATURE SIGNATURE_32('M', 'S', 'D', 'M') 2882 2883 /// 2884 /// "SDEI" Software Delegated Exceptions Interface Table 2885 /// 2886 #define EFI_ACPI_6_3_SOFTWARE_DELEGATED_EXCEPTIONS_INTERFACE_TABLE_SIGNATURE SIGNATURE_32('S', 'D', 'E', 'I') 2887 2888 /// 2889 /// "SLIC" MS Software Licensing Table Specification 2890 /// 2891 #define EFI_ACPI_6_3_SOFTWARE_LICENSING_TABLE_SIGNATURE SIGNATURE_32('S', 'L', 'I', 'C') 2892 2893 /// 2894 /// "SPCR" Serial Port Concole Redirection Table 2895 /// 2896 #define EFI_ACPI_6_3_SERIAL_PORT_CONSOLE_REDIRECTION_TABLE_SIGNATURE SIGNATURE_32('S', 'P', 'C', 'R') 2897 2898 /// 2899 /// "SPMI" Server Platform Management Interface Table 2900 /// 2901 #define EFI_ACPI_6_3_SERVER_PLATFORM_MANAGEMENT_INTERFACE_TABLE_SIGNATURE SIGNATURE_32('S', 'P', 'M', 'I') 2902 2903 /// 2904 /// "STAO" _STA Override Table 2905 /// 2906 #define EFI_ACPI_6_3_STA_OVERRIDE_TABLE_SIGNATURE SIGNATURE_32('S', 'T', 'A', 'O') 2907 2908 /// 2909 /// "TCPA" Trusted Computing Platform Alliance Capabilities Table 2910 /// 2911 #define EFI_ACPI_6_3_TRUSTED_COMPUTING_PLATFORM_ALLIANCE_CAPABILITIES_TABLE_SIGNATURE SIGNATURE_32('T', 'C', 'P', 'A') 2912 2913 /// 2914 /// "TPM2" Trusted Computing Platform 1 Table 2915 /// 2916 #define EFI_ACPI_6_3_TRUSTED_COMPUTING_PLATFORM_2_TABLE_SIGNATURE SIGNATURE_32('T', 'P', 'M', '2') 2917 2918 /// 2919 /// "UEFI" UEFI ACPI Data Table 2920 /// 2921 #define EFI_ACPI_6_3_UEFI_ACPI_DATA_TABLE_SIGNATURE SIGNATURE_32('U', 'E', 'F', 'I') 2922 2923 /// 2924 /// "WAET" Windows ACPI Emulated Devices Table 2925 /// 2926 #define EFI_ACPI_6_3_WINDOWS_ACPI_EMULATED_DEVICES_TABLE_SIGNATURE SIGNATURE_32('W', 'A', 'E', 'T') 2927 2928 /// 2929 /// "WDAT" Watchdog Action Table 2930 /// 2931 #define EFI_ACPI_6_3_WATCHDOG_ACTION_TABLE_SIGNATURE SIGNATURE_32('W', 'D', 'A', 'T') 2932 2933 /// 2934 /// "WDRT" Watchdog Resource Table 2935 /// 2936 #define EFI_ACPI_6_3_WATCHDOG_RESOURCE_TABLE_SIGNATURE SIGNATURE_32('W', 'D', 'R', 'T') 2937 2938 /// 2939 /// "WPBT" MS Platform Binary Table 2940 /// 2941 #define EFI_ACPI_6_3_PLATFORM_BINARY_TABLE_SIGNATURE SIGNATURE_32('W', 'P', 'B', 'T') 2942 2943 /// 2944 /// "WSMT" Windows SMM Security Mitigation Table 2945 /// 2946 #define EFI_ACPI_6_3_WINDOWS_SMM_SECURITY_MITIGATION_TABLE_SIGNATURE SIGNATURE_32('W', 'S', 'M', 'T') 2947 2948 /// 2949 /// "XENV" Xen Project Table 2950 /// 2951 #define EFI_ACPI_6_3_XEN_PROJECT_TABLE_SIGNATURE SIGNATURE_32('X', 'E', 'N', 'V') 2952 2953 #pragma pack() 2954 2955 #endif 2956