1 /*
2 * XVID MPEG-4 VIDEO CODEC
3 * - SSE2 inverse discrete cosine transform -
4 *
5 * Copyright(C) 2003 Pascal Massimino <skal@planet-d.net>
6 *
7 * Conversion to gcc syntax with modifications
8 * by Alexander Strange <astrange@ithinksw.com>
9 *
10 * Originally from dct/x86_asm/fdct_sse2_skal.asm in Xvid.
11 *
12 * This file is part of FFmpeg.
13 *
14 * Vertical pass is an implementation of the scheme:
15 * Loeffler C., Ligtenberg A., and Moschytz C.S.:
16 * Practical Fast 1D DCT Algorithm with Eleven Multiplications,
17 * Proc. ICASSP 1989, 988-991.
18 *
19 * Horizontal pass is a double 4x4 vector/matrix multiplication,
20 * (see also Intel's Application Note 922:
21 * http://developer.intel.com/vtune/cbts/strmsimd/922down.htm
22 * Copyright (C) 1999 Intel Corporation)
23 *
24 * More details at http://skal.planet-d.net/coding/dct.html
25 *
26 * FFmpeg is free software; you can redistribute it and/or
27 * modify it under the terms of the GNU Lesser General Public
28 * License as published by the Free Software Foundation; either
29 * version 2.1 of the License, or (at your option) any later version.
30 *
31 * FFmpeg is distributed in the hope that it will be useful,
32 * but WITHOUT ANY WARRANTY; without even the implied warranty of
33 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU
34 * Lesser General Public License for more details.
35 *
36 * You should have received a copy of the GNU Lesser General Public License
37 * along with FFmpeg; if not, write to the Free Software Foundation,
38 * Inc., 51 Franklin Street, Fifth Floor, Boston, MA 02110-1301 USA
39 */
40
41 #include "dsputil.h"
42
43 /*!
44 * @file idct_sse2_xvid.c
45 * @brief SSE2 idct compatible with xvidmmx
46 */
47
48 #define X8(x) x,x,x,x,x,x,x,x
49
50 #define ROW_SHIFT 11
51 #define COL_SHIFT 6
52
53 DECLARE_ASM_CONST(16, int16_t, tan1[]) = {X8(13036)}; // tan( pi/16)
54 DECLARE_ASM_CONST(16, int16_t, tan2[]) = {X8(27146)}; // tan(2pi/16) = sqrt(2)-1
55 DECLARE_ASM_CONST(16, int16_t, tan3[]) = {X8(43790)}; // tan(3pi/16)-1
56 DECLARE_ASM_CONST(16, int16_t, sqrt2[])= {X8(23170)}; // 0.5/sqrt(2)
57 DECLARE_ASM_CONST(8, uint8_t, m127[]) = {X8(127)};
58
59 DECLARE_ASM_CONST(16, int16_t, iTab1[]) = {
60 0x4000, 0x539f, 0xc000, 0xac61, 0x4000, 0xdd5d, 0x4000, 0xdd5d,
61 0x4000, 0x22a3, 0x4000, 0x22a3, 0xc000, 0x539f, 0x4000, 0xac61,
62 0x3249, 0x11a8, 0x4b42, 0xee58, 0x11a8, 0x4b42, 0x11a8, 0xcdb7,
63 0x58c5, 0x4b42, 0xa73b, 0xcdb7, 0x3249, 0xa73b, 0x4b42, 0xa73b
64 };
65
66 DECLARE_ASM_CONST(16, int16_t, iTab2[]) = {
67 0x58c5, 0x73fc, 0xa73b, 0x8c04, 0x58c5, 0xcff5, 0x58c5, 0xcff5,
68 0x58c5, 0x300b, 0x58c5, 0x300b, 0xa73b, 0x73fc, 0x58c5, 0x8c04,
69 0x45bf, 0x187e, 0x6862, 0xe782, 0x187e, 0x6862, 0x187e, 0xba41,
70 0x7b21, 0x6862, 0x84df, 0xba41, 0x45bf, 0x84df, 0x6862, 0x84df
71 };
72
73 DECLARE_ASM_CONST(16, int16_t, iTab3[]) = {
74 0x539f, 0x6d41, 0xac61, 0x92bf, 0x539f, 0xd2bf, 0x539f, 0xd2bf,
75 0x539f, 0x2d41, 0x539f, 0x2d41, 0xac61, 0x6d41, 0x539f, 0x92bf,
76 0x41b3, 0x1712, 0x6254, 0xe8ee, 0x1712, 0x6254, 0x1712, 0xbe4d,
77 0x73fc, 0x6254, 0x8c04, 0xbe4d, 0x41b3, 0x8c04, 0x6254, 0x8c04
78 };
79
80 DECLARE_ASM_CONST(16, int16_t, iTab4[]) = {
81 0x4b42, 0x6254, 0xb4be, 0x9dac, 0x4b42, 0xd746, 0x4b42, 0xd746,
82 0x4b42, 0x28ba, 0x4b42, 0x28ba, 0xb4be, 0x6254, 0x4b42, 0x9dac,
83 0x3b21, 0x14c3, 0x587e, 0xeb3d, 0x14c3, 0x587e, 0x14c3, 0xc4df,
84 0x6862, 0x587e, 0x979e, 0xc4df, 0x3b21, 0x979e, 0x587e, 0x979e
85 };
86
87 DECLARE_ASM_CONST(16, int32_t, walkenIdctRounders[]) = {
88 65536, 65536, 65536, 65536,
89 3597, 3597, 3597, 3597,
90 2260, 2260, 2260, 2260,
91 1203, 1203, 1203, 1203,
92 120, 120, 120, 120,
93 512, 512, 512, 512
94 };
95
96 // Temporary storage before the column pass
97 #define ROW1 "%%xmm6"
98 #define ROW3 "%%xmm4"
99 #define ROW5 "%%xmm5"
100 #define ROW7 "%%xmm7"
101
102 #define CLEAR_ODD(r) "pxor "r","r" \n\t"
103 #define PUT_ODD(dst) "pshufhw $0x1B, %%xmm2, "dst" \n\t"
104
105 #ifdef ARCH_X86_64
106
107 # define ROW0 "%%xmm8"
108 # define REG0 ROW0
109 # define ROW2 "%%xmm9"
110 # define REG2 ROW2
111 # define ROW4 "%%xmm10"
112 # define REG4 ROW4
113 # define ROW6 "%%xmm11"
114 # define REG6 ROW6
115 # define CLEAR_EVEN(r) CLEAR_ODD(r)
116 # define PUT_EVEN(dst) PUT_ODD(dst)
117 # define XMMS "%%xmm12"
118 # define MOV_32_ONLY "#"
119 # define SREG2 REG2
120 # define TAN3 "%%xmm13"
121 # define TAN1 "%%xmm14"
122
123 #else
124
125 # define ROW0 "(%0)"
126 # define REG0 "%%xmm4"
127 # define ROW2 "2*16(%0)"
128 # define REG2 "%%xmm4"
129 # define ROW4 "4*16(%0)"
130 # define REG4 "%%xmm6"
131 # define ROW6 "6*16(%0)"
132 # define REG6 "%%xmm6"
133 # define CLEAR_EVEN(r)
134 # define PUT_EVEN(dst) \
135 "pshufhw $0x1B, %%xmm2, %%xmm2 \n\t" \
136 "movdqa %%xmm2, "dst" \n\t"
137 # define XMMS "%%xmm2"
138 # define MOV_32_ONLY "movdqa "
139 # define SREG2 "%%xmm7"
140 # define TAN3 "%%xmm0"
141 # define TAN1 "%%xmm2"
142
143 #endif
144
145 #define ROUND(x) "paddd "MANGLE(x)
146
147 #define JZ(reg, to) \
148 "testl "reg","reg" \n\t" \
149 "jz "to" \n\t"
150
151 #define JNZ(reg, to) \
152 "testl "reg","reg" \n\t" \
153 "jnz "to" \n\t"
154
155 #define TEST_ONE_ROW(src, reg, clear) \
156 clear \
157 "movq "src", %%mm1 \n\t" \
158 "por 8+"src", %%mm1 \n\t" \
159 "paddusb %%mm0, %%mm1 \n\t" \
160 "pmovmskb %%mm1, "reg" \n\t"
161
162 #define TEST_TWO_ROWS(row1, row2, reg1, reg2, clear1, clear2) \
163 clear1 \
164 clear2 \
165 "movq "row1", %%mm1 \n\t" \
166 "por 8+"row1", %%mm1 \n\t" \
167 "movq "row2", %%mm2 \n\t" \
168 "por 8+"row2", %%mm2 \n\t" \
169 "paddusb %%mm0, %%mm1 \n\t" \
170 "paddusb %%mm0, %%mm2 \n\t" \
171 "pmovmskb %%mm1, "reg1" \n\t" \
172 "pmovmskb %%mm2, "reg2" \n\t"
173
174 ///IDCT pass on rows.
175 #define iMTX_MULT(src, table, rounder, put) \
176 "movdqa "src", %%xmm3 \n\t" \
177 "movdqa %%xmm3, %%xmm0 \n\t" \
178 "pshufd $0x11, %%xmm3, %%xmm1 \n\t" /* 4602 */ \
179 "punpcklqdq %%xmm0, %%xmm0 \n\t" /* 0246 */ \
180 "pmaddwd "table", %%xmm0 \n\t" \
181 "pmaddwd 16+"table", %%xmm1 \n\t" \
182 "pshufd $0xBB, %%xmm3, %%xmm2 \n\t" /* 5713 */ \
183 "punpckhqdq %%xmm3, %%xmm3 \n\t" /* 1357 */ \
184 "pmaddwd 32+"table", %%xmm2 \n\t" \
185 "pmaddwd 48+"table", %%xmm3 \n\t" \
186 "paddd %%xmm1, %%xmm0 \n\t" \
187 "paddd %%xmm3, %%xmm2 \n\t" \
188 rounder", %%xmm0 \n\t" \
189 "movdqa %%xmm2, %%xmm3 \n\t" \
190 "paddd %%xmm0, %%xmm2 \n\t" \
191 "psubd %%xmm3, %%xmm0 \n\t" \
192 "psrad $11, %%xmm2 \n\t" \
193 "psrad $11, %%xmm0 \n\t" \
194 "packssdw %%xmm0, %%xmm2 \n\t" \
195 put \
196 "1: \n\t"
197
198 #define iLLM_HEAD \
199 "movdqa "MANGLE(tan3)", "TAN3" \n\t" \
200 "movdqa "MANGLE(tan1)", "TAN1" \n\t" \
201
202 ///IDCT pass on columns.
203 #define iLLM_PASS(dct) \
204 "movdqa "TAN3", %%xmm1 \n\t" \
205 "movdqa "TAN1", %%xmm3 \n\t" \
206 "pmulhw %%xmm4, "TAN3" \n\t" \
207 "pmulhw %%xmm5, %%xmm1 \n\t" \
208 "paddsw %%xmm4, "TAN3" \n\t" \
209 "paddsw %%xmm5, %%xmm1 \n\t" \
210 "psubsw %%xmm5, "TAN3" \n\t" \
211 "paddsw %%xmm4, %%xmm1 \n\t" \
212 "pmulhw %%xmm7, %%xmm3 \n\t" \
213 "pmulhw %%xmm6, "TAN1" \n\t" \
214 "paddsw %%xmm6, %%xmm3 \n\t" \
215 "psubsw %%xmm7, "TAN1" \n\t" \
216 "movdqa %%xmm3, %%xmm7 \n\t" \
217 "movdqa "TAN1", %%xmm6 \n\t" \
218 "psubsw %%xmm1, %%xmm3 \n\t" \
219 "psubsw "TAN3", "TAN1" \n\t" \
220 "paddsw %%xmm7, %%xmm1 \n\t" \
221 "paddsw %%xmm6, "TAN3" \n\t" \
222 "movdqa %%xmm3, %%xmm6 \n\t" \
223 "psubsw "TAN3", %%xmm3 \n\t" \
224 "paddsw %%xmm6, "TAN3" \n\t" \
225 "movdqa "MANGLE(sqrt2)", %%xmm4 \n\t" \
226 "pmulhw %%xmm4, %%xmm3 \n\t" \
227 "pmulhw %%xmm4, "TAN3" \n\t" \
228 "paddsw "TAN3", "TAN3" \n\t" \
229 "paddsw %%xmm3, %%xmm3 \n\t" \
230 "movdqa "MANGLE(tan2)", %%xmm7 \n\t" \
231 MOV_32_ONLY ROW2", "REG2" \n\t" \
232 MOV_32_ONLY ROW6", "REG6" \n\t" \
233 "movdqa %%xmm7, %%xmm5 \n\t" \
234 "pmulhw "REG6", %%xmm7 \n\t" \
235 "pmulhw "REG2", %%xmm5 \n\t" \
236 "paddsw "REG2", %%xmm7 \n\t" \
237 "psubsw "REG6", %%xmm5 \n\t" \
238 MOV_32_ONLY ROW0", "REG0" \n\t" \
239 MOV_32_ONLY ROW4", "REG4" \n\t" \
240 MOV_32_ONLY" "TAN1", (%0) \n\t" \
241 "movdqa "REG0", "XMMS" \n\t" \
242 "psubsw "REG4", "REG0" \n\t" \
243 "paddsw "XMMS", "REG4" \n\t" \
244 "movdqa "REG4", "XMMS" \n\t" \
245 "psubsw %%xmm7, "REG4" \n\t" \
246 "paddsw "XMMS", %%xmm7 \n\t" \
247 "movdqa "REG0", "XMMS" \n\t" \
248 "psubsw %%xmm5, "REG0" \n\t" \
249 "paddsw "XMMS", %%xmm5 \n\t" \
250 "movdqa %%xmm5, "XMMS" \n\t" \
251 "psubsw "TAN3", %%xmm5 \n\t" \
252 "paddsw "XMMS", "TAN3" \n\t" \
253 "movdqa "REG0", "XMMS" \n\t" \
254 "psubsw %%xmm3, "REG0" \n\t" \
255 "paddsw "XMMS", %%xmm3 \n\t" \
256 MOV_32_ONLY" (%0), "TAN1" \n\t" \
257 "psraw $6, %%xmm5 \n\t" \
258 "psraw $6, "REG0" \n\t" \
259 "psraw $6, "TAN3" \n\t" \
260 "psraw $6, %%xmm3 \n\t" \
261 "movdqa "TAN3", 1*16("dct") \n\t" \
262 "movdqa %%xmm3, 2*16("dct") \n\t" \
263 "movdqa "REG0", 5*16("dct") \n\t" \
264 "movdqa %%xmm5, 6*16("dct") \n\t" \
265 "movdqa %%xmm7, %%xmm0 \n\t" \
266 "movdqa "REG4", %%xmm4 \n\t" \
267 "psubsw %%xmm1, %%xmm7 \n\t" \
268 "psubsw "TAN1", "REG4" \n\t" \
269 "paddsw %%xmm0, %%xmm1 \n\t" \
270 "paddsw %%xmm4, "TAN1" \n\t" \
271 "psraw $6, %%xmm1 \n\t" \
272 "psraw $6, %%xmm7 \n\t" \
273 "psraw $6, "TAN1" \n\t" \
274 "psraw $6, "REG4" \n\t" \
275 "movdqa %%xmm1, ("dct") \n\t" \
276 "movdqa "TAN1", 3*16("dct") \n\t" \
277 "movdqa "REG4", 4*16("dct") \n\t" \
278 "movdqa %%xmm7, 7*16("dct") \n\t"
279
280 ///IDCT pass on columns, assuming rows 4-7 are zero.
281 #define iLLM_PASS_SPARSE(dct) \
282 "pmulhw %%xmm4, "TAN3" \n\t" \
283 "paddsw %%xmm4, "TAN3" \n\t" \
284 "movdqa %%xmm6, %%xmm3 \n\t" \
285 "pmulhw %%xmm6, "TAN1" \n\t" \
286 "movdqa %%xmm4, %%xmm1 \n\t" \
287 "psubsw %%xmm1, %%xmm3 \n\t" \
288 "paddsw %%xmm6, %%xmm1 \n\t" \
289 "movdqa "TAN1", %%xmm6 \n\t" \
290 "psubsw "TAN3", "TAN1" \n\t" \
291 "paddsw %%xmm6, "TAN3" \n\t" \
292 "movdqa %%xmm3, %%xmm6 \n\t" \
293 "psubsw "TAN3", %%xmm3 \n\t" \
294 "paddsw %%xmm6, "TAN3" \n\t" \
295 "movdqa "MANGLE(sqrt2)", %%xmm4 \n\t" \
296 "pmulhw %%xmm4, %%xmm3 \n\t" \
297 "pmulhw %%xmm4, "TAN3" \n\t" \
298 "paddsw "TAN3", "TAN3" \n\t" \
299 "paddsw %%xmm3, %%xmm3 \n\t" \
300 "movdqa "MANGLE(tan2)", %%xmm5 \n\t" \
301 MOV_32_ONLY ROW2", "SREG2" \n\t" \
302 "pmulhw "SREG2", %%xmm5 \n\t" \
303 MOV_32_ONLY ROW0", "REG0" \n\t" \
304 "movdqa "REG0", %%xmm6 \n\t" \
305 "psubsw "SREG2", %%xmm6 \n\t" \
306 "paddsw "REG0", "SREG2" \n\t" \
307 MOV_32_ONLY" "TAN1", (%0) \n\t" \
308 "movdqa "REG0", "XMMS" \n\t" \
309 "psubsw %%xmm5, "REG0" \n\t" \
310 "paddsw "XMMS", %%xmm5 \n\t" \
311 "movdqa %%xmm5, "XMMS" \n\t" \
312 "psubsw "TAN3", %%xmm5 \n\t" \
313 "paddsw "XMMS", "TAN3" \n\t" \
314 "movdqa "REG0", "XMMS" \n\t" \
315 "psubsw %%xmm3, "REG0" \n\t" \
316 "paddsw "XMMS", %%xmm3 \n\t" \
317 MOV_32_ONLY" (%0), "TAN1" \n\t" \
318 "psraw $6, %%xmm5 \n\t" \
319 "psraw $6, "REG0" \n\t" \
320 "psraw $6, "TAN3" \n\t" \
321 "psraw $6, %%xmm3 \n\t" \
322 "movdqa "TAN3", 1*16("dct") \n\t" \
323 "movdqa %%xmm3, 2*16("dct") \n\t" \
324 "movdqa "REG0", 5*16("dct") \n\t" \
325 "movdqa %%xmm5, 6*16("dct") \n\t" \
326 "movdqa "SREG2", %%xmm0 \n\t" \
327 "movdqa %%xmm6, %%xmm4 \n\t" \
328 "psubsw %%xmm1, "SREG2" \n\t" \
329 "psubsw "TAN1", %%xmm6 \n\t" \
330 "paddsw %%xmm0, %%xmm1 \n\t" \
331 "paddsw %%xmm4, "TAN1" \n\t" \
332 "psraw $6, %%xmm1 \n\t" \
333 "psraw $6, "SREG2" \n\t" \
334 "psraw $6, "TAN1" \n\t" \
335 "psraw $6, %%xmm6 \n\t" \
336 "movdqa %%xmm1, ("dct") \n\t" \
337 "movdqa "TAN1", 3*16("dct") \n\t" \
338 "movdqa %%xmm6, 4*16("dct") \n\t" \
339 "movdqa "SREG2", 7*16("dct") \n\t"
340
ff_idct_xvid_sse2(short * block)341 inline void ff_idct_xvid_sse2(short *block)
342 {
343 asm volatile(
344 "movq "MANGLE(m127)", %%mm0 \n\t"
345 iMTX_MULT("(%0)", MANGLE(iTab1), ROUND(walkenIdctRounders), PUT_EVEN(ROW0))
346 iMTX_MULT("1*16(%0)", MANGLE(iTab2), ROUND(walkenIdctRounders+1*16), PUT_ODD(ROW1))
347 iMTX_MULT("2*16(%0)", MANGLE(iTab3), ROUND(walkenIdctRounders+2*16), PUT_EVEN(ROW2))
348
349 TEST_TWO_ROWS("3*16(%0)", "4*16(%0)", "%%eax", "%%ecx", CLEAR_ODD(ROW3), CLEAR_EVEN(ROW4))
350 JZ("%%eax", "1f")
351 iMTX_MULT("3*16(%0)", MANGLE(iTab4), ROUND(walkenIdctRounders+3*16), PUT_ODD(ROW3))
352
353 TEST_TWO_ROWS("5*16(%0)", "6*16(%0)", "%%eax", "%%edx", CLEAR_ODD(ROW5), CLEAR_EVEN(ROW6))
354 TEST_ONE_ROW("7*16(%0)", "%%esi", CLEAR_ODD(ROW7))
355 iLLM_HEAD
356 ASMALIGN(4)
357 JNZ("%%ecx", "2f")
358 JNZ("%%eax", "3f")
359 JNZ("%%edx", "4f")
360 JNZ("%%esi", "5f")
361 iLLM_PASS_SPARSE("%0")
362 "jmp 6f \n\t"
363 "2: \n\t"
364 iMTX_MULT("4*16(%0)", MANGLE(iTab1), "#", PUT_EVEN(ROW4))
365 "3: \n\t"
366 iMTX_MULT("5*16(%0)", MANGLE(iTab4), ROUND(walkenIdctRounders+4*16), PUT_ODD(ROW5))
367 JZ("%%edx", "1f")
368 "4: \n\t"
369 iMTX_MULT("6*16(%0)", MANGLE(iTab3), ROUND(walkenIdctRounders+5*16), PUT_EVEN(ROW6))
370 JZ("%%esi", "1f")
371 "5: \n\t"
372 iMTX_MULT("7*16(%0)", MANGLE(iTab2), ROUND(walkenIdctRounders+5*16), PUT_ODD(ROW7))
373 #ifndef ARCH_X86_64
374 iLLM_HEAD
375 #endif
376 iLLM_PASS("%0")
377 "6: \n\t"
378 : "+r"(block)
379 :
380 : "%eax", "%ecx", "%edx", "%esi", "memory");
381 }
382
ff_idct_xvid_sse2_put(uint8_t * dest,int line_size,short * block)383 void ff_idct_xvid_sse2_put(uint8_t *dest, int line_size, short *block)
384 {
385 ff_idct_xvid_sse2(block);
386 put_pixels_clamped_mmx(block, dest, line_size);
387 }
388
ff_idct_xvid_sse2_add(uint8_t * dest,int line_size,short * block)389 void ff_idct_xvid_sse2_add(uint8_t *dest, int line_size, short *block)
390 {
391 ff_idct_xvid_sse2(block);
392 add_pixels_clamped_mmx(block, dest, line_size);
393 }
394