1 /*
2 * Copyright 2013 The Native Client Authors. All rights reserved.
3 * Use of this source code is governed by a BSD-style license that can
4 * be found in the LICENSE file.
5 */
6
7 // DO NOT EDIT: GENERATED CODE
8
9 #ifndef NACL_TRUSTED_BUT_NOT_TCB
10 #error This file is not meant for use in the TCB
11 #endif
12
13
14 #include "gtest/gtest.h"
15 #include "native_client/src/trusted/validator_arm/actual_vs_baseline.h"
16 #include "native_client/src/trusted/validator_arm/arm_helpers.h"
17 #include "native_client/src/trusted/validator_arm/gen/arm32_decode_named_bases.h"
18
19 using nacl_arm_dec::Instruction;
20 using nacl_arm_dec::ClassDecoder;
21 using nacl_arm_dec::Register;
22 using nacl_arm_dec::RegisterList;
23
24 namespace nacl_arm_test {
25
26 // The following classes are derived class decoder testers that
27 // add row pattern constraints and decoder restrictions to each tester.
28 // This is done so that it can be used to make sure that the
29 // corresponding pattern is not tested for cases that would be excluded
30 // due to row checks, or restrictions specified by the row restrictions.
31
32
33 // A(25)=0 & op1(24:20)=0x010
34 // = {actual: Actual_BLX_immediate_1111101hiiiiiiiiiiiiiiiiiiiiiiii_case_1,
35 // baseline: STRT_A1_cccc0100u010nnnnttttiiiiiiiiiiii_case_0,
36 // defs: {},
37 // pattern: cccc0100u010nnnnttttiiiiiiiiiiii,
38 // rule: STRT_A1,
39 // safety: [true => FORBIDDEN],
40 // true: true,
41 // uses: {}}
42 class STRT_A1_cccc0100u010nnnnttttiiiiiiiiiiii_case_0TesterCase0
43 : public Arm32DecoderTester {
44 public:
STRT_A1_cccc0100u010nnnnttttiiiiiiiiiiii_case_0TesterCase0(const NamedClassDecoder & decoder)45 STRT_A1_cccc0100u010nnnnttttiiiiiiiiiiii_case_0TesterCase0(const NamedClassDecoder& decoder)
46 : Arm32DecoderTester(decoder) {}
47 virtual bool PassesParsePreconditions(
48 nacl_arm_dec::Instruction inst,
49 const NamedClassDecoder& decoder);
50 };
51
52 bool STRT_A1_cccc0100u010nnnnttttiiiiiiiiiiii_case_0TesterCase0
PassesParsePreconditions(nacl_arm_dec::Instruction inst,const NamedClassDecoder & decoder)53 ::PassesParsePreconditions(
54 nacl_arm_dec::Instruction inst,
55 const NamedClassDecoder& decoder) {
56
57 // Check that row patterns apply to pattern being checked.'
58 // A(25)=~0
59 if ((inst.Bits() & 0x02000000) !=
60 0x00000000) return false;
61 // op1(24:20)=~0x010
62 if ((inst.Bits() & 0x01700000) !=
63 0x00200000) return false;
64
65 // if cond(31:28)=1111, don't test instruction.
66 if ((inst.Bits() & 0xF0000000) == 0xF0000000) return false;
67
68 // Check other preconditions defined for the base decoder.
69 return Arm32DecoderTester::
70 PassesParsePreconditions(inst, decoder);
71 }
72
73 // A(25)=0 & op1(24:20)=0x011
74 // = {actual: Actual_BLX_immediate_1111101hiiiiiiiiiiiiiiiiiiiiiiii_case_1,
75 // baseline: LDRT_A1_cccc0100u011nnnnttttiiiiiiiiiiii_case_0,
76 // defs: {},
77 // pattern: cccc0100u011nnnnttttiiiiiiiiiiii,
78 // rule: LDRT_A1,
79 // safety: [true => FORBIDDEN],
80 // true: true,
81 // uses: {}}
82 class LDRT_A1_cccc0100u011nnnnttttiiiiiiiiiiii_case_0TesterCase1
83 : public Arm32DecoderTester {
84 public:
LDRT_A1_cccc0100u011nnnnttttiiiiiiiiiiii_case_0TesterCase1(const NamedClassDecoder & decoder)85 LDRT_A1_cccc0100u011nnnnttttiiiiiiiiiiii_case_0TesterCase1(const NamedClassDecoder& decoder)
86 : Arm32DecoderTester(decoder) {}
87 virtual bool PassesParsePreconditions(
88 nacl_arm_dec::Instruction inst,
89 const NamedClassDecoder& decoder);
90 };
91
92 bool LDRT_A1_cccc0100u011nnnnttttiiiiiiiiiiii_case_0TesterCase1
PassesParsePreconditions(nacl_arm_dec::Instruction inst,const NamedClassDecoder & decoder)93 ::PassesParsePreconditions(
94 nacl_arm_dec::Instruction inst,
95 const NamedClassDecoder& decoder) {
96
97 // Check that row patterns apply to pattern being checked.'
98 // A(25)=~0
99 if ((inst.Bits() & 0x02000000) !=
100 0x00000000) return false;
101 // op1(24:20)=~0x011
102 if ((inst.Bits() & 0x01700000) !=
103 0x00300000) return false;
104
105 // if cond(31:28)=1111, don't test instruction.
106 if ((inst.Bits() & 0xF0000000) == 0xF0000000) return false;
107
108 // Check other preconditions defined for the base decoder.
109 return Arm32DecoderTester::
110 PassesParsePreconditions(inst, decoder);
111 }
112
113 // A(25)=0 & op1(24:20)=0x110
114 // = {actual: Actual_BLX_immediate_1111101hiiiiiiiiiiiiiiiiiiiiiiii_case_1,
115 // baseline: STRBT_A1_cccc0100u110nnnnttttiiiiiiiiiiii_case_0,
116 // defs: {},
117 // pattern: cccc0100u110nnnnttttiiiiiiiiiiii,
118 // rule: STRBT_A1,
119 // safety: [true => FORBIDDEN],
120 // true: true,
121 // uses: {}}
122 class STRBT_A1_cccc0100u110nnnnttttiiiiiiiiiiii_case_0TesterCase2
123 : public Arm32DecoderTester {
124 public:
STRBT_A1_cccc0100u110nnnnttttiiiiiiiiiiii_case_0TesterCase2(const NamedClassDecoder & decoder)125 STRBT_A1_cccc0100u110nnnnttttiiiiiiiiiiii_case_0TesterCase2(const NamedClassDecoder& decoder)
126 : Arm32DecoderTester(decoder) {}
127 virtual bool PassesParsePreconditions(
128 nacl_arm_dec::Instruction inst,
129 const NamedClassDecoder& decoder);
130 };
131
132 bool STRBT_A1_cccc0100u110nnnnttttiiiiiiiiiiii_case_0TesterCase2
PassesParsePreconditions(nacl_arm_dec::Instruction inst,const NamedClassDecoder & decoder)133 ::PassesParsePreconditions(
134 nacl_arm_dec::Instruction inst,
135 const NamedClassDecoder& decoder) {
136
137 // Check that row patterns apply to pattern being checked.'
138 // A(25)=~0
139 if ((inst.Bits() & 0x02000000) !=
140 0x00000000) return false;
141 // op1(24:20)=~0x110
142 if ((inst.Bits() & 0x01700000) !=
143 0x00600000) return false;
144
145 // if cond(31:28)=1111, don't test instruction.
146 if ((inst.Bits() & 0xF0000000) == 0xF0000000) return false;
147
148 // Check other preconditions defined for the base decoder.
149 return Arm32DecoderTester::
150 PassesParsePreconditions(inst, decoder);
151 }
152
153 // A(25)=0 & op1(24:20)=0x111
154 // = {actual: Actual_BLX_immediate_1111101hiiiiiiiiiiiiiiiiiiiiiiii_case_1,
155 // baseline: LDRBT_A1_cccc0100u111nnnnttttiiiiiiiiiiii_case_0,
156 // defs: {},
157 // pattern: cccc0100u111nnnnttttiiiiiiiiiiii,
158 // rule: LDRBT_A1,
159 // safety: [true => FORBIDDEN],
160 // true: true,
161 // uses: {}}
162 class LDRBT_A1_cccc0100u111nnnnttttiiiiiiiiiiii_case_0TesterCase3
163 : public Arm32DecoderTester {
164 public:
LDRBT_A1_cccc0100u111nnnnttttiiiiiiiiiiii_case_0TesterCase3(const NamedClassDecoder & decoder)165 LDRBT_A1_cccc0100u111nnnnttttiiiiiiiiiiii_case_0TesterCase3(const NamedClassDecoder& decoder)
166 : Arm32DecoderTester(decoder) {}
167 virtual bool PassesParsePreconditions(
168 nacl_arm_dec::Instruction inst,
169 const NamedClassDecoder& decoder);
170 };
171
172 bool LDRBT_A1_cccc0100u111nnnnttttiiiiiiiiiiii_case_0TesterCase3
PassesParsePreconditions(nacl_arm_dec::Instruction inst,const NamedClassDecoder & decoder)173 ::PassesParsePreconditions(
174 nacl_arm_dec::Instruction inst,
175 const NamedClassDecoder& decoder) {
176
177 // Check that row patterns apply to pattern being checked.'
178 // A(25)=~0
179 if ((inst.Bits() & 0x02000000) !=
180 0x00000000) return false;
181 // op1(24:20)=~0x111
182 if ((inst.Bits() & 0x01700000) !=
183 0x00700000) return false;
184
185 // if cond(31:28)=1111, don't test instruction.
186 if ((inst.Bits() & 0xF0000000) == 0xF0000000) return false;
187
188 // Check other preconditions defined for the base decoder.
189 return Arm32DecoderTester::
190 PassesParsePreconditions(inst, decoder);
191 }
192
193 // A(25)=0 & op1(24:20)=xx0x0 & op1_repeated(24:20)=~0x010
194 // = {None: 32,
195 // P: P(24),
196 // Pc: 15,
197 // Rn: Rn(19:16),
198 // Rt: Rt(15:12),
199 // W: W(21),
200 // actual: Actual_STR_immediate_cccc010pu0w0nnnnttttiiiiiiiiiiii_case_1,
201 // base: Rn,
202 // baseline: STR_immediate_cccc010pu0w0nnnnttttiiiiiiiiiiii_case_0,
203 // defs: {base
204 // if wback
205 // else None},
206 // fields: [P(24), W(21), Rn(19:16), Rt(15:12)],
207 // pattern: cccc010pu0w0nnnnttttiiiiiiiiiiii,
208 // rule: STR_immediate,
209 // safety: [P(24)=0 &&
210 // W(21)=1 => DECODER_ERROR,
211 // wback &&
212 // (Rn ==
213 // Pc ||
214 // Rn ==
215 // Rt) => UNPREDICTABLE],
216 // small_imm_base_wb: wback,
217 // uses: {Rn, Rt},
218 // violations: [implied by 'base'],
219 // wback: P(24)=0 ||
220 // W(21)=1}
221 class STR_immediate_cccc010pu0w0nnnnttttiiiiiiiiiiii_case_0TesterCase4
222 : public Arm32DecoderTester {
223 public:
STR_immediate_cccc010pu0w0nnnnttttiiiiiiiiiiii_case_0TesterCase4(const NamedClassDecoder & decoder)224 STR_immediate_cccc010pu0w0nnnnttttiiiiiiiiiiii_case_0TesterCase4(const NamedClassDecoder& decoder)
225 : Arm32DecoderTester(decoder) {}
226 virtual bool PassesParsePreconditions(
227 nacl_arm_dec::Instruction inst,
228 const NamedClassDecoder& decoder);
229 };
230
231 bool STR_immediate_cccc010pu0w0nnnnttttiiiiiiiiiiii_case_0TesterCase4
PassesParsePreconditions(nacl_arm_dec::Instruction inst,const NamedClassDecoder & decoder)232 ::PassesParsePreconditions(
233 nacl_arm_dec::Instruction inst,
234 const NamedClassDecoder& decoder) {
235
236 // Check that row patterns apply to pattern being checked.'
237 // A(25)=~0
238 if ((inst.Bits() & 0x02000000) !=
239 0x00000000) return false;
240 // op1(24:20)=~xx0x0
241 if ((inst.Bits() & 0x00500000) !=
242 0x00000000) return false;
243 // op1_repeated(24:20)=0x010
244 if ((inst.Bits() & 0x01700000) ==
245 0x00200000) return false;
246
247 // if cond(31:28)=1111, don't test instruction.
248 if ((inst.Bits() & 0xF0000000) == 0xF0000000) return false;
249
250 // Check other preconditions defined for the base decoder.
251 return Arm32DecoderTester::
252 PassesParsePreconditions(inst, decoder);
253 }
254
255 // A(25)=0 & op1(24:20)=xx0x1 & Rn(19:16)=~1111 & op1_repeated(24:20)=~0x011
256 // = {None: 32,
257 // P: P(24),
258 // Pc: 15,
259 // Rn: Rn(19:16),
260 // Rt: Rt(15:12),
261 // Tp: 9,
262 // U: U(23),
263 // W: W(21),
264 // actual: Actual_LDR_immediate_cccc010pu0w1nnnnttttiiiiiiiiiiii_case_1,
265 // add: U(23)=1,
266 // base: Rn,
267 // baseline: LDR_immediate_cccc010pu0w1nnnnttttiiiiiiiiiiii_case_0,
268 // defs: {Rt, base
269 // if wback
270 // else None},
271 // fields: [P(24), U(23), W(21), Rn(19:16), Rt(15:12), imm12(11:0)],
272 // imm12: imm12(11:0),
273 // index: P(24)=1,
274 // is_load_tp: Rn ==
275 // Tp &&
276 // index &&
277 // not wback &&
278 // add &&
279 // imm12 in {0, 4},
280 // pattern: cccc010pu0w1nnnnttttiiiiiiiiiiii,
281 // rule: LDR_immediate,
282 // safety: [Rn ==
283 // Pc => DECODER_ERROR,
284 // P(24)=0 &&
285 // W(21)=1 => DECODER_ERROR,
286 // wback &&
287 // Rn ==
288 // Rt => UNPREDICTABLE,
289 // Rt ==
290 // Pc => FORBIDDEN_OPERANDS],
291 // small_imm_base_wb: wback,
292 // uses: {Rn},
293 // violations: [implied by 'base'],
294 // wback: P(24)=0 ||
295 // W(21)=1}
296 class LDR_immediate_cccc010pu0w1nnnnttttiiiiiiiiiiii_case_0TesterCase5
297 : public Arm32DecoderTester {
298 public:
LDR_immediate_cccc010pu0w1nnnnttttiiiiiiiiiiii_case_0TesterCase5(const NamedClassDecoder & decoder)299 LDR_immediate_cccc010pu0w1nnnnttttiiiiiiiiiiii_case_0TesterCase5(const NamedClassDecoder& decoder)
300 : Arm32DecoderTester(decoder) {}
301 virtual bool PassesParsePreconditions(
302 nacl_arm_dec::Instruction inst,
303 const NamedClassDecoder& decoder);
304 };
305
306 bool LDR_immediate_cccc010pu0w1nnnnttttiiiiiiiiiiii_case_0TesterCase5
PassesParsePreconditions(nacl_arm_dec::Instruction inst,const NamedClassDecoder & decoder)307 ::PassesParsePreconditions(
308 nacl_arm_dec::Instruction inst,
309 const NamedClassDecoder& decoder) {
310
311 // Check that row patterns apply to pattern being checked.'
312 // A(25)=~0
313 if ((inst.Bits() & 0x02000000) !=
314 0x00000000) return false;
315 // op1(24:20)=~xx0x1
316 if ((inst.Bits() & 0x00500000) !=
317 0x00100000) return false;
318 // Rn(19:16)=1111
319 if ((inst.Bits() & 0x000F0000) ==
320 0x000F0000) return false;
321 // op1_repeated(24:20)=0x011
322 if ((inst.Bits() & 0x01700000) ==
323 0x00300000) return false;
324
325 // if cond(31:28)=1111, don't test instruction.
326 if ((inst.Bits() & 0xF0000000) == 0xF0000000) return false;
327
328 // Check other preconditions defined for the base decoder.
329 return Arm32DecoderTester::
330 PassesParsePreconditions(inst, decoder);
331 }
332
333 // A(25)=0 & op1(24:20)=xx0x1 & Rn(19:16)=1111 & op1_repeated(24:20)=~0x011 & $pattern(31:0)=xxxxxxx1xx0xxxxxxxxxxxxxxxxxxxxx
334 // = {Pc: 15,
335 // Rt: Rt(15:12),
336 // actual: Actual_LDR_literal_cccc0101u0011111ttttiiiiiiiiiiii_case_1,
337 // base: Pc,
338 // baseline: LDR_literal_cccc0101u0011111ttttiiiiiiiiiiii_case_0,
339 // defs: {Rt},
340 // fields: [Rt(15:12)],
341 // is_literal_load: true,
342 // pattern: cccc0101u0011111ttttiiiiiiiiiiii,
343 // rule: LDR_literal,
344 // safety: [Rt ==
345 // Pc => FORBIDDEN_OPERANDS],
346 // true: true,
347 // uses: {Pc},
348 // violations: [implied by 'base']}
349 class LDR_literal_cccc0101u0011111ttttiiiiiiiiiiii_case_0TesterCase6
350 : public Arm32DecoderTester {
351 public:
LDR_literal_cccc0101u0011111ttttiiiiiiiiiiii_case_0TesterCase6(const NamedClassDecoder & decoder)352 LDR_literal_cccc0101u0011111ttttiiiiiiiiiiii_case_0TesterCase6(const NamedClassDecoder& decoder)
353 : Arm32DecoderTester(decoder) {}
354 virtual bool PassesParsePreconditions(
355 nacl_arm_dec::Instruction inst,
356 const NamedClassDecoder& decoder);
357 };
358
359 bool LDR_literal_cccc0101u0011111ttttiiiiiiiiiiii_case_0TesterCase6
PassesParsePreconditions(nacl_arm_dec::Instruction inst,const NamedClassDecoder & decoder)360 ::PassesParsePreconditions(
361 nacl_arm_dec::Instruction inst,
362 const NamedClassDecoder& decoder) {
363
364 // Check that row patterns apply to pattern being checked.'
365 // A(25)=~0
366 if ((inst.Bits() & 0x02000000) !=
367 0x00000000) return false;
368 // op1(24:20)=~xx0x1
369 if ((inst.Bits() & 0x00500000) !=
370 0x00100000) return false;
371 // Rn(19:16)=~1111
372 if ((inst.Bits() & 0x000F0000) !=
373 0x000F0000) return false;
374 // op1_repeated(24:20)=0x011
375 if ((inst.Bits() & 0x01700000) ==
376 0x00300000) return false;
377 // $pattern(31:0)=~xxxxxxx1xx0xxxxxxxxxxxxxxxxxxxxx
378 if ((inst.Bits() & 0x01200000) !=
379 0x01000000) return false;
380
381 // if cond(31:28)=1111, don't test instruction.
382 if ((inst.Bits() & 0xF0000000) == 0xF0000000) return false;
383
384 // Check other preconditions defined for the base decoder.
385 return Arm32DecoderTester::
386 PassesParsePreconditions(inst, decoder);
387 }
388
389 // A(25)=0 & op1(24:20)=xx1x0 & op1_repeated(24:20)=~0x110
390 // = {None: 32,
391 // P: P(24),
392 // Pc: 15,
393 // Rn: Rn(19:16),
394 // Rt: Rt(15:12),
395 // W: W(21),
396 // actual: Actual_STRB_immediate_cccc010pu1w0nnnnttttiiiiiiiiiiii_case_1,
397 // base: Rn,
398 // baseline: STRB_immediate_cccc010pu1w0nnnnttttiiiiiiiiiiii_case_0,
399 // defs: {base
400 // if wback
401 // else None},
402 // fields: [P(24), W(21), Rn(19:16), Rt(15:12)],
403 // pattern: cccc010pu1w0nnnnttttiiiiiiiiiiii,
404 // rule: STRB_immediate,
405 // safety: [P(24)=0 &&
406 // W(21)=1 => DECODER_ERROR,
407 // Rt ==
408 // Pc => UNPREDICTABLE,
409 // wback &&
410 // (Rn ==
411 // Pc ||
412 // Rn ==
413 // Rt) => UNPREDICTABLE],
414 // small_imm_base_wb: wback,
415 // uses: {Rn, Rt},
416 // violations: [implied by 'base'],
417 // wback: P(24)=0 ||
418 // W(21)=1}
419 class STRB_immediate_cccc010pu1w0nnnnttttiiiiiiiiiiii_case_0TesterCase7
420 : public Arm32DecoderTester {
421 public:
STRB_immediate_cccc010pu1w0nnnnttttiiiiiiiiiiii_case_0TesterCase7(const NamedClassDecoder & decoder)422 STRB_immediate_cccc010pu1w0nnnnttttiiiiiiiiiiii_case_0TesterCase7(const NamedClassDecoder& decoder)
423 : Arm32DecoderTester(decoder) {}
424 virtual bool PassesParsePreconditions(
425 nacl_arm_dec::Instruction inst,
426 const NamedClassDecoder& decoder);
427 };
428
429 bool STRB_immediate_cccc010pu1w0nnnnttttiiiiiiiiiiii_case_0TesterCase7
PassesParsePreconditions(nacl_arm_dec::Instruction inst,const NamedClassDecoder & decoder)430 ::PassesParsePreconditions(
431 nacl_arm_dec::Instruction inst,
432 const NamedClassDecoder& decoder) {
433
434 // Check that row patterns apply to pattern being checked.'
435 // A(25)=~0
436 if ((inst.Bits() & 0x02000000) !=
437 0x00000000) return false;
438 // op1(24:20)=~xx1x0
439 if ((inst.Bits() & 0x00500000) !=
440 0x00400000) return false;
441 // op1_repeated(24:20)=0x110
442 if ((inst.Bits() & 0x01700000) ==
443 0x00600000) return false;
444
445 // if cond(31:28)=1111, don't test instruction.
446 if ((inst.Bits() & 0xF0000000) == 0xF0000000) return false;
447
448 // Check other preconditions defined for the base decoder.
449 return Arm32DecoderTester::
450 PassesParsePreconditions(inst, decoder);
451 }
452
453 // A(25)=0 & op1(24:20)=xx1x1 & Rn(19:16)=~1111 & op1_repeated(24:20)=~0x111
454 // = {None: 32,
455 // P: P(24),
456 // Pc: 15,
457 // Rn: Rn(19:16),
458 // Rt: Rt(15:12),
459 // W: W(21),
460 // actual: Actual_LDRB_immediate_cccc010pu1w1nnnnttttiiiiiiiiiiii_case_1,
461 // base: Rn,
462 // baseline: LDRB_immediate_cccc010pu1w1nnnnttttiiiiiiiiiiii_case_0,
463 // defs: {Rt, base
464 // if wback
465 // else None},
466 // fields: [P(24), W(21), Rn(19:16), Rt(15:12)],
467 // pattern: cccc010pu1w1nnnnttttiiiiiiiiiiii,
468 // rule: LDRB_immediate,
469 // safety: [Rn ==
470 // Pc => DECODER_ERROR,
471 // P(24)=0 &&
472 // W(21)=1 => DECODER_ERROR,
473 // Rt ==
474 // Pc => UNPREDICTABLE,
475 // wback &&
476 // Rn ==
477 // Rt => UNPREDICTABLE],
478 // small_imm_base_wb: wback,
479 // uses: {Rn},
480 // violations: [implied by 'base'],
481 // wback: P(24)=0 ||
482 // W(21)=1}
483 class LDRB_immediate_cccc010pu1w1nnnnttttiiiiiiiiiiii_case_0TesterCase8
484 : public Arm32DecoderTester {
485 public:
LDRB_immediate_cccc010pu1w1nnnnttttiiiiiiiiiiii_case_0TesterCase8(const NamedClassDecoder & decoder)486 LDRB_immediate_cccc010pu1w1nnnnttttiiiiiiiiiiii_case_0TesterCase8(const NamedClassDecoder& decoder)
487 : Arm32DecoderTester(decoder) {}
488 virtual bool PassesParsePreconditions(
489 nacl_arm_dec::Instruction inst,
490 const NamedClassDecoder& decoder);
491 };
492
493 bool LDRB_immediate_cccc010pu1w1nnnnttttiiiiiiiiiiii_case_0TesterCase8
PassesParsePreconditions(nacl_arm_dec::Instruction inst,const NamedClassDecoder & decoder)494 ::PassesParsePreconditions(
495 nacl_arm_dec::Instruction inst,
496 const NamedClassDecoder& decoder) {
497
498 // Check that row patterns apply to pattern being checked.'
499 // A(25)=~0
500 if ((inst.Bits() & 0x02000000) !=
501 0x00000000) return false;
502 // op1(24:20)=~xx1x1
503 if ((inst.Bits() & 0x00500000) !=
504 0x00500000) return false;
505 // Rn(19:16)=1111
506 if ((inst.Bits() & 0x000F0000) ==
507 0x000F0000) return false;
508 // op1_repeated(24:20)=0x111
509 if ((inst.Bits() & 0x01700000) ==
510 0x00700000) return false;
511
512 // if cond(31:28)=1111, don't test instruction.
513 if ((inst.Bits() & 0xF0000000) == 0xF0000000) return false;
514
515 // Check other preconditions defined for the base decoder.
516 return Arm32DecoderTester::
517 PassesParsePreconditions(inst, decoder);
518 }
519
520 // A(25)=0 & op1(24:20)=xx1x1 & Rn(19:16)=1111 & op1_repeated(24:20)=~0x111 & $pattern(31:0)=xxxxxxx1xx0xxxxxxxxxxxxxxxxxxxxx
521 // = {Pc: 15,
522 // Rt: Rt(15:12),
523 // actual: Actual_LDRB_literal_cccc0101u1011111ttttiiiiiiiiiiii_case_1,
524 // base: Pc,
525 // baseline: LDRB_literal_cccc0101u1011111ttttiiiiiiiiiiii_case_0,
526 // defs: {Rt},
527 // fields: [Rt(15:12)],
528 // is_literal_load: true,
529 // pattern: cccc0101u1011111ttttiiiiiiiiiiii,
530 // rule: LDRB_literal,
531 // safety: [Rt ==
532 // Pc => UNPREDICTABLE],
533 // true: true,
534 // uses: {Pc},
535 // violations: [implied by 'base']}
536 class LDRB_literal_cccc0101u1011111ttttiiiiiiiiiiii_case_0TesterCase9
537 : public Arm32DecoderTester {
538 public:
LDRB_literal_cccc0101u1011111ttttiiiiiiiiiiii_case_0TesterCase9(const NamedClassDecoder & decoder)539 LDRB_literal_cccc0101u1011111ttttiiiiiiiiiiii_case_0TesterCase9(const NamedClassDecoder& decoder)
540 : Arm32DecoderTester(decoder) {}
541 virtual bool PassesParsePreconditions(
542 nacl_arm_dec::Instruction inst,
543 const NamedClassDecoder& decoder);
544 };
545
546 bool LDRB_literal_cccc0101u1011111ttttiiiiiiiiiiii_case_0TesterCase9
PassesParsePreconditions(nacl_arm_dec::Instruction inst,const NamedClassDecoder & decoder)547 ::PassesParsePreconditions(
548 nacl_arm_dec::Instruction inst,
549 const NamedClassDecoder& decoder) {
550
551 // Check that row patterns apply to pattern being checked.'
552 // A(25)=~0
553 if ((inst.Bits() & 0x02000000) !=
554 0x00000000) return false;
555 // op1(24:20)=~xx1x1
556 if ((inst.Bits() & 0x00500000) !=
557 0x00500000) return false;
558 // Rn(19:16)=~1111
559 if ((inst.Bits() & 0x000F0000) !=
560 0x000F0000) return false;
561 // op1_repeated(24:20)=0x111
562 if ((inst.Bits() & 0x01700000) ==
563 0x00700000) return false;
564 // $pattern(31:0)=~xxxxxxx1xx0xxxxxxxxxxxxxxxxxxxxx
565 if ((inst.Bits() & 0x01200000) !=
566 0x01000000) return false;
567
568 // if cond(31:28)=1111, don't test instruction.
569 if ((inst.Bits() & 0xF0000000) == 0xF0000000) return false;
570
571 // Check other preconditions defined for the base decoder.
572 return Arm32DecoderTester::
573 PassesParsePreconditions(inst, decoder);
574 }
575
576 // A(25)=1 & op1(24:20)=0x010 & B(4)=0
577 // = {actual: Actual_BLX_immediate_1111101hiiiiiiiiiiiiiiiiiiiiiiii_case_1,
578 // baseline: STRT_A2_cccc0110u010nnnnttttiiiiitt0mmmm_case_0,
579 // defs: {},
580 // pattern: cccc0110u010nnnnttttiiiiitt0mmmm,
581 // rule: STRT_A2,
582 // safety: [true => FORBIDDEN],
583 // true: true,
584 // uses: {}}
585 class STRT_A2_cccc0110u010nnnnttttiiiiitt0mmmm_case_0TesterCase10
586 : public Arm32DecoderTester {
587 public:
STRT_A2_cccc0110u010nnnnttttiiiiitt0mmmm_case_0TesterCase10(const NamedClassDecoder & decoder)588 STRT_A2_cccc0110u010nnnnttttiiiiitt0mmmm_case_0TesterCase10(const NamedClassDecoder& decoder)
589 : Arm32DecoderTester(decoder) {}
590 virtual bool PassesParsePreconditions(
591 nacl_arm_dec::Instruction inst,
592 const NamedClassDecoder& decoder);
593 };
594
595 bool STRT_A2_cccc0110u010nnnnttttiiiiitt0mmmm_case_0TesterCase10
PassesParsePreconditions(nacl_arm_dec::Instruction inst,const NamedClassDecoder & decoder)596 ::PassesParsePreconditions(
597 nacl_arm_dec::Instruction inst,
598 const NamedClassDecoder& decoder) {
599
600 // Check that row patterns apply to pattern being checked.'
601 // A(25)=~1
602 if ((inst.Bits() & 0x02000000) !=
603 0x02000000) return false;
604 // op1(24:20)=~0x010
605 if ((inst.Bits() & 0x01700000) !=
606 0x00200000) return false;
607 // B(4)=~0
608 if ((inst.Bits() & 0x00000010) !=
609 0x00000000) return false;
610
611 // if cond(31:28)=1111, don't test instruction.
612 if ((inst.Bits() & 0xF0000000) == 0xF0000000) return false;
613
614 // Check other preconditions defined for the base decoder.
615 return Arm32DecoderTester::
616 PassesParsePreconditions(inst, decoder);
617 }
618
619 // A(25)=1 & op1(24:20)=0x011 & B(4)=0
620 // = {actual: Actual_BLX_immediate_1111101hiiiiiiiiiiiiiiiiiiiiiiii_case_1,
621 // baseline: LDRT_A2_cccc0110u011nnnnttttiiiiitt0mmmm_case_0,
622 // defs: {},
623 // pattern: cccc0110u011nnnnttttiiiiitt0mmmm,
624 // rule: LDRT_A2,
625 // safety: [true => FORBIDDEN],
626 // true: true,
627 // uses: {}}
628 class LDRT_A2_cccc0110u011nnnnttttiiiiitt0mmmm_case_0TesterCase11
629 : public Arm32DecoderTester {
630 public:
LDRT_A2_cccc0110u011nnnnttttiiiiitt0mmmm_case_0TesterCase11(const NamedClassDecoder & decoder)631 LDRT_A2_cccc0110u011nnnnttttiiiiitt0mmmm_case_0TesterCase11(const NamedClassDecoder& decoder)
632 : Arm32DecoderTester(decoder) {}
633 virtual bool PassesParsePreconditions(
634 nacl_arm_dec::Instruction inst,
635 const NamedClassDecoder& decoder);
636 };
637
638 bool LDRT_A2_cccc0110u011nnnnttttiiiiitt0mmmm_case_0TesterCase11
PassesParsePreconditions(nacl_arm_dec::Instruction inst,const NamedClassDecoder & decoder)639 ::PassesParsePreconditions(
640 nacl_arm_dec::Instruction inst,
641 const NamedClassDecoder& decoder) {
642
643 // Check that row patterns apply to pattern being checked.'
644 // A(25)=~1
645 if ((inst.Bits() & 0x02000000) !=
646 0x02000000) return false;
647 // op1(24:20)=~0x011
648 if ((inst.Bits() & 0x01700000) !=
649 0x00300000) return false;
650 // B(4)=~0
651 if ((inst.Bits() & 0x00000010) !=
652 0x00000000) return false;
653
654 // if cond(31:28)=1111, don't test instruction.
655 if ((inst.Bits() & 0xF0000000) == 0xF0000000) return false;
656
657 // Check other preconditions defined for the base decoder.
658 return Arm32DecoderTester::
659 PassesParsePreconditions(inst, decoder);
660 }
661
662 // A(25)=1 & op1(24:20)=0x110 & B(4)=0
663 // = {actual: Actual_BLX_immediate_1111101hiiiiiiiiiiiiiiiiiiiiiiii_case_1,
664 // baseline: STRBT_A2_cccc0110u110nnnnttttiiiiitt0mmmm_case_0,
665 // defs: {},
666 // pattern: cccc0110u110nnnnttttiiiiitt0mmmm,
667 // rule: STRBT_A2,
668 // safety: [true => FORBIDDEN],
669 // true: true,
670 // uses: {}}
671 class STRBT_A2_cccc0110u110nnnnttttiiiiitt0mmmm_case_0TesterCase12
672 : public Arm32DecoderTester {
673 public:
STRBT_A2_cccc0110u110nnnnttttiiiiitt0mmmm_case_0TesterCase12(const NamedClassDecoder & decoder)674 STRBT_A2_cccc0110u110nnnnttttiiiiitt0mmmm_case_0TesterCase12(const NamedClassDecoder& decoder)
675 : Arm32DecoderTester(decoder) {}
676 virtual bool PassesParsePreconditions(
677 nacl_arm_dec::Instruction inst,
678 const NamedClassDecoder& decoder);
679 };
680
681 bool STRBT_A2_cccc0110u110nnnnttttiiiiitt0mmmm_case_0TesterCase12
PassesParsePreconditions(nacl_arm_dec::Instruction inst,const NamedClassDecoder & decoder)682 ::PassesParsePreconditions(
683 nacl_arm_dec::Instruction inst,
684 const NamedClassDecoder& decoder) {
685
686 // Check that row patterns apply to pattern being checked.'
687 // A(25)=~1
688 if ((inst.Bits() & 0x02000000) !=
689 0x02000000) return false;
690 // op1(24:20)=~0x110
691 if ((inst.Bits() & 0x01700000) !=
692 0x00600000) return false;
693 // B(4)=~0
694 if ((inst.Bits() & 0x00000010) !=
695 0x00000000) return false;
696
697 // if cond(31:28)=1111, don't test instruction.
698 if ((inst.Bits() & 0xF0000000) == 0xF0000000) return false;
699
700 // Check other preconditions defined for the base decoder.
701 return Arm32DecoderTester::
702 PassesParsePreconditions(inst, decoder);
703 }
704
705 // A(25)=1 & op1(24:20)=0x111 & B(4)=0
706 // = {actual: Actual_BLX_immediate_1111101hiiiiiiiiiiiiiiiiiiiiiiii_case_1,
707 // baseline: LDRBT_A2_cccc0110u111nnnnttttiiiiitt0mmmm_case_0,
708 // defs: {},
709 // pattern: cccc0110u111nnnnttttiiiiitt0mmmm,
710 // rule: LDRBT_A2,
711 // safety: [true => FORBIDDEN],
712 // true: true,
713 // uses: {}}
714 class LDRBT_A2_cccc0110u111nnnnttttiiiiitt0mmmm_case_0TesterCase13
715 : public Arm32DecoderTester {
716 public:
LDRBT_A2_cccc0110u111nnnnttttiiiiitt0mmmm_case_0TesterCase13(const NamedClassDecoder & decoder)717 LDRBT_A2_cccc0110u111nnnnttttiiiiitt0mmmm_case_0TesterCase13(const NamedClassDecoder& decoder)
718 : Arm32DecoderTester(decoder) {}
719 virtual bool PassesParsePreconditions(
720 nacl_arm_dec::Instruction inst,
721 const NamedClassDecoder& decoder);
722 };
723
724 bool LDRBT_A2_cccc0110u111nnnnttttiiiiitt0mmmm_case_0TesterCase13
PassesParsePreconditions(nacl_arm_dec::Instruction inst,const NamedClassDecoder & decoder)725 ::PassesParsePreconditions(
726 nacl_arm_dec::Instruction inst,
727 const NamedClassDecoder& decoder) {
728
729 // Check that row patterns apply to pattern being checked.'
730 // A(25)=~1
731 if ((inst.Bits() & 0x02000000) !=
732 0x02000000) return false;
733 // op1(24:20)=~0x111
734 if ((inst.Bits() & 0x01700000) !=
735 0x00700000) return false;
736 // B(4)=~0
737 if ((inst.Bits() & 0x00000010) !=
738 0x00000000) return false;
739
740 // if cond(31:28)=1111, don't test instruction.
741 if ((inst.Bits() & 0xF0000000) == 0xF0000000) return false;
742
743 // Check other preconditions defined for the base decoder.
744 return Arm32DecoderTester::
745 PassesParsePreconditions(inst, decoder);
746 }
747
748 // A(25)=1 & op1(24:20)=xx0x0 & B(4)=0 & op1_repeated(24:20)=~0x010
749 // = {None: 32,
750 // P: P(24),
751 // Pc: 15,
752 // Rm: Rm(3:0),
753 // Rn: Rn(19:16),
754 // Rt: Rt(15:12),
755 // W: W(21),
756 // actual: Actual_STR_register_cccc011pd0w0nnnnttttiiiiitt0mmmm_case_1,
757 // base: Rn,
758 // baseline: STR_register_cccc011pd0w0nnnnttttiiiiitt0mmmm_case_0,
759 // defs: {base
760 // if wback
761 // else None},
762 // fields: [P(24), W(21), Rn(19:16), Rt(15:12), Rm(3:0)],
763 // index: P(24)=1,
764 // pattern: cccc011pd0w0nnnnttttiiiiitt0mmmm,
765 // rule: STR_register,
766 // safety: [P(24)=0 &&
767 // W(21)=1 => DECODER_ERROR,
768 // Rm ==
769 // Pc => UNPREDICTABLE,
770 // wback &&
771 // (Rn ==
772 // Pc ||
773 // Rn ==
774 // Rt) => UNPREDICTABLE,
775 // ArchVersion() <
776 // 6 &&
777 // wback &&
778 // Rn ==
779 // Rm => UNPREDICTABLE,
780 // index => FORBIDDEN],
781 // uses: {Rm, Rn, Rt},
782 // violations: [implied by 'base'],
783 // wback: P(24)=0 ||
784 // W(21)=1}
785 class STR_register_cccc011pd0w0nnnnttttiiiiitt0mmmm_case_0TesterCase14
786 : public Arm32DecoderTester {
787 public:
STR_register_cccc011pd0w0nnnnttttiiiiitt0mmmm_case_0TesterCase14(const NamedClassDecoder & decoder)788 STR_register_cccc011pd0w0nnnnttttiiiiitt0mmmm_case_0TesterCase14(const NamedClassDecoder& decoder)
789 : Arm32DecoderTester(decoder) {}
790 virtual bool PassesParsePreconditions(
791 nacl_arm_dec::Instruction inst,
792 const NamedClassDecoder& decoder);
793 };
794
795 bool STR_register_cccc011pd0w0nnnnttttiiiiitt0mmmm_case_0TesterCase14
PassesParsePreconditions(nacl_arm_dec::Instruction inst,const NamedClassDecoder & decoder)796 ::PassesParsePreconditions(
797 nacl_arm_dec::Instruction inst,
798 const NamedClassDecoder& decoder) {
799
800 // Check that row patterns apply to pattern being checked.'
801 // A(25)=~1
802 if ((inst.Bits() & 0x02000000) !=
803 0x02000000) return false;
804 // op1(24:20)=~xx0x0
805 if ((inst.Bits() & 0x00500000) !=
806 0x00000000) return false;
807 // B(4)=~0
808 if ((inst.Bits() & 0x00000010) !=
809 0x00000000) return false;
810 // op1_repeated(24:20)=0x010
811 if ((inst.Bits() & 0x01700000) ==
812 0x00200000) return false;
813
814 // if cond(31:28)=1111, don't test instruction.
815 if ((inst.Bits() & 0xF0000000) == 0xF0000000) return false;
816
817 // Check other preconditions defined for the base decoder.
818 return Arm32DecoderTester::
819 PassesParsePreconditions(inst, decoder);
820 }
821
822 // A(25)=1 & op1(24:20)=xx0x1 & B(4)=0 & op1_repeated(24:20)=~0x011
823 // = {None: 32,
824 // P: P(24),
825 // Pc: 15,
826 // Rm: Rm(3:0),
827 // Rn: Rn(19:16),
828 // Rt: Rt(15:12),
829 // W: W(21),
830 // actual: Actual_LDR_register_cccc011pu0w1nnnnttttiiiiitt0mmmm_case_1,
831 // base: Rn,
832 // baseline: LDR_register_cccc011pu0w1nnnnttttiiiiitt0mmmm_case_0,
833 // defs: {Rt, base
834 // if wback
835 // else None},
836 // fields: [P(24), W(21), Rn(19:16), Rt(15:12), Rm(3:0)],
837 // index: P(24)=1,
838 // pattern: cccc011pu0w1nnnnttttiiiiitt0mmmm,
839 // rule: LDR_register,
840 // safety: [P(24)=0 &&
841 // W(21)=1 => DECODER_ERROR,
842 // Rm ==
843 // Pc => UNPREDICTABLE,
844 // wback &&
845 // (Rn ==
846 // Pc ||
847 // Rn ==
848 // Rt) => UNPREDICTABLE,
849 // ArchVersion() <
850 // 6 &&
851 // wback &&
852 // Rn ==
853 // Rm => UNPREDICTABLE,
854 // index => FORBIDDEN,
855 // Rt ==
856 // Pc => FORBIDDEN_OPERANDS],
857 // uses: {Rm, Rn},
858 // violations: [implied by 'base'],
859 // wback: P(24)=0 ||
860 // W(21)=1}
861 class LDR_register_cccc011pu0w1nnnnttttiiiiitt0mmmm_case_0TesterCase15
862 : public Arm32DecoderTester {
863 public:
LDR_register_cccc011pu0w1nnnnttttiiiiitt0mmmm_case_0TesterCase15(const NamedClassDecoder & decoder)864 LDR_register_cccc011pu0w1nnnnttttiiiiitt0mmmm_case_0TesterCase15(const NamedClassDecoder& decoder)
865 : Arm32DecoderTester(decoder) {}
866 virtual bool PassesParsePreconditions(
867 nacl_arm_dec::Instruction inst,
868 const NamedClassDecoder& decoder);
869 };
870
871 bool LDR_register_cccc011pu0w1nnnnttttiiiiitt0mmmm_case_0TesterCase15
PassesParsePreconditions(nacl_arm_dec::Instruction inst,const NamedClassDecoder & decoder)872 ::PassesParsePreconditions(
873 nacl_arm_dec::Instruction inst,
874 const NamedClassDecoder& decoder) {
875
876 // Check that row patterns apply to pattern being checked.'
877 // A(25)=~1
878 if ((inst.Bits() & 0x02000000) !=
879 0x02000000) return false;
880 // op1(24:20)=~xx0x1
881 if ((inst.Bits() & 0x00500000) !=
882 0x00100000) return false;
883 // B(4)=~0
884 if ((inst.Bits() & 0x00000010) !=
885 0x00000000) return false;
886 // op1_repeated(24:20)=0x011
887 if ((inst.Bits() & 0x01700000) ==
888 0x00300000) return false;
889
890 // if cond(31:28)=1111, don't test instruction.
891 if ((inst.Bits() & 0xF0000000) == 0xF0000000) return false;
892
893 // Check other preconditions defined for the base decoder.
894 return Arm32DecoderTester::
895 PassesParsePreconditions(inst, decoder);
896 }
897
898 // A(25)=1 & op1(24:20)=xx1x0 & B(4)=0 & op1_repeated(24:20)=~0x110
899 // = {None: 32,
900 // P: P(24),
901 // Pc: 15,
902 // Rm: Rm(3:0),
903 // Rn: Rn(19:16),
904 // Rt: Rt(15:12),
905 // W: W(21),
906 // actual: Actual_STRB_register_cccc011pu1w0nnnnttttiiiiitt0mmmm_case_1,
907 // base: Rn,
908 // baseline: STRB_register_cccc011pu1w0nnnnttttiiiiitt0mmmm_case_0,
909 // defs: {base
910 // if wback
911 // else None},
912 // fields: [P(24), W(21), Rn(19:16), Rt(15:12), Rm(3:0)],
913 // index: P(24)=1,
914 // pattern: cccc011pu1w0nnnnttttiiiiitt0mmmm,
915 // rule: STRB_register,
916 // safety: [P(24)=0 &&
917 // W(21)=1 => DECODER_ERROR,
918 // Pc in {Rm, Rt} => UNPREDICTABLE,
919 // wback &&
920 // (Rn ==
921 // Pc ||
922 // Rn ==
923 // Rt) => UNPREDICTABLE,
924 // ArchVersion() <
925 // 6 &&
926 // wback &&
927 // Rn ==
928 // Rm => UNPREDICTABLE,
929 // index => FORBIDDEN],
930 // uses: {Rm, Rn, Rt},
931 // violations: [implied by 'base'],
932 // wback: P(24)=0 ||
933 // W(21)=1}
934 class STRB_register_cccc011pu1w0nnnnttttiiiiitt0mmmm_case_0TesterCase16
935 : public Arm32DecoderTester {
936 public:
STRB_register_cccc011pu1w0nnnnttttiiiiitt0mmmm_case_0TesterCase16(const NamedClassDecoder & decoder)937 STRB_register_cccc011pu1w0nnnnttttiiiiitt0mmmm_case_0TesterCase16(const NamedClassDecoder& decoder)
938 : Arm32DecoderTester(decoder) {}
939 virtual bool PassesParsePreconditions(
940 nacl_arm_dec::Instruction inst,
941 const NamedClassDecoder& decoder);
942 };
943
944 bool STRB_register_cccc011pu1w0nnnnttttiiiiitt0mmmm_case_0TesterCase16
PassesParsePreconditions(nacl_arm_dec::Instruction inst,const NamedClassDecoder & decoder)945 ::PassesParsePreconditions(
946 nacl_arm_dec::Instruction inst,
947 const NamedClassDecoder& decoder) {
948
949 // Check that row patterns apply to pattern being checked.'
950 // A(25)=~1
951 if ((inst.Bits() & 0x02000000) !=
952 0x02000000) return false;
953 // op1(24:20)=~xx1x0
954 if ((inst.Bits() & 0x00500000) !=
955 0x00400000) return false;
956 // B(4)=~0
957 if ((inst.Bits() & 0x00000010) !=
958 0x00000000) return false;
959 // op1_repeated(24:20)=0x110
960 if ((inst.Bits() & 0x01700000) ==
961 0x00600000) return false;
962
963 // if cond(31:28)=1111, don't test instruction.
964 if ((inst.Bits() & 0xF0000000) == 0xF0000000) return false;
965
966 // Check other preconditions defined for the base decoder.
967 return Arm32DecoderTester::
968 PassesParsePreconditions(inst, decoder);
969 }
970
971 // A(25)=1 & op1(24:20)=xx1x1 & B(4)=0 & op1_repeated(24:20)=~0x111
972 // = {None: 32,
973 // P: P(24),
974 // Pc: 15,
975 // Rm: Rm(3:0),
976 // Rn: Rn(19:16),
977 // Rt: Rt(15:12),
978 // W: W(21),
979 // actual: Actual_LDRB_register_cccc011pu1w1nnnnttttiiiiitt0mmmm_case_1,
980 // base: Rn,
981 // baseline: LDRB_register_cccc011pu1w1nnnnttttiiiiitt0mmmm_case_0,
982 // defs: {Rt, base
983 // if wback
984 // else None},
985 // fields: [P(24), W(21), Rn(19:16), Rt(15:12), Rm(3:0)],
986 // index: P(24)=1,
987 // pattern: cccc011pu1w1nnnnttttiiiiitt0mmmm,
988 // rule: LDRB_register,
989 // safety: [P(24)=0 &&
990 // W(21)=1 => DECODER_ERROR,
991 // Pc in {Rt, Rm} => UNPREDICTABLE,
992 // wback &&
993 // (Rn ==
994 // Pc ||
995 // Rn ==
996 // Rt) => UNPREDICTABLE,
997 // ArchVersion() <
998 // 6 &&
999 // wback &&
1000 // Rn ==
1001 // Rm => UNPREDICTABLE,
1002 // index => FORBIDDEN],
1003 // uses: {Rm, Rn},
1004 // violations: [implied by 'base'],
1005 // wback: P(24)=0 ||
1006 // W(21)=1}
1007 class LDRB_register_cccc011pu1w1nnnnttttiiiiitt0mmmm_case_0TesterCase17
1008 : public Arm32DecoderTester {
1009 public:
LDRB_register_cccc011pu1w1nnnnttttiiiiitt0mmmm_case_0TesterCase17(const NamedClassDecoder & decoder)1010 LDRB_register_cccc011pu1w1nnnnttttiiiiitt0mmmm_case_0TesterCase17(const NamedClassDecoder& decoder)
1011 : Arm32DecoderTester(decoder) {}
1012 virtual bool PassesParsePreconditions(
1013 nacl_arm_dec::Instruction inst,
1014 const NamedClassDecoder& decoder);
1015 };
1016
1017 bool LDRB_register_cccc011pu1w1nnnnttttiiiiitt0mmmm_case_0TesterCase17
PassesParsePreconditions(nacl_arm_dec::Instruction inst,const NamedClassDecoder & decoder)1018 ::PassesParsePreconditions(
1019 nacl_arm_dec::Instruction inst,
1020 const NamedClassDecoder& decoder) {
1021
1022 // Check that row patterns apply to pattern being checked.'
1023 // A(25)=~1
1024 if ((inst.Bits() & 0x02000000) !=
1025 0x02000000) return false;
1026 // op1(24:20)=~xx1x1
1027 if ((inst.Bits() & 0x00500000) !=
1028 0x00500000) return false;
1029 // B(4)=~0
1030 if ((inst.Bits() & 0x00000010) !=
1031 0x00000000) return false;
1032 // op1_repeated(24:20)=0x111
1033 if ((inst.Bits() & 0x01700000) ==
1034 0x00700000) return false;
1035
1036 // if cond(31:28)=1111, don't test instruction.
1037 if ((inst.Bits() & 0xF0000000) == 0xF0000000) return false;
1038
1039 // Check other preconditions defined for the base decoder.
1040 return Arm32DecoderTester::
1041 PassesParsePreconditions(inst, decoder);
1042 }
1043
1044 // The following are derived class decoder testers for decoder actions
1045 // associated with a pattern of an action. These derived classes introduce
1046 // a default constructor that automatically initializes the expected decoder
1047 // to the corresponding instance in the generated DecoderState.
1048
1049 // A(25)=0 & op1(24:20)=0x010
1050 // = {actual: Actual_BLX_immediate_1111101hiiiiiiiiiiiiiiiiiiiiiiii_case_1,
1051 // baseline: STRT_A1_cccc0100u010nnnnttttiiiiiiiiiiii_case_0,
1052 // defs: {},
1053 // pattern: cccc0100u010nnnnttttiiiiiiiiiiii,
1054 // rule: STRT_A1,
1055 // safety: [true => FORBIDDEN],
1056 // true: true,
1057 // uses: {}}
1058 class STRT_A1_cccc0100u010nnnnttttiiiiiiiiiiii_case_0Tester_Case0
1059 : public STRT_A1_cccc0100u010nnnnttttiiiiiiiiiiii_case_0TesterCase0 {
1060 public:
STRT_A1_cccc0100u010nnnnttttiiiiiiiiiiii_case_0Tester_Case0()1061 STRT_A1_cccc0100u010nnnnttttiiiiiiiiiiii_case_0Tester_Case0()
1062 : STRT_A1_cccc0100u010nnnnttttiiiiiiiiiiii_case_0TesterCase0(
1063 state_.STRT_A1_cccc0100u010nnnnttttiiiiiiiiiiii_case_0_STRT_A1_instance_)
1064 {}
1065 };
1066
1067 // A(25)=0 & op1(24:20)=0x011
1068 // = {actual: Actual_BLX_immediate_1111101hiiiiiiiiiiiiiiiiiiiiiiii_case_1,
1069 // baseline: LDRT_A1_cccc0100u011nnnnttttiiiiiiiiiiii_case_0,
1070 // defs: {},
1071 // pattern: cccc0100u011nnnnttttiiiiiiiiiiii,
1072 // rule: LDRT_A1,
1073 // safety: [true => FORBIDDEN],
1074 // true: true,
1075 // uses: {}}
1076 class LDRT_A1_cccc0100u011nnnnttttiiiiiiiiiiii_case_0Tester_Case1
1077 : public LDRT_A1_cccc0100u011nnnnttttiiiiiiiiiiii_case_0TesterCase1 {
1078 public:
LDRT_A1_cccc0100u011nnnnttttiiiiiiiiiiii_case_0Tester_Case1()1079 LDRT_A1_cccc0100u011nnnnttttiiiiiiiiiiii_case_0Tester_Case1()
1080 : LDRT_A1_cccc0100u011nnnnttttiiiiiiiiiiii_case_0TesterCase1(
1081 state_.LDRT_A1_cccc0100u011nnnnttttiiiiiiiiiiii_case_0_LDRT_A1_instance_)
1082 {}
1083 };
1084
1085 // A(25)=0 & op1(24:20)=0x110
1086 // = {actual: Actual_BLX_immediate_1111101hiiiiiiiiiiiiiiiiiiiiiiii_case_1,
1087 // baseline: STRBT_A1_cccc0100u110nnnnttttiiiiiiiiiiii_case_0,
1088 // defs: {},
1089 // pattern: cccc0100u110nnnnttttiiiiiiiiiiii,
1090 // rule: STRBT_A1,
1091 // safety: [true => FORBIDDEN],
1092 // true: true,
1093 // uses: {}}
1094 class STRBT_A1_cccc0100u110nnnnttttiiiiiiiiiiii_case_0Tester_Case2
1095 : public STRBT_A1_cccc0100u110nnnnttttiiiiiiiiiiii_case_0TesterCase2 {
1096 public:
STRBT_A1_cccc0100u110nnnnttttiiiiiiiiiiii_case_0Tester_Case2()1097 STRBT_A1_cccc0100u110nnnnttttiiiiiiiiiiii_case_0Tester_Case2()
1098 : STRBT_A1_cccc0100u110nnnnttttiiiiiiiiiiii_case_0TesterCase2(
1099 state_.STRBT_A1_cccc0100u110nnnnttttiiiiiiiiiiii_case_0_STRBT_A1_instance_)
1100 {}
1101 };
1102
1103 // A(25)=0 & op1(24:20)=0x111
1104 // = {actual: Actual_BLX_immediate_1111101hiiiiiiiiiiiiiiiiiiiiiiii_case_1,
1105 // baseline: LDRBT_A1_cccc0100u111nnnnttttiiiiiiiiiiii_case_0,
1106 // defs: {},
1107 // pattern: cccc0100u111nnnnttttiiiiiiiiiiii,
1108 // rule: LDRBT_A1,
1109 // safety: [true => FORBIDDEN],
1110 // true: true,
1111 // uses: {}}
1112 class LDRBT_A1_cccc0100u111nnnnttttiiiiiiiiiiii_case_0Tester_Case3
1113 : public LDRBT_A1_cccc0100u111nnnnttttiiiiiiiiiiii_case_0TesterCase3 {
1114 public:
LDRBT_A1_cccc0100u111nnnnttttiiiiiiiiiiii_case_0Tester_Case3()1115 LDRBT_A1_cccc0100u111nnnnttttiiiiiiiiiiii_case_0Tester_Case3()
1116 : LDRBT_A1_cccc0100u111nnnnttttiiiiiiiiiiii_case_0TesterCase3(
1117 state_.LDRBT_A1_cccc0100u111nnnnttttiiiiiiiiiiii_case_0_LDRBT_A1_instance_)
1118 {}
1119 };
1120
1121 // A(25)=0 & op1(24:20)=xx0x0 & op1_repeated(24:20)=~0x010
1122 // = {None: 32,
1123 // P: P(24),
1124 // Pc: 15,
1125 // Rn: Rn(19:16),
1126 // Rt: Rt(15:12),
1127 // W: W(21),
1128 // actual: Actual_STR_immediate_cccc010pu0w0nnnnttttiiiiiiiiiiii_case_1,
1129 // base: Rn,
1130 // baseline: STR_immediate_cccc010pu0w0nnnnttttiiiiiiiiiiii_case_0,
1131 // defs: {base
1132 // if wback
1133 // else None},
1134 // fields: [P(24), W(21), Rn(19:16), Rt(15:12)],
1135 // pattern: cccc010pu0w0nnnnttttiiiiiiiiiiii,
1136 // rule: STR_immediate,
1137 // safety: [P(24)=0 &&
1138 // W(21)=1 => DECODER_ERROR,
1139 // wback &&
1140 // (Rn ==
1141 // Pc ||
1142 // Rn ==
1143 // Rt) => UNPREDICTABLE],
1144 // small_imm_base_wb: wback,
1145 // uses: {Rn, Rt},
1146 // violations: [implied by 'base'],
1147 // wback: P(24)=0 ||
1148 // W(21)=1}
1149 class STR_immediate_cccc010pu0w0nnnnttttiiiiiiiiiiii_case_0Tester_Case4
1150 : public STR_immediate_cccc010pu0w0nnnnttttiiiiiiiiiiii_case_0TesterCase4 {
1151 public:
STR_immediate_cccc010pu0w0nnnnttttiiiiiiiiiiii_case_0Tester_Case4()1152 STR_immediate_cccc010pu0w0nnnnttttiiiiiiiiiiii_case_0Tester_Case4()
1153 : STR_immediate_cccc010pu0w0nnnnttttiiiiiiiiiiii_case_0TesterCase4(
1154 state_.STR_immediate_cccc010pu0w0nnnnttttiiiiiiiiiiii_case_0_STR_immediate_instance_)
1155 {}
1156 };
1157
1158 // A(25)=0 & op1(24:20)=xx0x1 & Rn(19:16)=~1111 & op1_repeated(24:20)=~0x011
1159 // = {None: 32,
1160 // P: P(24),
1161 // Pc: 15,
1162 // Rn: Rn(19:16),
1163 // Rt: Rt(15:12),
1164 // Tp: 9,
1165 // U: U(23),
1166 // W: W(21),
1167 // actual: Actual_LDR_immediate_cccc010pu0w1nnnnttttiiiiiiiiiiii_case_1,
1168 // add: U(23)=1,
1169 // base: Rn,
1170 // baseline: LDR_immediate_cccc010pu0w1nnnnttttiiiiiiiiiiii_case_0,
1171 // defs: {Rt, base
1172 // if wback
1173 // else None},
1174 // fields: [P(24), U(23), W(21), Rn(19:16), Rt(15:12), imm12(11:0)],
1175 // imm12: imm12(11:0),
1176 // index: P(24)=1,
1177 // is_load_tp: Rn ==
1178 // Tp &&
1179 // index &&
1180 // not wback &&
1181 // add &&
1182 // imm12 in {0, 4},
1183 // pattern: cccc010pu0w1nnnnttttiiiiiiiiiiii,
1184 // rule: LDR_immediate,
1185 // safety: [Rn ==
1186 // Pc => DECODER_ERROR,
1187 // P(24)=0 &&
1188 // W(21)=1 => DECODER_ERROR,
1189 // wback &&
1190 // Rn ==
1191 // Rt => UNPREDICTABLE,
1192 // Rt ==
1193 // Pc => FORBIDDEN_OPERANDS],
1194 // small_imm_base_wb: wback,
1195 // uses: {Rn},
1196 // violations: [implied by 'base'],
1197 // wback: P(24)=0 ||
1198 // W(21)=1}
1199 class LDR_immediate_cccc010pu0w1nnnnttttiiiiiiiiiiii_case_0Tester_Case5
1200 : public LDR_immediate_cccc010pu0w1nnnnttttiiiiiiiiiiii_case_0TesterCase5 {
1201 public:
LDR_immediate_cccc010pu0w1nnnnttttiiiiiiiiiiii_case_0Tester_Case5()1202 LDR_immediate_cccc010pu0w1nnnnttttiiiiiiiiiiii_case_0Tester_Case5()
1203 : LDR_immediate_cccc010pu0w1nnnnttttiiiiiiiiiiii_case_0TesterCase5(
1204 state_.LDR_immediate_cccc010pu0w1nnnnttttiiiiiiiiiiii_case_0_LDR_immediate_instance_)
1205 {}
1206 };
1207
1208 // A(25)=0 & op1(24:20)=xx0x1 & Rn(19:16)=1111 & op1_repeated(24:20)=~0x011 & $pattern(31:0)=xxxxxxx1xx0xxxxxxxxxxxxxxxxxxxxx
1209 // = {Pc: 15,
1210 // Rt: Rt(15:12),
1211 // actual: Actual_LDR_literal_cccc0101u0011111ttttiiiiiiiiiiii_case_1,
1212 // base: Pc,
1213 // baseline: LDR_literal_cccc0101u0011111ttttiiiiiiiiiiii_case_0,
1214 // defs: {Rt},
1215 // fields: [Rt(15:12)],
1216 // is_literal_load: true,
1217 // pattern: cccc0101u0011111ttttiiiiiiiiiiii,
1218 // rule: LDR_literal,
1219 // safety: [Rt ==
1220 // Pc => FORBIDDEN_OPERANDS],
1221 // true: true,
1222 // uses: {Pc},
1223 // violations: [implied by 'base']}
1224 class LDR_literal_cccc0101u0011111ttttiiiiiiiiiiii_case_0Tester_Case6
1225 : public LDR_literal_cccc0101u0011111ttttiiiiiiiiiiii_case_0TesterCase6 {
1226 public:
LDR_literal_cccc0101u0011111ttttiiiiiiiiiiii_case_0Tester_Case6()1227 LDR_literal_cccc0101u0011111ttttiiiiiiiiiiii_case_0Tester_Case6()
1228 : LDR_literal_cccc0101u0011111ttttiiiiiiiiiiii_case_0TesterCase6(
1229 state_.LDR_literal_cccc0101u0011111ttttiiiiiiiiiiii_case_0_LDR_literal_instance_)
1230 {}
1231 };
1232
1233 // A(25)=0 & op1(24:20)=xx1x0 & op1_repeated(24:20)=~0x110
1234 // = {None: 32,
1235 // P: P(24),
1236 // Pc: 15,
1237 // Rn: Rn(19:16),
1238 // Rt: Rt(15:12),
1239 // W: W(21),
1240 // actual: Actual_STRB_immediate_cccc010pu1w0nnnnttttiiiiiiiiiiii_case_1,
1241 // base: Rn,
1242 // baseline: STRB_immediate_cccc010pu1w0nnnnttttiiiiiiiiiiii_case_0,
1243 // defs: {base
1244 // if wback
1245 // else None},
1246 // fields: [P(24), W(21), Rn(19:16), Rt(15:12)],
1247 // pattern: cccc010pu1w0nnnnttttiiiiiiiiiiii,
1248 // rule: STRB_immediate,
1249 // safety: [P(24)=0 &&
1250 // W(21)=1 => DECODER_ERROR,
1251 // Rt ==
1252 // Pc => UNPREDICTABLE,
1253 // wback &&
1254 // (Rn ==
1255 // Pc ||
1256 // Rn ==
1257 // Rt) => UNPREDICTABLE],
1258 // small_imm_base_wb: wback,
1259 // uses: {Rn, Rt},
1260 // violations: [implied by 'base'],
1261 // wback: P(24)=0 ||
1262 // W(21)=1}
1263 class STRB_immediate_cccc010pu1w0nnnnttttiiiiiiiiiiii_case_0Tester_Case7
1264 : public STRB_immediate_cccc010pu1w0nnnnttttiiiiiiiiiiii_case_0TesterCase7 {
1265 public:
STRB_immediate_cccc010pu1w0nnnnttttiiiiiiiiiiii_case_0Tester_Case7()1266 STRB_immediate_cccc010pu1w0nnnnttttiiiiiiiiiiii_case_0Tester_Case7()
1267 : STRB_immediate_cccc010pu1w0nnnnttttiiiiiiiiiiii_case_0TesterCase7(
1268 state_.STRB_immediate_cccc010pu1w0nnnnttttiiiiiiiiiiii_case_0_STRB_immediate_instance_)
1269 {}
1270 };
1271
1272 // A(25)=0 & op1(24:20)=xx1x1 & Rn(19:16)=~1111 & op1_repeated(24:20)=~0x111
1273 // = {None: 32,
1274 // P: P(24),
1275 // Pc: 15,
1276 // Rn: Rn(19:16),
1277 // Rt: Rt(15:12),
1278 // W: W(21),
1279 // actual: Actual_LDRB_immediate_cccc010pu1w1nnnnttttiiiiiiiiiiii_case_1,
1280 // base: Rn,
1281 // baseline: LDRB_immediate_cccc010pu1w1nnnnttttiiiiiiiiiiii_case_0,
1282 // defs: {Rt, base
1283 // if wback
1284 // else None},
1285 // fields: [P(24), W(21), Rn(19:16), Rt(15:12)],
1286 // pattern: cccc010pu1w1nnnnttttiiiiiiiiiiii,
1287 // rule: LDRB_immediate,
1288 // safety: [Rn ==
1289 // Pc => DECODER_ERROR,
1290 // P(24)=0 &&
1291 // W(21)=1 => DECODER_ERROR,
1292 // Rt ==
1293 // Pc => UNPREDICTABLE,
1294 // wback &&
1295 // Rn ==
1296 // Rt => UNPREDICTABLE],
1297 // small_imm_base_wb: wback,
1298 // uses: {Rn},
1299 // violations: [implied by 'base'],
1300 // wback: P(24)=0 ||
1301 // W(21)=1}
1302 class LDRB_immediate_cccc010pu1w1nnnnttttiiiiiiiiiiii_case_0Tester_Case8
1303 : public LDRB_immediate_cccc010pu1w1nnnnttttiiiiiiiiiiii_case_0TesterCase8 {
1304 public:
LDRB_immediate_cccc010pu1w1nnnnttttiiiiiiiiiiii_case_0Tester_Case8()1305 LDRB_immediate_cccc010pu1w1nnnnttttiiiiiiiiiiii_case_0Tester_Case8()
1306 : LDRB_immediate_cccc010pu1w1nnnnttttiiiiiiiiiiii_case_0TesterCase8(
1307 state_.LDRB_immediate_cccc010pu1w1nnnnttttiiiiiiiiiiii_case_0_LDRB_immediate_instance_)
1308 {}
1309 };
1310
1311 // A(25)=0 & op1(24:20)=xx1x1 & Rn(19:16)=1111 & op1_repeated(24:20)=~0x111 & $pattern(31:0)=xxxxxxx1xx0xxxxxxxxxxxxxxxxxxxxx
1312 // = {Pc: 15,
1313 // Rt: Rt(15:12),
1314 // actual: Actual_LDRB_literal_cccc0101u1011111ttttiiiiiiiiiiii_case_1,
1315 // base: Pc,
1316 // baseline: LDRB_literal_cccc0101u1011111ttttiiiiiiiiiiii_case_0,
1317 // defs: {Rt},
1318 // fields: [Rt(15:12)],
1319 // is_literal_load: true,
1320 // pattern: cccc0101u1011111ttttiiiiiiiiiiii,
1321 // rule: LDRB_literal,
1322 // safety: [Rt ==
1323 // Pc => UNPREDICTABLE],
1324 // true: true,
1325 // uses: {Pc},
1326 // violations: [implied by 'base']}
1327 class LDRB_literal_cccc0101u1011111ttttiiiiiiiiiiii_case_0Tester_Case9
1328 : public LDRB_literal_cccc0101u1011111ttttiiiiiiiiiiii_case_0TesterCase9 {
1329 public:
LDRB_literal_cccc0101u1011111ttttiiiiiiiiiiii_case_0Tester_Case9()1330 LDRB_literal_cccc0101u1011111ttttiiiiiiiiiiii_case_0Tester_Case9()
1331 : LDRB_literal_cccc0101u1011111ttttiiiiiiiiiiii_case_0TesterCase9(
1332 state_.LDRB_literal_cccc0101u1011111ttttiiiiiiiiiiii_case_0_LDRB_literal_instance_)
1333 {}
1334 };
1335
1336 // A(25)=1 & op1(24:20)=0x010 & B(4)=0
1337 // = {actual: Actual_BLX_immediate_1111101hiiiiiiiiiiiiiiiiiiiiiiii_case_1,
1338 // baseline: STRT_A2_cccc0110u010nnnnttttiiiiitt0mmmm_case_0,
1339 // defs: {},
1340 // pattern: cccc0110u010nnnnttttiiiiitt0mmmm,
1341 // rule: STRT_A2,
1342 // safety: [true => FORBIDDEN],
1343 // true: true,
1344 // uses: {}}
1345 class STRT_A2_cccc0110u010nnnnttttiiiiitt0mmmm_case_0Tester_Case10
1346 : public STRT_A2_cccc0110u010nnnnttttiiiiitt0mmmm_case_0TesterCase10 {
1347 public:
STRT_A2_cccc0110u010nnnnttttiiiiitt0mmmm_case_0Tester_Case10()1348 STRT_A2_cccc0110u010nnnnttttiiiiitt0mmmm_case_0Tester_Case10()
1349 : STRT_A2_cccc0110u010nnnnttttiiiiitt0mmmm_case_0TesterCase10(
1350 state_.STRT_A2_cccc0110u010nnnnttttiiiiitt0mmmm_case_0_STRT_A2_instance_)
1351 {}
1352 };
1353
1354 // A(25)=1 & op1(24:20)=0x011 & B(4)=0
1355 // = {actual: Actual_BLX_immediate_1111101hiiiiiiiiiiiiiiiiiiiiiiii_case_1,
1356 // baseline: LDRT_A2_cccc0110u011nnnnttttiiiiitt0mmmm_case_0,
1357 // defs: {},
1358 // pattern: cccc0110u011nnnnttttiiiiitt0mmmm,
1359 // rule: LDRT_A2,
1360 // safety: [true => FORBIDDEN],
1361 // true: true,
1362 // uses: {}}
1363 class LDRT_A2_cccc0110u011nnnnttttiiiiitt0mmmm_case_0Tester_Case11
1364 : public LDRT_A2_cccc0110u011nnnnttttiiiiitt0mmmm_case_0TesterCase11 {
1365 public:
LDRT_A2_cccc0110u011nnnnttttiiiiitt0mmmm_case_0Tester_Case11()1366 LDRT_A2_cccc0110u011nnnnttttiiiiitt0mmmm_case_0Tester_Case11()
1367 : LDRT_A2_cccc0110u011nnnnttttiiiiitt0mmmm_case_0TesterCase11(
1368 state_.LDRT_A2_cccc0110u011nnnnttttiiiiitt0mmmm_case_0_LDRT_A2_instance_)
1369 {}
1370 };
1371
1372 // A(25)=1 & op1(24:20)=0x110 & B(4)=0
1373 // = {actual: Actual_BLX_immediate_1111101hiiiiiiiiiiiiiiiiiiiiiiii_case_1,
1374 // baseline: STRBT_A2_cccc0110u110nnnnttttiiiiitt0mmmm_case_0,
1375 // defs: {},
1376 // pattern: cccc0110u110nnnnttttiiiiitt0mmmm,
1377 // rule: STRBT_A2,
1378 // safety: [true => FORBIDDEN],
1379 // true: true,
1380 // uses: {}}
1381 class STRBT_A2_cccc0110u110nnnnttttiiiiitt0mmmm_case_0Tester_Case12
1382 : public STRBT_A2_cccc0110u110nnnnttttiiiiitt0mmmm_case_0TesterCase12 {
1383 public:
STRBT_A2_cccc0110u110nnnnttttiiiiitt0mmmm_case_0Tester_Case12()1384 STRBT_A2_cccc0110u110nnnnttttiiiiitt0mmmm_case_0Tester_Case12()
1385 : STRBT_A2_cccc0110u110nnnnttttiiiiitt0mmmm_case_0TesterCase12(
1386 state_.STRBT_A2_cccc0110u110nnnnttttiiiiitt0mmmm_case_0_STRBT_A2_instance_)
1387 {}
1388 };
1389
1390 // A(25)=1 & op1(24:20)=0x111 & B(4)=0
1391 // = {actual: Actual_BLX_immediate_1111101hiiiiiiiiiiiiiiiiiiiiiiii_case_1,
1392 // baseline: LDRBT_A2_cccc0110u111nnnnttttiiiiitt0mmmm_case_0,
1393 // defs: {},
1394 // pattern: cccc0110u111nnnnttttiiiiitt0mmmm,
1395 // rule: LDRBT_A2,
1396 // safety: [true => FORBIDDEN],
1397 // true: true,
1398 // uses: {}}
1399 class LDRBT_A2_cccc0110u111nnnnttttiiiiitt0mmmm_case_0Tester_Case13
1400 : public LDRBT_A2_cccc0110u111nnnnttttiiiiitt0mmmm_case_0TesterCase13 {
1401 public:
LDRBT_A2_cccc0110u111nnnnttttiiiiitt0mmmm_case_0Tester_Case13()1402 LDRBT_A2_cccc0110u111nnnnttttiiiiitt0mmmm_case_0Tester_Case13()
1403 : LDRBT_A2_cccc0110u111nnnnttttiiiiitt0mmmm_case_0TesterCase13(
1404 state_.LDRBT_A2_cccc0110u111nnnnttttiiiiitt0mmmm_case_0_LDRBT_A2_instance_)
1405 {}
1406 };
1407
1408 // A(25)=1 & op1(24:20)=xx0x0 & B(4)=0 & op1_repeated(24:20)=~0x010
1409 // = {None: 32,
1410 // P: P(24),
1411 // Pc: 15,
1412 // Rm: Rm(3:0),
1413 // Rn: Rn(19:16),
1414 // Rt: Rt(15:12),
1415 // W: W(21),
1416 // actual: Actual_STR_register_cccc011pd0w0nnnnttttiiiiitt0mmmm_case_1,
1417 // base: Rn,
1418 // baseline: STR_register_cccc011pd0w0nnnnttttiiiiitt0mmmm_case_0,
1419 // defs: {base
1420 // if wback
1421 // else None},
1422 // fields: [P(24), W(21), Rn(19:16), Rt(15:12), Rm(3:0)],
1423 // index: P(24)=1,
1424 // pattern: cccc011pd0w0nnnnttttiiiiitt0mmmm,
1425 // rule: STR_register,
1426 // safety: [P(24)=0 &&
1427 // W(21)=1 => DECODER_ERROR,
1428 // Rm ==
1429 // Pc => UNPREDICTABLE,
1430 // wback &&
1431 // (Rn ==
1432 // Pc ||
1433 // Rn ==
1434 // Rt) => UNPREDICTABLE,
1435 // ArchVersion() <
1436 // 6 &&
1437 // wback &&
1438 // Rn ==
1439 // Rm => UNPREDICTABLE,
1440 // index => FORBIDDEN],
1441 // uses: {Rm, Rn, Rt},
1442 // violations: [implied by 'base'],
1443 // wback: P(24)=0 ||
1444 // W(21)=1}
1445 class STR_register_cccc011pd0w0nnnnttttiiiiitt0mmmm_case_0Tester_Case14
1446 : public STR_register_cccc011pd0w0nnnnttttiiiiitt0mmmm_case_0TesterCase14 {
1447 public:
STR_register_cccc011pd0w0nnnnttttiiiiitt0mmmm_case_0Tester_Case14()1448 STR_register_cccc011pd0w0nnnnttttiiiiitt0mmmm_case_0Tester_Case14()
1449 : STR_register_cccc011pd0w0nnnnttttiiiiitt0mmmm_case_0TesterCase14(
1450 state_.STR_register_cccc011pd0w0nnnnttttiiiiitt0mmmm_case_0_STR_register_instance_)
1451 {}
1452 };
1453
1454 // A(25)=1 & op1(24:20)=xx0x1 & B(4)=0 & op1_repeated(24:20)=~0x011
1455 // = {None: 32,
1456 // P: P(24),
1457 // Pc: 15,
1458 // Rm: Rm(3:0),
1459 // Rn: Rn(19:16),
1460 // Rt: Rt(15:12),
1461 // W: W(21),
1462 // actual: Actual_LDR_register_cccc011pu0w1nnnnttttiiiiitt0mmmm_case_1,
1463 // base: Rn,
1464 // baseline: LDR_register_cccc011pu0w1nnnnttttiiiiitt0mmmm_case_0,
1465 // defs: {Rt, base
1466 // if wback
1467 // else None},
1468 // fields: [P(24), W(21), Rn(19:16), Rt(15:12), Rm(3:0)],
1469 // index: P(24)=1,
1470 // pattern: cccc011pu0w1nnnnttttiiiiitt0mmmm,
1471 // rule: LDR_register,
1472 // safety: [P(24)=0 &&
1473 // W(21)=1 => DECODER_ERROR,
1474 // Rm ==
1475 // Pc => UNPREDICTABLE,
1476 // wback &&
1477 // (Rn ==
1478 // Pc ||
1479 // Rn ==
1480 // Rt) => UNPREDICTABLE,
1481 // ArchVersion() <
1482 // 6 &&
1483 // wback &&
1484 // Rn ==
1485 // Rm => UNPREDICTABLE,
1486 // index => FORBIDDEN,
1487 // Rt ==
1488 // Pc => FORBIDDEN_OPERANDS],
1489 // uses: {Rm, Rn},
1490 // violations: [implied by 'base'],
1491 // wback: P(24)=0 ||
1492 // W(21)=1}
1493 class LDR_register_cccc011pu0w1nnnnttttiiiiitt0mmmm_case_0Tester_Case15
1494 : public LDR_register_cccc011pu0w1nnnnttttiiiiitt0mmmm_case_0TesterCase15 {
1495 public:
LDR_register_cccc011pu0w1nnnnttttiiiiitt0mmmm_case_0Tester_Case15()1496 LDR_register_cccc011pu0w1nnnnttttiiiiitt0mmmm_case_0Tester_Case15()
1497 : LDR_register_cccc011pu0w1nnnnttttiiiiitt0mmmm_case_0TesterCase15(
1498 state_.LDR_register_cccc011pu0w1nnnnttttiiiiitt0mmmm_case_0_LDR_register_instance_)
1499 {}
1500 };
1501
1502 // A(25)=1 & op1(24:20)=xx1x0 & B(4)=0 & op1_repeated(24:20)=~0x110
1503 // = {None: 32,
1504 // P: P(24),
1505 // Pc: 15,
1506 // Rm: Rm(3:0),
1507 // Rn: Rn(19:16),
1508 // Rt: Rt(15:12),
1509 // W: W(21),
1510 // actual: Actual_STRB_register_cccc011pu1w0nnnnttttiiiiitt0mmmm_case_1,
1511 // base: Rn,
1512 // baseline: STRB_register_cccc011pu1w0nnnnttttiiiiitt0mmmm_case_0,
1513 // defs: {base
1514 // if wback
1515 // else None},
1516 // fields: [P(24), W(21), Rn(19:16), Rt(15:12), Rm(3:0)],
1517 // index: P(24)=1,
1518 // pattern: cccc011pu1w0nnnnttttiiiiitt0mmmm,
1519 // rule: STRB_register,
1520 // safety: [P(24)=0 &&
1521 // W(21)=1 => DECODER_ERROR,
1522 // Pc in {Rm, Rt} => UNPREDICTABLE,
1523 // wback &&
1524 // (Rn ==
1525 // Pc ||
1526 // Rn ==
1527 // Rt) => UNPREDICTABLE,
1528 // ArchVersion() <
1529 // 6 &&
1530 // wback &&
1531 // Rn ==
1532 // Rm => UNPREDICTABLE,
1533 // index => FORBIDDEN],
1534 // uses: {Rm, Rn, Rt},
1535 // violations: [implied by 'base'],
1536 // wback: P(24)=0 ||
1537 // W(21)=1}
1538 class STRB_register_cccc011pu1w0nnnnttttiiiiitt0mmmm_case_0Tester_Case16
1539 : public STRB_register_cccc011pu1w0nnnnttttiiiiitt0mmmm_case_0TesterCase16 {
1540 public:
STRB_register_cccc011pu1w0nnnnttttiiiiitt0mmmm_case_0Tester_Case16()1541 STRB_register_cccc011pu1w0nnnnttttiiiiitt0mmmm_case_0Tester_Case16()
1542 : STRB_register_cccc011pu1w0nnnnttttiiiiitt0mmmm_case_0TesterCase16(
1543 state_.STRB_register_cccc011pu1w0nnnnttttiiiiitt0mmmm_case_0_STRB_register_instance_)
1544 {}
1545 };
1546
1547 // A(25)=1 & op1(24:20)=xx1x1 & B(4)=0 & op1_repeated(24:20)=~0x111
1548 // = {None: 32,
1549 // P: P(24),
1550 // Pc: 15,
1551 // Rm: Rm(3:0),
1552 // Rn: Rn(19:16),
1553 // Rt: Rt(15:12),
1554 // W: W(21),
1555 // actual: Actual_LDRB_register_cccc011pu1w1nnnnttttiiiiitt0mmmm_case_1,
1556 // base: Rn,
1557 // baseline: LDRB_register_cccc011pu1w1nnnnttttiiiiitt0mmmm_case_0,
1558 // defs: {Rt, base
1559 // if wback
1560 // else None},
1561 // fields: [P(24), W(21), Rn(19:16), Rt(15:12), Rm(3:0)],
1562 // index: P(24)=1,
1563 // pattern: cccc011pu1w1nnnnttttiiiiitt0mmmm,
1564 // rule: LDRB_register,
1565 // safety: [P(24)=0 &&
1566 // W(21)=1 => DECODER_ERROR,
1567 // Pc in {Rt, Rm} => UNPREDICTABLE,
1568 // wback &&
1569 // (Rn ==
1570 // Pc ||
1571 // Rn ==
1572 // Rt) => UNPREDICTABLE,
1573 // ArchVersion() <
1574 // 6 &&
1575 // wback &&
1576 // Rn ==
1577 // Rm => UNPREDICTABLE,
1578 // index => FORBIDDEN],
1579 // uses: {Rm, Rn},
1580 // violations: [implied by 'base'],
1581 // wback: P(24)=0 ||
1582 // W(21)=1}
1583 class LDRB_register_cccc011pu1w1nnnnttttiiiiitt0mmmm_case_0Tester_Case17
1584 : public LDRB_register_cccc011pu1w1nnnnttttiiiiitt0mmmm_case_0TesterCase17 {
1585 public:
LDRB_register_cccc011pu1w1nnnnttttiiiiitt0mmmm_case_0Tester_Case17()1586 LDRB_register_cccc011pu1w1nnnnttttiiiiitt0mmmm_case_0Tester_Case17()
1587 : LDRB_register_cccc011pu1w1nnnnttttiiiiitt0mmmm_case_0TesterCase17(
1588 state_.LDRB_register_cccc011pu1w1nnnnttttiiiiitt0mmmm_case_0_LDRB_register_instance_)
1589 {}
1590 };
1591
1592 // Defines a gtest testing harness for tests.
1593 class Arm32DecoderStateTests : public ::testing::Test {
1594 protected:
Arm32DecoderStateTests()1595 Arm32DecoderStateTests() {}
1596 };
1597
1598 // The following functions test each pattern specified in parse
1599 // decoder tables.
1600
1601 // A(25)=0 & op1(24:20)=0x010
1602 // = {actual: Actual_BLX_immediate_1111101hiiiiiiiiiiiiiiiiiiiiiiii_case_1,
1603 // baseline: STRT_A1_cccc0100u010nnnnttttiiiiiiiiiiii_case_0,
1604 // defs: {},
1605 // pattern: cccc0100u010nnnnttttiiiiiiiiiiii,
1606 // rule: STRT_A1,
1607 // safety: [true => FORBIDDEN],
1608 // true: true,
1609 // uses: {}}
TEST_F(Arm32DecoderStateTests,STRT_A1_cccc0100u010nnnnttttiiiiiiiiiiii_case_0Tester_Case0_TestCase0)1610 TEST_F(Arm32DecoderStateTests,
1611 STRT_A1_cccc0100u010nnnnttttiiiiiiiiiiii_case_0Tester_Case0_TestCase0) {
1612 STRT_A1_cccc0100u010nnnnttttiiiiiiiiiiii_case_0Tester_Case0 baseline_tester;
1613 NamedActual_BLX_immediate_1111101hiiiiiiiiiiiiiiiiiiiiiiii_case_1_STRT_A1 actual;
1614 ActualVsBaselineTester a_vs_b_tester(actual, baseline_tester);
1615 a_vs_b_tester.Test("cccc0100u010nnnnttttiiiiiiiiiiii");
1616 }
1617
1618 // A(25)=0 & op1(24:20)=0x011
1619 // = {actual: Actual_BLX_immediate_1111101hiiiiiiiiiiiiiiiiiiiiiiii_case_1,
1620 // baseline: LDRT_A1_cccc0100u011nnnnttttiiiiiiiiiiii_case_0,
1621 // defs: {},
1622 // pattern: cccc0100u011nnnnttttiiiiiiiiiiii,
1623 // rule: LDRT_A1,
1624 // safety: [true => FORBIDDEN],
1625 // true: true,
1626 // uses: {}}
TEST_F(Arm32DecoderStateTests,LDRT_A1_cccc0100u011nnnnttttiiiiiiiiiiii_case_0Tester_Case1_TestCase1)1627 TEST_F(Arm32DecoderStateTests,
1628 LDRT_A1_cccc0100u011nnnnttttiiiiiiiiiiii_case_0Tester_Case1_TestCase1) {
1629 LDRT_A1_cccc0100u011nnnnttttiiiiiiiiiiii_case_0Tester_Case1 baseline_tester;
1630 NamedActual_BLX_immediate_1111101hiiiiiiiiiiiiiiiiiiiiiiii_case_1_LDRT_A1 actual;
1631 ActualVsBaselineTester a_vs_b_tester(actual, baseline_tester);
1632 a_vs_b_tester.Test("cccc0100u011nnnnttttiiiiiiiiiiii");
1633 }
1634
1635 // A(25)=0 & op1(24:20)=0x110
1636 // = {actual: Actual_BLX_immediate_1111101hiiiiiiiiiiiiiiiiiiiiiiii_case_1,
1637 // baseline: STRBT_A1_cccc0100u110nnnnttttiiiiiiiiiiii_case_0,
1638 // defs: {},
1639 // pattern: cccc0100u110nnnnttttiiiiiiiiiiii,
1640 // rule: STRBT_A1,
1641 // safety: [true => FORBIDDEN],
1642 // true: true,
1643 // uses: {}}
TEST_F(Arm32DecoderStateTests,STRBT_A1_cccc0100u110nnnnttttiiiiiiiiiiii_case_0Tester_Case2_TestCase2)1644 TEST_F(Arm32DecoderStateTests,
1645 STRBT_A1_cccc0100u110nnnnttttiiiiiiiiiiii_case_0Tester_Case2_TestCase2) {
1646 STRBT_A1_cccc0100u110nnnnttttiiiiiiiiiiii_case_0Tester_Case2 baseline_tester;
1647 NamedActual_BLX_immediate_1111101hiiiiiiiiiiiiiiiiiiiiiiii_case_1_STRBT_A1 actual;
1648 ActualVsBaselineTester a_vs_b_tester(actual, baseline_tester);
1649 a_vs_b_tester.Test("cccc0100u110nnnnttttiiiiiiiiiiii");
1650 }
1651
1652 // A(25)=0 & op1(24:20)=0x111
1653 // = {actual: Actual_BLX_immediate_1111101hiiiiiiiiiiiiiiiiiiiiiiii_case_1,
1654 // baseline: LDRBT_A1_cccc0100u111nnnnttttiiiiiiiiiiii_case_0,
1655 // defs: {},
1656 // pattern: cccc0100u111nnnnttttiiiiiiiiiiii,
1657 // rule: LDRBT_A1,
1658 // safety: [true => FORBIDDEN],
1659 // true: true,
1660 // uses: {}}
TEST_F(Arm32DecoderStateTests,LDRBT_A1_cccc0100u111nnnnttttiiiiiiiiiiii_case_0Tester_Case3_TestCase3)1661 TEST_F(Arm32DecoderStateTests,
1662 LDRBT_A1_cccc0100u111nnnnttttiiiiiiiiiiii_case_0Tester_Case3_TestCase3) {
1663 LDRBT_A1_cccc0100u111nnnnttttiiiiiiiiiiii_case_0Tester_Case3 baseline_tester;
1664 NamedActual_BLX_immediate_1111101hiiiiiiiiiiiiiiiiiiiiiiii_case_1_LDRBT_A1 actual;
1665 ActualVsBaselineTester a_vs_b_tester(actual, baseline_tester);
1666 a_vs_b_tester.Test("cccc0100u111nnnnttttiiiiiiiiiiii");
1667 }
1668
1669 // A(25)=0 & op1(24:20)=xx0x0 & op1_repeated(24:20)=~0x010
1670 // = {None: 32,
1671 // P: P(24),
1672 // Pc: 15,
1673 // Rn: Rn(19:16),
1674 // Rt: Rt(15:12),
1675 // W: W(21),
1676 // actual: Actual_STR_immediate_cccc010pu0w0nnnnttttiiiiiiiiiiii_case_1,
1677 // base: Rn,
1678 // baseline: STR_immediate_cccc010pu0w0nnnnttttiiiiiiiiiiii_case_0,
1679 // defs: {base
1680 // if wback
1681 // else None},
1682 // fields: [P(24), W(21), Rn(19:16), Rt(15:12)],
1683 // pattern: cccc010pu0w0nnnnttttiiiiiiiiiiii,
1684 // rule: STR_immediate,
1685 // safety: [P(24)=0 &&
1686 // W(21)=1 => DECODER_ERROR,
1687 // wback &&
1688 // (Rn ==
1689 // Pc ||
1690 // Rn ==
1691 // Rt) => UNPREDICTABLE],
1692 // small_imm_base_wb: wback,
1693 // uses: {Rn, Rt},
1694 // violations: [implied by 'base'],
1695 // wback: P(24)=0 ||
1696 // W(21)=1}
TEST_F(Arm32DecoderStateTests,STR_immediate_cccc010pu0w0nnnnttttiiiiiiiiiiii_case_0Tester_Case4_TestCase4)1697 TEST_F(Arm32DecoderStateTests,
1698 STR_immediate_cccc010pu0w0nnnnttttiiiiiiiiiiii_case_0Tester_Case4_TestCase4) {
1699 STR_immediate_cccc010pu0w0nnnnttttiiiiiiiiiiii_case_0Tester_Case4 baseline_tester;
1700 NamedActual_STR_immediate_cccc010pu0w0nnnnttttiiiiiiiiiiii_case_1_STR_immediate actual;
1701 ActualVsBaselineTester a_vs_b_tester(actual, baseline_tester);
1702 a_vs_b_tester.Test("cccc010pu0w0nnnnttttiiiiiiiiiiii");
1703 }
1704
1705 // A(25)=0 & op1(24:20)=xx0x1 & Rn(19:16)=~1111 & op1_repeated(24:20)=~0x011
1706 // = {None: 32,
1707 // P: P(24),
1708 // Pc: 15,
1709 // Rn: Rn(19:16),
1710 // Rt: Rt(15:12),
1711 // Tp: 9,
1712 // U: U(23),
1713 // W: W(21),
1714 // actual: Actual_LDR_immediate_cccc010pu0w1nnnnttttiiiiiiiiiiii_case_1,
1715 // add: U(23)=1,
1716 // base: Rn,
1717 // baseline: LDR_immediate_cccc010pu0w1nnnnttttiiiiiiiiiiii_case_0,
1718 // defs: {Rt, base
1719 // if wback
1720 // else None},
1721 // fields: [P(24), U(23), W(21), Rn(19:16), Rt(15:12), imm12(11:0)],
1722 // imm12: imm12(11:0),
1723 // index: P(24)=1,
1724 // is_load_tp: Rn ==
1725 // Tp &&
1726 // index &&
1727 // not wback &&
1728 // add &&
1729 // imm12 in {0, 4},
1730 // pattern: cccc010pu0w1nnnnttttiiiiiiiiiiii,
1731 // rule: LDR_immediate,
1732 // safety: [Rn ==
1733 // Pc => DECODER_ERROR,
1734 // P(24)=0 &&
1735 // W(21)=1 => DECODER_ERROR,
1736 // wback &&
1737 // Rn ==
1738 // Rt => UNPREDICTABLE,
1739 // Rt ==
1740 // Pc => FORBIDDEN_OPERANDS],
1741 // small_imm_base_wb: wback,
1742 // uses: {Rn},
1743 // violations: [implied by 'base'],
1744 // wback: P(24)=0 ||
1745 // W(21)=1}
TEST_F(Arm32DecoderStateTests,LDR_immediate_cccc010pu0w1nnnnttttiiiiiiiiiiii_case_0Tester_Case5_TestCase5)1746 TEST_F(Arm32DecoderStateTests,
1747 LDR_immediate_cccc010pu0w1nnnnttttiiiiiiiiiiii_case_0Tester_Case5_TestCase5) {
1748 LDR_immediate_cccc010pu0w1nnnnttttiiiiiiiiiiii_case_0Tester_Case5 baseline_tester;
1749 NamedActual_LDR_immediate_cccc010pu0w1nnnnttttiiiiiiiiiiii_case_1_LDR_immediate actual;
1750 ActualVsBaselineTester a_vs_b_tester(actual, baseline_tester);
1751 a_vs_b_tester.Test("cccc010pu0w1nnnnttttiiiiiiiiiiii");
1752 }
1753
1754 // A(25)=0 & op1(24:20)=xx0x1 & Rn(19:16)=1111 & op1_repeated(24:20)=~0x011 & $pattern(31:0)=xxxxxxx1xx0xxxxxxxxxxxxxxxxxxxxx
1755 // = {Pc: 15,
1756 // Rt: Rt(15:12),
1757 // actual: Actual_LDR_literal_cccc0101u0011111ttttiiiiiiiiiiii_case_1,
1758 // base: Pc,
1759 // baseline: LDR_literal_cccc0101u0011111ttttiiiiiiiiiiii_case_0,
1760 // defs: {Rt},
1761 // fields: [Rt(15:12)],
1762 // is_literal_load: true,
1763 // pattern: cccc0101u0011111ttttiiiiiiiiiiii,
1764 // rule: LDR_literal,
1765 // safety: [Rt ==
1766 // Pc => FORBIDDEN_OPERANDS],
1767 // true: true,
1768 // uses: {Pc},
1769 // violations: [implied by 'base']}
TEST_F(Arm32DecoderStateTests,LDR_literal_cccc0101u0011111ttttiiiiiiiiiiii_case_0Tester_Case6_TestCase6)1770 TEST_F(Arm32DecoderStateTests,
1771 LDR_literal_cccc0101u0011111ttttiiiiiiiiiiii_case_0Tester_Case6_TestCase6) {
1772 LDR_literal_cccc0101u0011111ttttiiiiiiiiiiii_case_0Tester_Case6 baseline_tester;
1773 NamedActual_LDR_literal_cccc0101u0011111ttttiiiiiiiiiiii_case_1_LDR_literal actual;
1774 ActualVsBaselineTester a_vs_b_tester(actual, baseline_tester);
1775 a_vs_b_tester.Test("cccc0101u0011111ttttiiiiiiiiiiii");
1776 }
1777
1778 // A(25)=0 & op1(24:20)=xx1x0 & op1_repeated(24:20)=~0x110
1779 // = {None: 32,
1780 // P: P(24),
1781 // Pc: 15,
1782 // Rn: Rn(19:16),
1783 // Rt: Rt(15:12),
1784 // W: W(21),
1785 // actual: Actual_STRB_immediate_cccc010pu1w0nnnnttttiiiiiiiiiiii_case_1,
1786 // base: Rn,
1787 // baseline: STRB_immediate_cccc010pu1w0nnnnttttiiiiiiiiiiii_case_0,
1788 // defs: {base
1789 // if wback
1790 // else None},
1791 // fields: [P(24), W(21), Rn(19:16), Rt(15:12)],
1792 // pattern: cccc010pu1w0nnnnttttiiiiiiiiiiii,
1793 // rule: STRB_immediate,
1794 // safety: [P(24)=0 &&
1795 // W(21)=1 => DECODER_ERROR,
1796 // Rt ==
1797 // Pc => UNPREDICTABLE,
1798 // wback &&
1799 // (Rn ==
1800 // Pc ||
1801 // Rn ==
1802 // Rt) => UNPREDICTABLE],
1803 // small_imm_base_wb: wback,
1804 // uses: {Rn, Rt},
1805 // violations: [implied by 'base'],
1806 // wback: P(24)=0 ||
1807 // W(21)=1}
TEST_F(Arm32DecoderStateTests,STRB_immediate_cccc010pu1w0nnnnttttiiiiiiiiiiii_case_0Tester_Case7_TestCase7)1808 TEST_F(Arm32DecoderStateTests,
1809 STRB_immediate_cccc010pu1w0nnnnttttiiiiiiiiiiii_case_0Tester_Case7_TestCase7) {
1810 STRB_immediate_cccc010pu1w0nnnnttttiiiiiiiiiiii_case_0Tester_Case7 baseline_tester;
1811 NamedActual_STRB_immediate_cccc010pu1w0nnnnttttiiiiiiiiiiii_case_1_STRB_immediate actual;
1812 ActualVsBaselineTester a_vs_b_tester(actual, baseline_tester);
1813 a_vs_b_tester.Test("cccc010pu1w0nnnnttttiiiiiiiiiiii");
1814 }
1815
1816 // A(25)=0 & op1(24:20)=xx1x1 & Rn(19:16)=~1111 & op1_repeated(24:20)=~0x111
1817 // = {None: 32,
1818 // P: P(24),
1819 // Pc: 15,
1820 // Rn: Rn(19:16),
1821 // Rt: Rt(15:12),
1822 // W: W(21),
1823 // actual: Actual_LDRB_immediate_cccc010pu1w1nnnnttttiiiiiiiiiiii_case_1,
1824 // base: Rn,
1825 // baseline: LDRB_immediate_cccc010pu1w1nnnnttttiiiiiiiiiiii_case_0,
1826 // defs: {Rt, base
1827 // if wback
1828 // else None},
1829 // fields: [P(24), W(21), Rn(19:16), Rt(15:12)],
1830 // pattern: cccc010pu1w1nnnnttttiiiiiiiiiiii,
1831 // rule: LDRB_immediate,
1832 // safety: [Rn ==
1833 // Pc => DECODER_ERROR,
1834 // P(24)=0 &&
1835 // W(21)=1 => DECODER_ERROR,
1836 // Rt ==
1837 // Pc => UNPREDICTABLE,
1838 // wback &&
1839 // Rn ==
1840 // Rt => UNPREDICTABLE],
1841 // small_imm_base_wb: wback,
1842 // uses: {Rn},
1843 // violations: [implied by 'base'],
1844 // wback: P(24)=0 ||
1845 // W(21)=1}
TEST_F(Arm32DecoderStateTests,LDRB_immediate_cccc010pu1w1nnnnttttiiiiiiiiiiii_case_0Tester_Case8_TestCase8)1846 TEST_F(Arm32DecoderStateTests,
1847 LDRB_immediate_cccc010pu1w1nnnnttttiiiiiiiiiiii_case_0Tester_Case8_TestCase8) {
1848 LDRB_immediate_cccc010pu1w1nnnnttttiiiiiiiiiiii_case_0Tester_Case8 baseline_tester;
1849 NamedActual_LDRB_immediate_cccc010pu1w1nnnnttttiiiiiiiiiiii_case_1_LDRB_immediate actual;
1850 ActualVsBaselineTester a_vs_b_tester(actual, baseline_tester);
1851 a_vs_b_tester.Test("cccc010pu1w1nnnnttttiiiiiiiiiiii");
1852 }
1853
1854 // A(25)=0 & op1(24:20)=xx1x1 & Rn(19:16)=1111 & op1_repeated(24:20)=~0x111 & $pattern(31:0)=xxxxxxx1xx0xxxxxxxxxxxxxxxxxxxxx
1855 // = {Pc: 15,
1856 // Rt: Rt(15:12),
1857 // actual: Actual_LDRB_literal_cccc0101u1011111ttttiiiiiiiiiiii_case_1,
1858 // base: Pc,
1859 // baseline: LDRB_literal_cccc0101u1011111ttttiiiiiiiiiiii_case_0,
1860 // defs: {Rt},
1861 // fields: [Rt(15:12)],
1862 // is_literal_load: true,
1863 // pattern: cccc0101u1011111ttttiiiiiiiiiiii,
1864 // rule: LDRB_literal,
1865 // safety: [Rt ==
1866 // Pc => UNPREDICTABLE],
1867 // true: true,
1868 // uses: {Pc},
1869 // violations: [implied by 'base']}
TEST_F(Arm32DecoderStateTests,LDRB_literal_cccc0101u1011111ttttiiiiiiiiiiii_case_0Tester_Case9_TestCase9)1870 TEST_F(Arm32DecoderStateTests,
1871 LDRB_literal_cccc0101u1011111ttttiiiiiiiiiiii_case_0Tester_Case9_TestCase9) {
1872 LDRB_literal_cccc0101u1011111ttttiiiiiiiiiiii_case_0Tester_Case9 baseline_tester;
1873 NamedActual_LDRB_literal_cccc0101u1011111ttttiiiiiiiiiiii_case_1_LDRB_literal actual;
1874 ActualVsBaselineTester a_vs_b_tester(actual, baseline_tester);
1875 a_vs_b_tester.Test("cccc0101u1011111ttttiiiiiiiiiiii");
1876 }
1877
1878 // A(25)=1 & op1(24:20)=0x010 & B(4)=0
1879 // = {actual: Actual_BLX_immediate_1111101hiiiiiiiiiiiiiiiiiiiiiiii_case_1,
1880 // baseline: STRT_A2_cccc0110u010nnnnttttiiiiitt0mmmm_case_0,
1881 // defs: {},
1882 // pattern: cccc0110u010nnnnttttiiiiitt0mmmm,
1883 // rule: STRT_A2,
1884 // safety: [true => FORBIDDEN],
1885 // true: true,
1886 // uses: {}}
TEST_F(Arm32DecoderStateTests,STRT_A2_cccc0110u010nnnnttttiiiiitt0mmmm_case_0Tester_Case10_TestCase10)1887 TEST_F(Arm32DecoderStateTests,
1888 STRT_A2_cccc0110u010nnnnttttiiiiitt0mmmm_case_0Tester_Case10_TestCase10) {
1889 STRT_A2_cccc0110u010nnnnttttiiiiitt0mmmm_case_0Tester_Case10 baseline_tester;
1890 NamedActual_BLX_immediate_1111101hiiiiiiiiiiiiiiiiiiiiiiii_case_1_STRT_A2 actual;
1891 ActualVsBaselineTester a_vs_b_tester(actual, baseline_tester);
1892 a_vs_b_tester.Test("cccc0110u010nnnnttttiiiiitt0mmmm");
1893 }
1894
1895 // A(25)=1 & op1(24:20)=0x011 & B(4)=0
1896 // = {actual: Actual_BLX_immediate_1111101hiiiiiiiiiiiiiiiiiiiiiiii_case_1,
1897 // baseline: LDRT_A2_cccc0110u011nnnnttttiiiiitt0mmmm_case_0,
1898 // defs: {},
1899 // pattern: cccc0110u011nnnnttttiiiiitt0mmmm,
1900 // rule: LDRT_A2,
1901 // safety: [true => FORBIDDEN],
1902 // true: true,
1903 // uses: {}}
TEST_F(Arm32DecoderStateTests,LDRT_A2_cccc0110u011nnnnttttiiiiitt0mmmm_case_0Tester_Case11_TestCase11)1904 TEST_F(Arm32DecoderStateTests,
1905 LDRT_A2_cccc0110u011nnnnttttiiiiitt0mmmm_case_0Tester_Case11_TestCase11) {
1906 LDRT_A2_cccc0110u011nnnnttttiiiiitt0mmmm_case_0Tester_Case11 baseline_tester;
1907 NamedActual_BLX_immediate_1111101hiiiiiiiiiiiiiiiiiiiiiiii_case_1_LDRT_A2 actual;
1908 ActualVsBaselineTester a_vs_b_tester(actual, baseline_tester);
1909 a_vs_b_tester.Test("cccc0110u011nnnnttttiiiiitt0mmmm");
1910 }
1911
1912 // A(25)=1 & op1(24:20)=0x110 & B(4)=0
1913 // = {actual: Actual_BLX_immediate_1111101hiiiiiiiiiiiiiiiiiiiiiiii_case_1,
1914 // baseline: STRBT_A2_cccc0110u110nnnnttttiiiiitt0mmmm_case_0,
1915 // defs: {},
1916 // pattern: cccc0110u110nnnnttttiiiiitt0mmmm,
1917 // rule: STRBT_A2,
1918 // safety: [true => FORBIDDEN],
1919 // true: true,
1920 // uses: {}}
TEST_F(Arm32DecoderStateTests,STRBT_A2_cccc0110u110nnnnttttiiiiitt0mmmm_case_0Tester_Case12_TestCase12)1921 TEST_F(Arm32DecoderStateTests,
1922 STRBT_A2_cccc0110u110nnnnttttiiiiitt0mmmm_case_0Tester_Case12_TestCase12) {
1923 STRBT_A2_cccc0110u110nnnnttttiiiiitt0mmmm_case_0Tester_Case12 baseline_tester;
1924 NamedActual_BLX_immediate_1111101hiiiiiiiiiiiiiiiiiiiiiiii_case_1_STRBT_A2 actual;
1925 ActualVsBaselineTester a_vs_b_tester(actual, baseline_tester);
1926 a_vs_b_tester.Test("cccc0110u110nnnnttttiiiiitt0mmmm");
1927 }
1928
1929 // A(25)=1 & op1(24:20)=0x111 & B(4)=0
1930 // = {actual: Actual_BLX_immediate_1111101hiiiiiiiiiiiiiiiiiiiiiiii_case_1,
1931 // baseline: LDRBT_A2_cccc0110u111nnnnttttiiiiitt0mmmm_case_0,
1932 // defs: {},
1933 // pattern: cccc0110u111nnnnttttiiiiitt0mmmm,
1934 // rule: LDRBT_A2,
1935 // safety: [true => FORBIDDEN],
1936 // true: true,
1937 // uses: {}}
TEST_F(Arm32DecoderStateTests,LDRBT_A2_cccc0110u111nnnnttttiiiiitt0mmmm_case_0Tester_Case13_TestCase13)1938 TEST_F(Arm32DecoderStateTests,
1939 LDRBT_A2_cccc0110u111nnnnttttiiiiitt0mmmm_case_0Tester_Case13_TestCase13) {
1940 LDRBT_A2_cccc0110u111nnnnttttiiiiitt0mmmm_case_0Tester_Case13 baseline_tester;
1941 NamedActual_BLX_immediate_1111101hiiiiiiiiiiiiiiiiiiiiiiii_case_1_LDRBT_A2 actual;
1942 ActualVsBaselineTester a_vs_b_tester(actual, baseline_tester);
1943 a_vs_b_tester.Test("cccc0110u111nnnnttttiiiiitt0mmmm");
1944 }
1945
1946 // A(25)=1 & op1(24:20)=xx0x0 & B(4)=0 & op1_repeated(24:20)=~0x010
1947 // = {None: 32,
1948 // P: P(24),
1949 // Pc: 15,
1950 // Rm: Rm(3:0),
1951 // Rn: Rn(19:16),
1952 // Rt: Rt(15:12),
1953 // W: W(21),
1954 // actual: Actual_STR_register_cccc011pd0w0nnnnttttiiiiitt0mmmm_case_1,
1955 // base: Rn,
1956 // baseline: STR_register_cccc011pd0w0nnnnttttiiiiitt0mmmm_case_0,
1957 // defs: {base
1958 // if wback
1959 // else None},
1960 // fields: [P(24), W(21), Rn(19:16), Rt(15:12), Rm(3:0)],
1961 // index: P(24)=1,
1962 // pattern: cccc011pd0w0nnnnttttiiiiitt0mmmm,
1963 // rule: STR_register,
1964 // safety: [P(24)=0 &&
1965 // W(21)=1 => DECODER_ERROR,
1966 // Rm ==
1967 // Pc => UNPREDICTABLE,
1968 // wback &&
1969 // (Rn ==
1970 // Pc ||
1971 // Rn ==
1972 // Rt) => UNPREDICTABLE,
1973 // ArchVersion() <
1974 // 6 &&
1975 // wback &&
1976 // Rn ==
1977 // Rm => UNPREDICTABLE,
1978 // index => FORBIDDEN],
1979 // uses: {Rm, Rn, Rt},
1980 // violations: [implied by 'base'],
1981 // wback: P(24)=0 ||
1982 // W(21)=1}
TEST_F(Arm32DecoderStateTests,STR_register_cccc011pd0w0nnnnttttiiiiitt0mmmm_case_0Tester_Case14_TestCase14)1983 TEST_F(Arm32DecoderStateTests,
1984 STR_register_cccc011pd0w0nnnnttttiiiiitt0mmmm_case_0Tester_Case14_TestCase14) {
1985 STR_register_cccc011pd0w0nnnnttttiiiiitt0mmmm_case_0Tester_Case14 baseline_tester;
1986 NamedActual_STR_register_cccc011pd0w0nnnnttttiiiiitt0mmmm_case_1_STR_register actual;
1987 ActualVsBaselineTester a_vs_b_tester(actual, baseline_tester);
1988 a_vs_b_tester.Test("cccc011pd0w0nnnnttttiiiiitt0mmmm");
1989 }
1990
1991 // A(25)=1 & op1(24:20)=xx0x1 & B(4)=0 & op1_repeated(24:20)=~0x011
1992 // = {None: 32,
1993 // P: P(24),
1994 // Pc: 15,
1995 // Rm: Rm(3:0),
1996 // Rn: Rn(19:16),
1997 // Rt: Rt(15:12),
1998 // W: W(21),
1999 // actual: Actual_LDR_register_cccc011pu0w1nnnnttttiiiiitt0mmmm_case_1,
2000 // base: Rn,
2001 // baseline: LDR_register_cccc011pu0w1nnnnttttiiiiitt0mmmm_case_0,
2002 // defs: {Rt, base
2003 // if wback
2004 // else None},
2005 // fields: [P(24), W(21), Rn(19:16), Rt(15:12), Rm(3:0)],
2006 // index: P(24)=1,
2007 // pattern: cccc011pu0w1nnnnttttiiiiitt0mmmm,
2008 // rule: LDR_register,
2009 // safety: [P(24)=0 &&
2010 // W(21)=1 => DECODER_ERROR,
2011 // Rm ==
2012 // Pc => UNPREDICTABLE,
2013 // wback &&
2014 // (Rn ==
2015 // Pc ||
2016 // Rn ==
2017 // Rt) => UNPREDICTABLE,
2018 // ArchVersion() <
2019 // 6 &&
2020 // wback &&
2021 // Rn ==
2022 // Rm => UNPREDICTABLE,
2023 // index => FORBIDDEN,
2024 // Rt ==
2025 // Pc => FORBIDDEN_OPERANDS],
2026 // uses: {Rm, Rn},
2027 // violations: [implied by 'base'],
2028 // wback: P(24)=0 ||
2029 // W(21)=1}
TEST_F(Arm32DecoderStateTests,LDR_register_cccc011pu0w1nnnnttttiiiiitt0mmmm_case_0Tester_Case15_TestCase15)2030 TEST_F(Arm32DecoderStateTests,
2031 LDR_register_cccc011pu0w1nnnnttttiiiiitt0mmmm_case_0Tester_Case15_TestCase15) {
2032 LDR_register_cccc011pu0w1nnnnttttiiiiitt0mmmm_case_0Tester_Case15 baseline_tester;
2033 NamedActual_LDR_register_cccc011pu0w1nnnnttttiiiiitt0mmmm_case_1_LDR_register actual;
2034 ActualVsBaselineTester a_vs_b_tester(actual, baseline_tester);
2035 a_vs_b_tester.Test("cccc011pu0w1nnnnttttiiiiitt0mmmm");
2036 }
2037
2038 // A(25)=1 & op1(24:20)=xx1x0 & B(4)=0 & op1_repeated(24:20)=~0x110
2039 // = {None: 32,
2040 // P: P(24),
2041 // Pc: 15,
2042 // Rm: Rm(3:0),
2043 // Rn: Rn(19:16),
2044 // Rt: Rt(15:12),
2045 // W: W(21),
2046 // actual: Actual_STRB_register_cccc011pu1w0nnnnttttiiiiitt0mmmm_case_1,
2047 // base: Rn,
2048 // baseline: STRB_register_cccc011pu1w0nnnnttttiiiiitt0mmmm_case_0,
2049 // defs: {base
2050 // if wback
2051 // else None},
2052 // fields: [P(24), W(21), Rn(19:16), Rt(15:12), Rm(3:0)],
2053 // index: P(24)=1,
2054 // pattern: cccc011pu1w0nnnnttttiiiiitt0mmmm,
2055 // rule: STRB_register,
2056 // safety: [P(24)=0 &&
2057 // W(21)=1 => DECODER_ERROR,
2058 // Pc in {Rm, Rt} => UNPREDICTABLE,
2059 // wback &&
2060 // (Rn ==
2061 // Pc ||
2062 // Rn ==
2063 // Rt) => UNPREDICTABLE,
2064 // ArchVersion() <
2065 // 6 &&
2066 // wback &&
2067 // Rn ==
2068 // Rm => UNPREDICTABLE,
2069 // index => FORBIDDEN],
2070 // uses: {Rm, Rn, Rt},
2071 // violations: [implied by 'base'],
2072 // wback: P(24)=0 ||
2073 // W(21)=1}
TEST_F(Arm32DecoderStateTests,STRB_register_cccc011pu1w0nnnnttttiiiiitt0mmmm_case_0Tester_Case16_TestCase16)2074 TEST_F(Arm32DecoderStateTests,
2075 STRB_register_cccc011pu1w0nnnnttttiiiiitt0mmmm_case_0Tester_Case16_TestCase16) {
2076 STRB_register_cccc011pu1w0nnnnttttiiiiitt0mmmm_case_0Tester_Case16 baseline_tester;
2077 NamedActual_STRB_register_cccc011pu1w0nnnnttttiiiiitt0mmmm_case_1_STRB_register actual;
2078 ActualVsBaselineTester a_vs_b_tester(actual, baseline_tester);
2079 a_vs_b_tester.Test("cccc011pu1w0nnnnttttiiiiitt0mmmm");
2080 }
2081
2082 // A(25)=1 & op1(24:20)=xx1x1 & B(4)=0 & op1_repeated(24:20)=~0x111
2083 // = {None: 32,
2084 // P: P(24),
2085 // Pc: 15,
2086 // Rm: Rm(3:0),
2087 // Rn: Rn(19:16),
2088 // Rt: Rt(15:12),
2089 // W: W(21),
2090 // actual: Actual_LDRB_register_cccc011pu1w1nnnnttttiiiiitt0mmmm_case_1,
2091 // base: Rn,
2092 // baseline: LDRB_register_cccc011pu1w1nnnnttttiiiiitt0mmmm_case_0,
2093 // defs: {Rt, base
2094 // if wback
2095 // else None},
2096 // fields: [P(24), W(21), Rn(19:16), Rt(15:12), Rm(3:0)],
2097 // index: P(24)=1,
2098 // pattern: cccc011pu1w1nnnnttttiiiiitt0mmmm,
2099 // rule: LDRB_register,
2100 // safety: [P(24)=0 &&
2101 // W(21)=1 => DECODER_ERROR,
2102 // Pc in {Rt, Rm} => UNPREDICTABLE,
2103 // wback &&
2104 // (Rn ==
2105 // Pc ||
2106 // Rn ==
2107 // Rt) => UNPREDICTABLE,
2108 // ArchVersion() <
2109 // 6 &&
2110 // wback &&
2111 // Rn ==
2112 // Rm => UNPREDICTABLE,
2113 // index => FORBIDDEN],
2114 // uses: {Rm, Rn},
2115 // violations: [implied by 'base'],
2116 // wback: P(24)=0 ||
2117 // W(21)=1}
TEST_F(Arm32DecoderStateTests,LDRB_register_cccc011pu1w1nnnnttttiiiiitt0mmmm_case_0Tester_Case17_TestCase17)2118 TEST_F(Arm32DecoderStateTests,
2119 LDRB_register_cccc011pu1w1nnnnttttiiiiitt0mmmm_case_0Tester_Case17_TestCase17) {
2120 LDRB_register_cccc011pu1w1nnnnttttiiiiitt0mmmm_case_0Tester_Case17 baseline_tester;
2121 NamedActual_LDRB_register_cccc011pu1w1nnnnttttiiiiitt0mmmm_case_1_LDRB_register actual;
2122 ActualVsBaselineTester a_vs_b_tester(actual, baseline_tester);
2123 a_vs_b_tester.Test("cccc011pu1w1nnnnttttiiiiitt0mmmm");
2124 }
2125
2126 } // namespace nacl_arm_test
2127
main(int argc,char * argv[])2128 int main(int argc, char* argv[]) {
2129 testing::InitGoogleTest(&argc, argv);
2130 return RUN_ALL_TESTS();
2131 }
2132