1 // REQUIRES: aarch64-registered-target
2 // RUN: %clang_cc1 -triple aarch64-none-linux-gnu -target-feature +sve -fallow-half-arguments-and-returns -S -O1 -Werror -Wall -emit-llvm -o - %s | FileCheck %s
3 // RUN: %clang_cc1 -triple aarch64-none-linux-gnu -target-feature +sve -fallow-half-arguments-and-returns -S -O1 -Werror -o - %s >/dev/null 2>%t
4 // RUN: FileCheck --check-prefix=ASM --allow-empty %s <%t
5
6 // If this check fails please read test/CodeGen/aarch64-sve-intrinsics/README for instructions on how to resolve it.
7 // ASM-NOT: warning
8 #include <arm_sve.h>
9
test_svindex_s8(int8_t base,int8_t step)10 svint8_t test_svindex_s8(int8_t base, int8_t step)
11 {
12 // CHECK-LABEL: test_svindex_s8
13 // CHECK: %[[INTRINSIC:.*]] = call <vscale x 16 x i8> @llvm.aarch64.sve.index.nxv16i8(i8 %base, i8 %step)
14 // CHECK: ret <vscale x 16 x i8> %[[INTRINSIC]]
15 return svindex_s8(base, step);
16 }
17
test_svindex_s16(int16_t base,int16_t step)18 svint16_t test_svindex_s16(int16_t base, int16_t step)
19 {
20 // CHECK-LABEL: test_svindex_s16
21 // CHECK: %[[INTRINSIC:.*]] = call <vscale x 8 x i16> @llvm.aarch64.sve.index.nxv8i16(i16 %base, i16 %step)
22 // CHECK: ret <vscale x 8 x i16> %[[INTRINSIC]]
23 return svindex_s16(base, step);
24 }
25
test_svindex_s32(int32_t base,int32_t step)26 svint32_t test_svindex_s32(int32_t base, int32_t step)
27 {
28 // CHECK-LABEL: test_svindex_s32
29 // CHECK: %[[INTRINSIC:.*]] = call <vscale x 4 x i32> @llvm.aarch64.sve.index.nxv4i32(i32 %base, i32 %step)
30 // CHECK: ret <vscale x 4 x i32> %[[INTRINSIC]]
31 return svindex_s32(base, step);
32 }
33
test_svindex_s64(int64_t base,int64_t step)34 svint64_t test_svindex_s64(int64_t base, int64_t step)
35 {
36 // CHECK-LABEL: test_svindex_s64
37 // CHECK: %[[INTRINSIC:.*]] = call <vscale x 2 x i64> @llvm.aarch64.sve.index.nxv2i64(i64 %base, i64 %step)
38 // CHECK: ret <vscale x 2 x i64> %[[INTRINSIC]]
39 return svindex_s64(base, step);
40 }
41
test_svindex_u8(uint8_t base,uint8_t step)42 svuint8_t test_svindex_u8(uint8_t base, uint8_t step)
43 {
44 // CHECK-LABEL: test_svindex_u8
45 // CHECK: %[[INTRINSIC:.*]] = call <vscale x 16 x i8> @llvm.aarch64.sve.index.nxv16i8(i8 %base, i8 %step)
46 // CHECK: ret <vscale x 16 x i8> %[[INTRINSIC]]
47 return svindex_u8(base, step);
48 }
49
test_svindex_u16(uint16_t base,uint16_t step)50 svuint16_t test_svindex_u16(uint16_t base, uint16_t step)
51 {
52 // CHECK-LABEL: test_svindex_u16
53 // CHECK: %[[INTRINSIC:.*]] = call <vscale x 8 x i16> @llvm.aarch64.sve.index.nxv8i16(i16 %base, i16 %step)
54 // CHECK: ret <vscale x 8 x i16> %[[INTRINSIC]]
55 return svindex_u16(base, step);
56 }
57
test_svindex_u32(uint32_t base,uint32_t step)58 svuint32_t test_svindex_u32(uint32_t base, uint32_t step)
59 {
60 // CHECK-LABEL: test_svindex_u32
61 // CHECK: %[[INTRINSIC:.*]] = call <vscale x 4 x i32> @llvm.aarch64.sve.index.nxv4i32(i32 %base, i32 %step)
62 // CHECK: ret <vscale x 4 x i32> %[[INTRINSIC]]
63 return svindex_u32(base, step);
64 }
65
test_svindex_u64(uint64_t base,uint64_t step)66 svuint64_t test_svindex_u64(uint64_t base, uint64_t step)
67 {
68 // CHECK-LABEL: test_svindex_u64
69 // CHECK: %[[INTRINSIC:.*]] = call <vscale x 2 x i64> @llvm.aarch64.sve.index.nxv2i64(i64 %base, i64 %step)
70 // CHECK: ret <vscale x 2 x i64> %[[INTRINSIC]]
71 return svindex_u64(base, step);
72 }
73