1 // REQUIRES: aarch64-registered-target
2 // RUN: %clang_cc1 -triple aarch64-none-linux-gnu -target-feature +sve -fallow-half-arguments-and-returns -S -O1 -Werror -Wall -emit-llvm -o - %s | FileCheck %s
3 // RUN: %clang_cc1 -DSVE_OVERLOADED_FORMS -triple aarch64-none-linux-gnu -target-feature +sve -fallow-half-arguments-and-returns -S -O1 -Werror -Wall -emit-llvm -o - %s | FileCheck %s
4 // RUN: %clang_cc1 -triple aarch64-none-linux-gnu -target-feature +sve -fallow-half-arguments-and-returns -S -O1 -Werror -Wall -o - %s >/dev/null 2>%t
5 // RUN: FileCheck --check-prefix=ASM --allow-empty %s <%t
6
7 // If this check fails please read test/CodeGen/aarch64-sve-intrinsics/README for instructions on how to resolve it.
8 // ASM-NOT: warning
9 #include <arm_sve.h>
10
11 #ifdef SVE_OVERLOADED_FORMS
12 // A simple used,unused... macro, long enough to represent any SVE builtin.
13 #define SVE_ACLE_FUNC(A1,A2_UNUSED,A3,A4_UNUSED) A1##A3
14 #else
15 #define SVE_ACLE_FUNC(A1,A2,A3,A4) A1##A2##A3##A4
16 #endif
17
test_svlsr_u8_z(svbool_t pg,svuint8_t op1,svuint8_t op2)18 svuint8_t test_svlsr_u8_z(svbool_t pg, svuint8_t op1, svuint8_t op2)
19 {
20 // CHECK-LABEL: test_svlsr_u8_z
21 // CHECK: %[[SEL:.*]] = call <vscale x 16 x i8> @llvm.aarch64.sve.sel.nxv16i8(<vscale x 16 x i1> %pg, <vscale x 16 x i8> %op1, <vscale x 16 x i8> zeroinitializer)
22 // CHECK: %[[INTRINSIC:.*]] = call <vscale x 16 x i8> @llvm.aarch64.sve.lsr.nxv16i8(<vscale x 16 x i1> %pg, <vscale x 16 x i8> %[[SEL]], <vscale x 16 x i8> %op2)
23 // CHECK: ret <vscale x 16 x i8> %[[INTRINSIC]]
24 return SVE_ACLE_FUNC(svlsr,_u8,_z,)(pg, op1, op2);
25 }
26
test_svlsr_u16_z(svbool_t pg,svuint16_t op1,svuint16_t op2)27 svuint16_t test_svlsr_u16_z(svbool_t pg, svuint16_t op1, svuint16_t op2)
28 {
29 // CHECK-LABEL: test_svlsr_u16_z
30 // CHECK-DAG: %[[PG:.*]] = call <vscale x 8 x i1> @llvm.aarch64.sve.convert.from.svbool.nxv8i1(<vscale x 16 x i1> %pg)
31 // CHECK-DAG: %[[SEL:.*]] = call <vscale x 8 x i16> @llvm.aarch64.sve.sel.nxv8i16(<vscale x 8 x i1> %[[PG]], <vscale x 8 x i16> %op1, <vscale x 8 x i16> zeroinitializer)
32 // CHECK: %[[INTRINSIC:.*]] = call <vscale x 8 x i16> @llvm.aarch64.sve.lsr.nxv8i16(<vscale x 8 x i1> %[[PG]], <vscale x 8 x i16> %[[SEL]], <vscale x 8 x i16> %op2)
33 // CHECK: ret <vscale x 8 x i16> %[[INTRINSIC]]
34 return SVE_ACLE_FUNC(svlsr,_u16,_z,)(pg, op1, op2);
35 }
36
test_svlsr_u32_z(svbool_t pg,svuint32_t op1,svuint32_t op2)37 svuint32_t test_svlsr_u32_z(svbool_t pg, svuint32_t op1, svuint32_t op2)
38 {
39 // CHECK-LABEL: test_svlsr_u32_z
40 // CHECK-DAG: %[[PG:.*]] = call <vscale x 4 x i1> @llvm.aarch64.sve.convert.from.svbool.nxv4i1(<vscale x 16 x i1> %pg)
41 // CHECK-DAG: %[[SEL:.*]] = call <vscale x 4 x i32> @llvm.aarch64.sve.sel.nxv4i32(<vscale x 4 x i1> %[[PG]], <vscale x 4 x i32> %op1, <vscale x 4 x i32> zeroinitializer)
42 // CHECK: %[[INTRINSIC:.*]] = call <vscale x 4 x i32> @llvm.aarch64.sve.lsr.nxv4i32(<vscale x 4 x i1> %[[PG]], <vscale x 4 x i32> %[[SEL]], <vscale x 4 x i32> %op2)
43 // CHECK: ret <vscale x 4 x i32> %[[INTRINSIC]]
44 return SVE_ACLE_FUNC(svlsr,_u32,_z,)(pg, op1, op2);
45 }
46
test_svlsr_u64_z(svbool_t pg,svuint64_t op1,svuint64_t op2)47 svuint64_t test_svlsr_u64_z(svbool_t pg, svuint64_t op1, svuint64_t op2)
48 {
49 // CHECK-LABEL: test_svlsr_u64_z
50 // CHECK-DAG: %[[PG:.*]] = call <vscale x 2 x i1> @llvm.aarch64.sve.convert.from.svbool.nxv2i1(<vscale x 16 x i1> %pg)
51 // CHECK-DAG: %[[SEL:.*]] = call <vscale x 2 x i64> @llvm.aarch64.sve.sel.nxv2i64(<vscale x 2 x i1> %[[PG]], <vscale x 2 x i64> %op1, <vscale x 2 x i64> zeroinitializer)
52 // CHECK: %[[INTRINSIC:.*]] = call <vscale x 2 x i64> @llvm.aarch64.sve.lsr.nxv2i64(<vscale x 2 x i1> %[[PG]], <vscale x 2 x i64> %[[SEL]], <vscale x 2 x i64> %op2)
53 // CHECK: ret <vscale x 2 x i64> %[[INTRINSIC]]
54 return SVE_ACLE_FUNC(svlsr,_u64,_z,)(pg, op1, op2);
55 }
56
test_svlsr_u8_m(svbool_t pg,svuint8_t op1,svuint8_t op2)57 svuint8_t test_svlsr_u8_m(svbool_t pg, svuint8_t op1, svuint8_t op2)
58 {
59 // CHECK-LABEL: test_svlsr_u8_m
60 // CHECK: %[[INTRINSIC:.*]] = call <vscale x 16 x i8> @llvm.aarch64.sve.lsr.nxv16i8(<vscale x 16 x i1> %pg, <vscale x 16 x i8> %op1, <vscale x 16 x i8> %op2)
61 // CHECK: ret <vscale x 16 x i8> %[[INTRINSIC]]
62 return SVE_ACLE_FUNC(svlsr,_u8,_m,)(pg, op1, op2);
63 }
64
test_svlsr_u16_m(svbool_t pg,svuint16_t op1,svuint16_t op2)65 svuint16_t test_svlsr_u16_m(svbool_t pg, svuint16_t op1, svuint16_t op2)
66 {
67 // CHECK-LABEL: test_svlsr_u16_m
68 // CHECK: %[[PG:.*]] = call <vscale x 8 x i1> @llvm.aarch64.sve.convert.from.svbool.nxv8i1(<vscale x 16 x i1> %pg)
69 // CHECK: %[[INTRINSIC:.*]] = call <vscale x 8 x i16> @llvm.aarch64.sve.lsr.nxv8i16(<vscale x 8 x i1> %[[PG]], <vscale x 8 x i16> %op1, <vscale x 8 x i16> %op2)
70 // CHECK: ret <vscale x 8 x i16> %[[INTRINSIC]]
71 return SVE_ACLE_FUNC(svlsr,_u16,_m,)(pg, op1, op2);
72 }
73
test_svlsr_u32_m(svbool_t pg,svuint32_t op1,svuint32_t op2)74 svuint32_t test_svlsr_u32_m(svbool_t pg, svuint32_t op1, svuint32_t op2)
75 {
76 // CHECK-LABEL: test_svlsr_u32_m
77 // CHECK: %[[PG:.*]] = call <vscale x 4 x i1> @llvm.aarch64.sve.convert.from.svbool.nxv4i1(<vscale x 16 x i1> %pg)
78 // CHECK: %[[INTRINSIC:.*]] = call <vscale x 4 x i32> @llvm.aarch64.sve.lsr.nxv4i32(<vscale x 4 x i1> %[[PG]], <vscale x 4 x i32> %op1, <vscale x 4 x i32> %op2)
79 // CHECK: ret <vscale x 4 x i32> %[[INTRINSIC]]
80 return SVE_ACLE_FUNC(svlsr,_u32,_m,)(pg, op1, op2);
81 }
82
test_svlsr_u64_m(svbool_t pg,svuint64_t op1,svuint64_t op2)83 svuint64_t test_svlsr_u64_m(svbool_t pg, svuint64_t op1, svuint64_t op2)
84 {
85 // CHECK-LABEL: test_svlsr_u64_m
86 // CHECK: %[[PG:.*]] = call <vscale x 2 x i1> @llvm.aarch64.sve.convert.from.svbool.nxv2i1(<vscale x 16 x i1> %pg)
87 // CHECK: %[[INTRINSIC:.*]] = call <vscale x 2 x i64> @llvm.aarch64.sve.lsr.nxv2i64(<vscale x 2 x i1> %[[PG]], <vscale x 2 x i64> %op1, <vscale x 2 x i64> %op2)
88 // CHECK: ret <vscale x 2 x i64> %[[INTRINSIC]]
89 return SVE_ACLE_FUNC(svlsr,_u64,_m,)(pg, op1, op2);
90 }
91
test_svlsr_u8_x(svbool_t pg,svuint8_t op1,svuint8_t op2)92 svuint8_t test_svlsr_u8_x(svbool_t pg, svuint8_t op1, svuint8_t op2)
93 {
94 // CHECK-LABEL: test_svlsr_u8_x
95 // CHECK: %[[INTRINSIC:.*]] = call <vscale x 16 x i8> @llvm.aarch64.sve.lsr.nxv16i8(<vscale x 16 x i1> %pg, <vscale x 16 x i8> %op1, <vscale x 16 x i8> %op2)
96 // CHECK: ret <vscale x 16 x i8> %[[INTRINSIC]]
97 return SVE_ACLE_FUNC(svlsr,_u8,_x,)(pg, op1, op2);
98 }
99
test_svlsr_u16_x(svbool_t pg,svuint16_t op1,svuint16_t op2)100 svuint16_t test_svlsr_u16_x(svbool_t pg, svuint16_t op1, svuint16_t op2)
101 {
102 // CHECK-LABEL: test_svlsr_u16_x
103 // CHECK: %[[PG:.*]] = call <vscale x 8 x i1> @llvm.aarch64.sve.convert.from.svbool.nxv8i1(<vscale x 16 x i1> %pg)
104 // CHECK: %[[INTRINSIC:.*]] = call <vscale x 8 x i16> @llvm.aarch64.sve.lsr.nxv8i16(<vscale x 8 x i1> %[[PG]], <vscale x 8 x i16> %op1, <vscale x 8 x i16> %op2)
105 // CHECK: ret <vscale x 8 x i16> %[[INTRINSIC]]
106 return SVE_ACLE_FUNC(svlsr,_u16,_x,)(pg, op1, op2);
107 }
108
test_svlsr_u32_x(svbool_t pg,svuint32_t op1,svuint32_t op2)109 svuint32_t test_svlsr_u32_x(svbool_t pg, svuint32_t op1, svuint32_t op2)
110 {
111 // CHECK-LABEL: test_svlsr_u32_x
112 // CHECK: %[[PG:.*]] = call <vscale x 4 x i1> @llvm.aarch64.sve.convert.from.svbool.nxv4i1(<vscale x 16 x i1> %pg)
113 // CHECK: %[[INTRINSIC:.*]] = call <vscale x 4 x i32> @llvm.aarch64.sve.lsr.nxv4i32(<vscale x 4 x i1> %[[PG]], <vscale x 4 x i32> %op1, <vscale x 4 x i32> %op2)
114 // CHECK: ret <vscale x 4 x i32> %[[INTRINSIC]]
115 return SVE_ACLE_FUNC(svlsr,_u32,_x,)(pg, op1, op2);
116 }
117
test_svlsr_u64_x(svbool_t pg,svuint64_t op1,svuint64_t op2)118 svuint64_t test_svlsr_u64_x(svbool_t pg, svuint64_t op1, svuint64_t op2)
119 {
120 // CHECK-LABEL: test_svlsr_u64_x
121 // CHECK: %[[PG:.*]] = call <vscale x 2 x i1> @llvm.aarch64.sve.convert.from.svbool.nxv2i1(<vscale x 16 x i1> %pg)
122 // CHECK: %[[INTRINSIC:.*]] = call <vscale x 2 x i64> @llvm.aarch64.sve.lsr.nxv2i64(<vscale x 2 x i1> %[[PG]], <vscale x 2 x i64> %op1, <vscale x 2 x i64> %op2)
123 // CHECK: ret <vscale x 2 x i64> %[[INTRINSIC]]
124 return SVE_ACLE_FUNC(svlsr,_u64,_x,)(pg, op1, op2);
125 }
126
test_svlsr_wide_u8_z(svbool_t pg,svuint8_t op1,svuint64_t op2)127 svuint8_t test_svlsr_wide_u8_z(svbool_t pg, svuint8_t op1, svuint64_t op2)
128 {
129 // CHECK-LABEL: test_svlsr_wide_u8_z
130 // CHECK: %[[SEL:.*]] = call <vscale x 16 x i8> @llvm.aarch64.sve.sel.nxv16i8(<vscale x 16 x i1> %pg, <vscale x 16 x i8> %op1, <vscale x 16 x i8> zeroinitializer)
131 // CHECK: %[[INTRINSIC:.*]] = call <vscale x 16 x i8> @llvm.aarch64.sve.lsr.wide.nxv16i8(<vscale x 16 x i1> %pg, <vscale x 16 x i8> %[[SEL]], <vscale x 2 x i64> %op2)
132 // CHECK: ret <vscale x 16 x i8> %[[INTRINSIC]]
133 return SVE_ACLE_FUNC(svlsr_wide,_u8,_z,)(pg, op1, op2);
134 }
135
test_svlsr_wide_u16_z(svbool_t pg,svuint16_t op1,svuint64_t op2)136 svuint16_t test_svlsr_wide_u16_z(svbool_t pg, svuint16_t op1, svuint64_t op2)
137 {
138 // CHECK-LABEL: test_svlsr_wide_u16_z
139 // CHECK-DAG: %[[PG:.*]] = call <vscale x 8 x i1> @llvm.aarch64.sve.convert.from.svbool.nxv8i1(<vscale x 16 x i1> %pg)
140 // CHECK-DAG: %[[SEL:.*]] = call <vscale x 8 x i16> @llvm.aarch64.sve.sel.nxv8i16(<vscale x 8 x i1> %[[PG]], <vscale x 8 x i16> %op1, <vscale x 8 x i16> zeroinitializer)
141 // CHECK: %[[INTRINSIC:.*]] = call <vscale x 8 x i16> @llvm.aarch64.sve.lsr.wide.nxv8i16(<vscale x 8 x i1> %[[PG]], <vscale x 8 x i16> %[[SEL]], <vscale x 2 x i64> %op2)
142 // CHECK: ret <vscale x 8 x i16> %[[INTRINSIC]]
143 return SVE_ACLE_FUNC(svlsr_wide,_u16,_z,)(pg, op1, op2);
144 }
145
test_svlsr_wide_u32_z(svbool_t pg,svuint32_t op1,svuint64_t op2)146 svuint32_t test_svlsr_wide_u32_z(svbool_t pg, svuint32_t op1, svuint64_t op2)
147 {
148 // CHECK-LABEL: test_svlsr_wide_u32_z
149 // CHECK-DAG: %[[PG:.*]] = call <vscale x 4 x i1> @llvm.aarch64.sve.convert.from.svbool.nxv4i1(<vscale x 16 x i1> %pg)
150 // CHECK-DAG: %[[SEL:.*]] = call <vscale x 4 x i32> @llvm.aarch64.sve.sel.nxv4i32(<vscale x 4 x i1> %[[PG]], <vscale x 4 x i32> %op1, <vscale x 4 x i32> zeroinitializer)
151 // CHECK: %[[INTRINSIC:.*]] = call <vscale x 4 x i32> @llvm.aarch64.sve.lsr.wide.nxv4i32(<vscale x 4 x i1> %[[PG]], <vscale x 4 x i32> %[[SEL]], <vscale x 2 x i64> %op2)
152 // CHECK: ret <vscale x 4 x i32> %[[INTRINSIC]]
153 return SVE_ACLE_FUNC(svlsr_wide,_u32,_z,)(pg, op1, op2);
154 }
155
test_svlsr_wide_u8_m(svbool_t pg,svuint8_t op1,svuint64_t op2)156 svuint8_t test_svlsr_wide_u8_m(svbool_t pg, svuint8_t op1, svuint64_t op2)
157 {
158 // CHECK-LABEL: test_svlsr_wide_u8_m
159 // CHECK: %[[INTRINSIC:.*]] = call <vscale x 16 x i8> @llvm.aarch64.sve.lsr.wide.nxv16i8(<vscale x 16 x i1> %pg, <vscale x 16 x i8> %op1, <vscale x 2 x i64> %op2)
160 // CHECK: ret <vscale x 16 x i8> %[[INTRINSIC]]
161 return SVE_ACLE_FUNC(svlsr_wide,_u8,_m,)(pg, op1, op2);
162 }
163
test_svlsr_wide_u16_m(svbool_t pg,svuint16_t op1,svuint64_t op2)164 svuint16_t test_svlsr_wide_u16_m(svbool_t pg, svuint16_t op1, svuint64_t op2)
165 {
166 // CHECK-LABEL: test_svlsr_wide_u16_m
167 // CHECK: %[[PG:.*]] = call <vscale x 8 x i1> @llvm.aarch64.sve.convert.from.svbool.nxv8i1(<vscale x 16 x i1> %pg)
168 // CHECK: %[[INTRINSIC:.*]] = call <vscale x 8 x i16> @llvm.aarch64.sve.lsr.wide.nxv8i16(<vscale x 8 x i1> %[[PG]], <vscale x 8 x i16> %op1, <vscale x 2 x i64> %op2)
169 // CHECK: ret <vscale x 8 x i16> %[[INTRINSIC]]
170 return SVE_ACLE_FUNC(svlsr_wide,_u16,_m,)(pg, op1, op2);
171 }
172
test_svlsr_wide_u32_m(svbool_t pg,svuint32_t op1,svuint64_t op2)173 svuint32_t test_svlsr_wide_u32_m(svbool_t pg, svuint32_t op1, svuint64_t op2)
174 {
175 // CHECK-LABEL: test_svlsr_wide_u32_m
176 // CHECK: %[[PG:.*]] = call <vscale x 4 x i1> @llvm.aarch64.sve.convert.from.svbool.nxv4i1(<vscale x 16 x i1> %pg)
177 // CHECK: %[[INTRINSIC:.*]] = call <vscale x 4 x i32> @llvm.aarch64.sve.lsr.wide.nxv4i32(<vscale x 4 x i1> %[[PG]], <vscale x 4 x i32> %op1, <vscale x 2 x i64> %op2)
178 // CHECK: ret <vscale x 4 x i32> %[[INTRINSIC]]
179 return SVE_ACLE_FUNC(svlsr_wide,_u32,_m,)(pg, op1, op2);
180 }
181
test_svlsr_wide_u8_x(svbool_t pg,svuint8_t op1,svuint64_t op2)182 svuint8_t test_svlsr_wide_u8_x(svbool_t pg, svuint8_t op1, svuint64_t op2)
183 {
184 // CHECK-LABEL: test_svlsr_wide_u8_x
185 // CHECK: %[[INTRINSIC:.*]] = call <vscale x 16 x i8> @llvm.aarch64.sve.lsr.wide.nxv16i8(<vscale x 16 x i1> %pg, <vscale x 16 x i8> %op1, <vscale x 2 x i64> %op2)
186 // CHECK: ret <vscale x 16 x i8> %[[INTRINSIC]]
187 return SVE_ACLE_FUNC(svlsr_wide,_u8,_x,)(pg, op1, op2);
188 }
189
test_svlsr_wide_u16_x(svbool_t pg,svuint16_t op1,svuint64_t op2)190 svuint16_t test_svlsr_wide_u16_x(svbool_t pg, svuint16_t op1, svuint64_t op2)
191 {
192 // CHECK-LABEL: test_svlsr_wide_u16_x
193 // CHECK: %[[PG:.*]] = call <vscale x 8 x i1> @llvm.aarch64.sve.convert.from.svbool.nxv8i1(<vscale x 16 x i1> %pg)
194 // CHECK: %[[INTRINSIC:.*]] = call <vscale x 8 x i16> @llvm.aarch64.sve.lsr.wide.nxv8i16(<vscale x 8 x i1> %[[PG]], <vscale x 8 x i16> %op1, <vscale x 2 x i64> %op2)
195 // CHECK: ret <vscale x 8 x i16> %[[INTRINSIC]]
196 return SVE_ACLE_FUNC(svlsr_wide,_u16,_x,)(pg, op1, op2);
197 }
198
test_svlsr_wide_u32_x(svbool_t pg,svuint32_t op1,svuint64_t op2)199 svuint32_t test_svlsr_wide_u32_x(svbool_t pg, svuint32_t op1, svuint64_t op2)
200 {
201 // CHECK-LABEL: test_svlsr_wide_u32_x
202 // CHECK: %[[PG:.*]] = call <vscale x 4 x i1> @llvm.aarch64.sve.convert.from.svbool.nxv4i1(<vscale x 16 x i1> %pg)
203 // CHECK: %[[INTRINSIC:.*]] = call <vscale x 4 x i32> @llvm.aarch64.sve.lsr.wide.nxv4i32(<vscale x 4 x i1> %[[PG]], <vscale x 4 x i32> %op1, <vscale x 2 x i64> %op2)
204 // CHECK: ret <vscale x 4 x i32> %[[INTRINSIC]]
205 return SVE_ACLE_FUNC(svlsr_wide,_u32,_x,)(pg, op1, op2);
206 }
207
test_svlsr_wide_n_u8_m(svbool_t pg,svuint8_t op1,uint64_t op2)208 svuint8_t test_svlsr_wide_n_u8_m(svbool_t pg, svuint8_t op1, uint64_t op2)
209 {
210 // CHECK-LABEL: test_svlsr_wide_n_u8_m
211 // CHECK: %[[DUP:.*]] = call <vscale x 2 x i64> @llvm.aarch64.sve.dup.x.nxv2i64(i64 %op2)
212 // CHECK: %[[INTRINSIC:.*]] = call <vscale x 16 x i8> @llvm.aarch64.sve.lsr.wide.nxv16i8(<vscale x 16 x i1> %pg, <vscale x 16 x i8> %op1, <vscale x 2 x i64> %[[DUP]])
213 // CHECK: ret <vscale x 16 x i8> %[[INTRINSIC]]
214 return SVE_ACLE_FUNC(svlsr_wide,_n_u8,_m,)(pg, op1, op2);
215 }
216
test_svlsr_wide_n_u16_m(svbool_t pg,svuint16_t op1,uint64_t op2)217 svuint16_t test_svlsr_wide_n_u16_m(svbool_t pg, svuint16_t op1, uint64_t op2)
218 {
219 // CHECK-LABEL: test_svlsr_wide_n_u16_m
220 // CHECK-DAG: %[[PG:.*]] = call <vscale x 8 x i1> @llvm.aarch64.sve.convert.from.svbool.nxv8i1(<vscale x 16 x i1> %pg)
221 // CHECK-DAG: %[[DUP:.*]] = call <vscale x 2 x i64> @llvm.aarch64.sve.dup.x.nxv2i64(i64 %op2)
222 // CHECK: %[[INTRINSIC:.*]] = call <vscale x 8 x i16> @llvm.aarch64.sve.lsr.wide.nxv8i16(<vscale x 8 x i1> %[[PG]], <vscale x 8 x i16> %op1, <vscale x 2 x i64> %[[DUP]])
223 // CHECK: ret <vscale x 8 x i16> %[[INTRINSIC]]
224 return SVE_ACLE_FUNC(svlsr_wide,_n_u16,_m,)(pg, op1, op2);
225 }
226
test_svlsr_wide_n_u32_m(svbool_t pg,svuint32_t op1,uint64_t op2)227 svuint32_t test_svlsr_wide_n_u32_m(svbool_t pg, svuint32_t op1, uint64_t op2)
228 {
229 // CHECK-LABEL: test_svlsr_wide_n_u32_m
230 // CHECK-DAG: %[[PG:.*]] = call <vscale x 4 x i1> @llvm.aarch64.sve.convert.from.svbool.nxv4i1(<vscale x 16 x i1> %pg)
231 // CHECK-DAG: %[[DUP:.*]] = call <vscale x 2 x i64> @llvm.aarch64.sve.dup.x.nxv2i64(i64 %op2)
232 // CHECK: %[[INTRINSIC:.*]] = call <vscale x 4 x i32> @llvm.aarch64.sve.lsr.wide.nxv4i32(<vscale x 4 x i1> %[[PG]], <vscale x 4 x i32> %op1, <vscale x 2 x i64> %[[DUP]])
233 // CHECK: ret <vscale x 4 x i32> %[[INTRINSIC]]
234 return SVE_ACLE_FUNC(svlsr_wide,_n_u32,_m,)(pg, op1, op2);
235 }
236
test_svlsr_wide_n_u8_z(svbool_t pg,svuint8_t op1,uint64_t op2)237 svuint8_t test_svlsr_wide_n_u8_z(svbool_t pg, svuint8_t op1, uint64_t op2)
238 {
239 // CHECK-LABEL: test_svlsr_wide_n_u8_z
240 // CHECK-DAG: %[[DUP:.*]] = call <vscale x 2 x i64> @llvm.aarch64.sve.dup.x.nxv2i64(i64 %op2)
241 // CHECK-DAG: %[[PG:.*]] = call <vscale x 16 x i8> @llvm.aarch64.sve.sel.nxv16i8(<vscale x 16 x i1> %pg, <vscale x 16 x i8> %op1, <vscale x 16 x i8> zeroinitializer)
242 // CHECK: %[[INTRINSIC:.*]] = call <vscale x 16 x i8> @llvm.aarch64.sve.lsr.wide.nxv16i8(<vscale x 16 x i1> %pg, <vscale x 16 x i8> %[[PG]], <vscale x 2 x i64> %[[DUP]])
243 // CHECK: ret <vscale x 16 x i8> %[[INTRINSIC]]
244 return SVE_ACLE_FUNC(svlsr_wide,_n_u8,_z,)(pg, op1, op2);
245 }
246
test_svlsr_wide_n_u16_z(svbool_t pg,svuint16_t op1,uint64_t op2)247 svuint16_t test_svlsr_wide_n_u16_z(svbool_t pg, svuint16_t op1, uint64_t op2)
248 {
249 // CHECK-LABEL: test_svlsr_wide_n_u16_z
250 // CHECK-DAG: %[[PG:.*]] = call <vscale x 8 x i1> @llvm.aarch64.sve.convert.from.svbool.nxv8i1(<vscale x 16 x i1> %pg)
251 // CHECK-DAG: %[[DUP:.*]] = call <vscale x 2 x i64> @llvm.aarch64.sve.dup.x.nxv2i64(i64 %op2)
252 // CHECK-DAG: %[[OP:.*]] = call <vscale x 8 x i16> @llvm.aarch64.sve.sel.nxv8i16(<vscale x 8 x i1> %[[PG]], <vscale x 8 x i16> %op1, <vscale x 8 x i16> zeroinitializer)
253 // CHECK: %[[INTRINSIC:.*]] = call <vscale x 8 x i16> @llvm.aarch64.sve.lsr.wide.nxv8i16(<vscale x 8 x i1> %[[PG]], <vscale x 8 x i16> %[[OP]], <vscale x 2 x i64> %[[DUP]])
254 // CHECK: ret <vscale x 8 x i16> %[[INTRINSIC]]
255 return SVE_ACLE_FUNC(svlsr_wide,_n_u16,_z,)(pg, op1, op2);
256 }
257
test_svlsr_wide_n_u32_z(svbool_t pg,svuint32_t op1,uint64_t op2)258 svuint32_t test_svlsr_wide_n_u32_z(svbool_t pg, svuint32_t op1, uint64_t op2)
259 {
260 // CHECK-LABEL: test_svlsr_wide_n_u32_z
261 // CHECK-DAG: %[[PG:.*]] = call <vscale x 4 x i1> @llvm.aarch64.sve.convert.from.svbool.nxv4i1(<vscale x 16 x i1> %pg)
262 // CHECK-DAG: %[[DUP:.*]] = call <vscale x 2 x i64> @llvm.aarch64.sve.dup.x.nxv2i64(i64 %op2)
263 // CHECK-DAG: %[[OP:.*]] = call <vscale x 4 x i32> @llvm.aarch64.sve.sel.nxv4i32(<vscale x 4 x i1> %[[PG]], <vscale x 4 x i32> %op1, <vscale x 4 x i32> zeroinitializer)
264 // CHECK: %[[INTRINSIC:.*]] = call <vscale x 4 x i32> @llvm.aarch64.sve.lsr.wide.nxv4i32(<vscale x 4 x i1> %[[PG]], <vscale x 4 x i32> %[[OP]], <vscale x 2 x i64> %[[DUP]])
265 // CHECK: ret <vscale x 4 x i32> %[[INTRINSIC]]
266 return SVE_ACLE_FUNC(svlsr_wide,_n_u32,_z,)(pg, op1, op2);
267 }
268
test_svlsr_wide_n_u8_x(svbool_t pg,svuint8_t op1,uint64_t op2)269 svuint8_t test_svlsr_wide_n_u8_x(svbool_t pg, svuint8_t op1, uint64_t op2)
270 {
271 // CHECK-LABEL: test_svlsr_wide_n_u8_x
272 // CHECK: %[[DUP:.*]] = call <vscale x 2 x i64> @llvm.aarch64.sve.dup.x.nxv2i64(i64 %op2)
273 // CHECK: %[[INTRINSIC:.*]] = call <vscale x 16 x i8> @llvm.aarch64.sve.lsr.wide.nxv16i8(<vscale x 16 x i1> %pg, <vscale x 16 x i8> %op1, <vscale x 2 x i64> %[[DUP]])
274 // CHECK: ret <vscale x 16 x i8> %[[INTRINSIC]]
275 return SVE_ACLE_FUNC(svlsr_wide,_n_u8,_x,)(pg, op1, op2);
276 }
277
test_svlsr_wide_n_u16_x(svbool_t pg,svuint16_t op1,uint64_t op2)278 svuint16_t test_svlsr_wide_n_u16_x(svbool_t pg, svuint16_t op1, uint64_t op2)
279 {
280 // CHECK-LABEL: test_svlsr_wide_n_u16_x
281 // CHECK-DAG: %[[PG:.*]] = call <vscale x 8 x i1> @llvm.aarch64.sve.convert.from.svbool.nxv8i1(<vscale x 16 x i1> %pg)
282 // CHECK-DAG: %[[DUP:.*]] = call <vscale x 2 x i64> @llvm.aarch64.sve.dup.x.nxv2i64(i64 %op2)
283 // CHECK: %[[INTRINSIC:.*]] = call <vscale x 8 x i16> @llvm.aarch64.sve.lsr.wide.nxv8i16(<vscale x 8 x i1> %[[PG]], <vscale x 8 x i16> %op1, <vscale x 2 x i64> %[[DUP]])
284 // CHECK: ret <vscale x 8 x i16> %[[INTRINSIC]]
285 return SVE_ACLE_FUNC(svlsr_wide,_n_u16,_x,)(pg, op1, op2);
286 }
287
test_svlsr_wide_n_u32_x(svbool_t pg,svuint32_t op1,uint64_t op2)288 svuint32_t test_svlsr_wide_n_u32_x(svbool_t pg, svuint32_t op1, uint64_t op2)
289 {
290 // CHECK-LABEL: test_svlsr_wide_n_u32_x
291 // CHECK-DAG: %[[PG:.*]] = call <vscale x 4 x i1> @llvm.aarch64.sve.convert.from.svbool.nxv4i1(<vscale x 16 x i1> %pg)
292 // CHECK-DAG: %[[DUP:.*]] = call <vscale x 2 x i64> @llvm.aarch64.sve.dup.x.nxv2i64(i64 %op2)
293 // CHECK: %[[INTRINSIC:.*]] = call <vscale x 4 x i32> @llvm.aarch64.sve.lsr.wide.nxv4i32(<vscale x 4 x i1> %[[PG]], <vscale x 4 x i32> %op1, <vscale x 2 x i64> %[[DUP]])
294 // CHECK: ret <vscale x 4 x i32> %[[INTRINSIC]]
295 return SVE_ACLE_FUNC(svlsr_wide,_n_u32,_x,)(pg, op1, op2);
296 }
297