1 // REQUIRES: aarch64-registered-target
2 // RUN: %clang_cc1 -triple aarch64-none-linux-gnu -target-feature +sve -fallow-half-arguments-and-returns -S -O1 -Werror -Wall -emit-llvm -o - %s | FileCheck %s
3 // RUN: %clang_cc1 -DSVE_OVERLOADED_FORMS -triple aarch64-none-linux-gnu -target-feature +sve -fallow-half-arguments-and-returns -S -O1 -Werror -Wall -emit-llvm -o - %s | FileCheck %s
4 // RUN: %clang_cc1 -triple aarch64-none-linux-gnu -target-feature +sve -fallow-half-arguments-and-returns -S -O1 -Werror -Wall -o - %s >/dev/null 2>%t
5 // RUN: FileCheck --check-prefix=ASM --allow-empty %s <%t
6
7 // If this check fails please read test/CodeGen/aarch64-sve-intrinsics/README for instructions on how to resolve it.
8 // ASM-NOT: warning
9 #include <arm_sve.h>
10
11 #ifdef SVE_OVERLOADED_FORMS
12 // A simple used,unused... macro, long enough to represent any SVE builtin.
13 #define SVE_ACLE_FUNC(A1,A2_UNUSED,A3,A4_UNUSED) A1##A3
14 #else
15 #define SVE_ACLE_FUNC(A1,A2,A3,A4) A1##A2##A3##A4
16 #endif
17
test_svmaxnm_f16_z(svbool_t pg,svfloat16_t op1,svfloat16_t op2)18 svfloat16_t test_svmaxnm_f16_z(svbool_t pg, svfloat16_t op1, svfloat16_t op2)
19 {
20 // CHECK-LABEL: test_svmaxnm_f16_z
21 // CHECK-DAG: %[[PG:.*]] = call <vscale x 8 x i1> @llvm.aarch64.sve.convert.from.svbool.nxv8i1(<vscale x 16 x i1> %pg)
22 // CHECK-DAG: %[[SEL:.*]] = call <vscale x 8 x half> @llvm.aarch64.sve.sel.nxv8f16(<vscale x 8 x i1> %[[PG]], <vscale x 8 x half> %op1, <vscale x 8 x half> zeroinitializer)
23 // CHECK: %[[INTRINSIC:.*]] = call <vscale x 8 x half> @llvm.aarch64.sve.fmaxnm.nxv8f16(<vscale x 8 x i1> %[[PG]], <vscale x 8 x half> %[[SEL]], <vscale x 8 x half> %op2)
24 // CHECK: ret <vscale x 8 x half> %[[INTRINSIC]]
25 return SVE_ACLE_FUNC(svmaxnm,_f16,_z,)(pg, op1, op2);
26 }
27
test_svmaxnm_f32_z(svbool_t pg,svfloat32_t op1,svfloat32_t op2)28 svfloat32_t test_svmaxnm_f32_z(svbool_t pg, svfloat32_t op1, svfloat32_t op2)
29 {
30 // CHECK-LABEL: test_svmaxnm_f32_z
31 // CHECK-DAG: %[[PG:.*]] = call <vscale x 4 x i1> @llvm.aarch64.sve.convert.from.svbool.nxv4i1(<vscale x 16 x i1> %pg)
32 // CHECK-DAG: %[[SEL:.*]] = call <vscale x 4 x float> @llvm.aarch64.sve.sel.nxv4f32(<vscale x 4 x i1> %[[PG]], <vscale x 4 x float> %op1, <vscale x 4 x float> zeroinitializer)
33 // CHECK: %[[INTRINSIC:.*]] = call <vscale x 4 x float> @llvm.aarch64.sve.fmaxnm.nxv4f32(<vscale x 4 x i1> %[[PG]], <vscale x 4 x float> %[[SEL]], <vscale x 4 x float> %op2)
34 // CHECK: ret <vscale x 4 x float> %[[INTRINSIC]]
35 return SVE_ACLE_FUNC(svmaxnm,_f32,_z,)(pg, op1, op2);
36 }
37
test_svmaxnm_f64_z(svbool_t pg,svfloat64_t op1,svfloat64_t op2)38 svfloat64_t test_svmaxnm_f64_z(svbool_t pg, svfloat64_t op1, svfloat64_t op2)
39 {
40 // CHECK-LABEL: test_svmaxnm_f64_z
41 // CHECK-DAG: %[[PG:.*]] = call <vscale x 2 x i1> @llvm.aarch64.sve.convert.from.svbool.nxv2i1(<vscale x 16 x i1> %pg)
42 // CHECK-DAG: %[[SEL:.*]] = call <vscale x 2 x double> @llvm.aarch64.sve.sel.nxv2f64(<vscale x 2 x i1> %[[PG]], <vscale x 2 x double> %op1, <vscale x 2 x double> zeroinitializer)
43 // CHECK: %[[INTRINSIC:.*]] = call <vscale x 2 x double> @llvm.aarch64.sve.fmaxnm.nxv2f64(<vscale x 2 x i1> %[[PG]], <vscale x 2 x double> %[[SEL]], <vscale x 2 x double> %op2)
44 // CHECK: ret <vscale x 2 x double> %[[INTRINSIC]]
45 return SVE_ACLE_FUNC(svmaxnm,_f64,_z,)(pg, op1, op2);
46 }
47
test_svmaxnm_f16_m(svbool_t pg,svfloat16_t op1,svfloat16_t op2)48 svfloat16_t test_svmaxnm_f16_m(svbool_t pg, svfloat16_t op1, svfloat16_t op2)
49 {
50 // CHECK-LABEL: test_svmaxnm_f16_m
51 // CHECK: %[[PG:.*]] = call <vscale x 8 x i1> @llvm.aarch64.sve.convert.from.svbool.nxv8i1(<vscale x 16 x i1> %pg)
52 // CHECK: %[[INTRINSIC:.*]] = call <vscale x 8 x half> @llvm.aarch64.sve.fmaxnm.nxv8f16(<vscale x 8 x i1> %[[PG]], <vscale x 8 x half> %op1, <vscale x 8 x half> %op2)
53 // CHECK: ret <vscale x 8 x half> %[[INTRINSIC]]
54 return SVE_ACLE_FUNC(svmaxnm,_f16,_m,)(pg, op1, op2);
55 }
56
test_svmaxnm_f32_m(svbool_t pg,svfloat32_t op1,svfloat32_t op2)57 svfloat32_t test_svmaxnm_f32_m(svbool_t pg, svfloat32_t op1, svfloat32_t op2)
58 {
59 // CHECK-LABEL: test_svmaxnm_f32_m
60 // CHECK: %[[PG:.*]] = call <vscale x 4 x i1> @llvm.aarch64.sve.convert.from.svbool.nxv4i1(<vscale x 16 x i1> %pg)
61 // CHECK: %[[INTRINSIC:.*]] = call <vscale x 4 x float> @llvm.aarch64.sve.fmaxnm.nxv4f32(<vscale x 4 x i1> %[[PG]], <vscale x 4 x float> %op1, <vscale x 4 x float> %op2)
62 // CHECK: ret <vscale x 4 x float> %[[INTRINSIC]]
63 return SVE_ACLE_FUNC(svmaxnm,_f32,_m,)(pg, op1, op2);
64 }
65
test_svmaxnm_f64_m(svbool_t pg,svfloat64_t op1,svfloat64_t op2)66 svfloat64_t test_svmaxnm_f64_m(svbool_t pg, svfloat64_t op1, svfloat64_t op2)
67 {
68 // CHECK-LABEL: test_svmaxnm_f64_m
69 // CHECK: %[[PG:.*]] = call <vscale x 2 x i1> @llvm.aarch64.sve.convert.from.svbool.nxv2i1(<vscale x 16 x i1> %pg)
70 // CHECK: %[[INTRINSIC:.*]] = call <vscale x 2 x double> @llvm.aarch64.sve.fmaxnm.nxv2f64(<vscale x 2 x i1> %[[PG]], <vscale x 2 x double> %op1, <vscale x 2 x double> %op2)
71 // CHECK: ret <vscale x 2 x double> %[[INTRINSIC]]
72 return SVE_ACLE_FUNC(svmaxnm,_f64,_m,)(pg, op1, op2);
73 }
74
test_svmaxnm_f16_x(svbool_t pg,svfloat16_t op1,svfloat16_t op2)75 svfloat16_t test_svmaxnm_f16_x(svbool_t pg, svfloat16_t op1, svfloat16_t op2)
76 {
77 // CHECK-LABEL: test_svmaxnm_f16_x
78 // CHECK: %[[PG:.*]] = call <vscale x 8 x i1> @llvm.aarch64.sve.convert.from.svbool.nxv8i1(<vscale x 16 x i1> %pg)
79 // CHECK: %[[INTRINSIC:.*]] = call <vscale x 8 x half> @llvm.aarch64.sve.fmaxnm.nxv8f16(<vscale x 8 x i1> %[[PG]], <vscale x 8 x half> %op1, <vscale x 8 x half> %op2)
80 // CHECK: ret <vscale x 8 x half> %[[INTRINSIC]]
81 return SVE_ACLE_FUNC(svmaxnm,_f16,_x,)(pg, op1, op2);
82 }
83
test_svmaxnm_f32_x(svbool_t pg,svfloat32_t op1,svfloat32_t op2)84 svfloat32_t test_svmaxnm_f32_x(svbool_t pg, svfloat32_t op1, svfloat32_t op2)
85 {
86 // CHECK-LABEL: test_svmaxnm_f32_x
87 // CHECK: %[[PG:.*]] = call <vscale x 4 x i1> @llvm.aarch64.sve.convert.from.svbool.nxv4i1(<vscale x 16 x i1> %pg)
88 // CHECK: %[[INTRINSIC:.*]] = call <vscale x 4 x float> @llvm.aarch64.sve.fmaxnm.nxv4f32(<vscale x 4 x i1> %[[PG]], <vscale x 4 x float> %op1, <vscale x 4 x float> %op2)
89 // CHECK: ret <vscale x 4 x float> %[[INTRINSIC]]
90 return SVE_ACLE_FUNC(svmaxnm,_f32,_x,)(pg, op1, op2);
91 }
92
test_svmaxnm_f64_x(svbool_t pg,svfloat64_t op1,svfloat64_t op2)93 svfloat64_t test_svmaxnm_f64_x(svbool_t pg, svfloat64_t op1, svfloat64_t op2)
94 {
95 // CHECK-LABEL: test_svmaxnm_f64_x
96 // CHECK: %[[PG:.*]] = call <vscale x 2 x i1> @llvm.aarch64.sve.convert.from.svbool.nxv2i1(<vscale x 16 x i1> %pg)
97 // CHECK: %[[INTRINSIC:.*]] = call <vscale x 2 x double> @llvm.aarch64.sve.fmaxnm.nxv2f64(<vscale x 2 x i1> %[[PG]], <vscale x 2 x double> %op1, <vscale x 2 x double> %op2)
98 // CHECK: ret <vscale x 2 x double> %[[INTRINSIC]]
99 return SVE_ACLE_FUNC(svmaxnm,_f64,_x,)(pg, op1, op2);
100 }
101
test_svmaxnm_n_f16_z(svbool_t pg,svfloat16_t op1,float16_t op2)102 svfloat16_t test_svmaxnm_n_f16_z(svbool_t pg, svfloat16_t op1, float16_t op2)
103 {
104 // CHECK-LABEL: test_svmaxnm_n_f16_z
105 // CHECK-DAG: %[[DUP:.*]] = call <vscale x 8 x half> @llvm.aarch64.sve.dup.x.nxv8f16(half %op2)
106 // CHECK-DAG: %[[SEL:.*]] = call <vscale x 8 x half> @llvm.aarch64.sve.sel.nxv8f16(<vscale x 8 x i1> %[[PG]], <vscale x 8 x half> %op1, <vscale x 8 x half> zeroinitializer)
107 // CHECK: %[[INTRINSIC:.*]] = call <vscale x 8 x half> @llvm.aarch64.sve.fmaxnm.nxv8f16(<vscale x 8 x i1> %[[PG]], <vscale x 8 x half> %[[SEL]], <vscale x 8 x half> %[[DUP]])
108 // CHECK: ret <vscale x 8 x half> %[[INTRINSIC]]
109 return SVE_ACLE_FUNC(svmaxnm,_n_f16,_z,)(pg, op1, op2);
110 }
111
test_svmaxnm_n_f32_z(svbool_t pg,svfloat32_t op1,float32_t op2)112 svfloat32_t test_svmaxnm_n_f32_z(svbool_t pg, svfloat32_t op1, float32_t op2)
113 {
114 // CHECK-LABEL: test_svmaxnm_n_f32_z
115 // CHECK-DAG: %[[PG:.*]] = call <vscale x 4 x i1> @llvm.aarch64.sve.convert.from.svbool.nxv4i1(<vscale x 16 x i1> %pg)
116 // CHECK-DAG: %[[DUP:.*]] = call <vscale x 4 x float> @llvm.aarch64.sve.dup.x.nxv4f32(float %op2)
117 // CHECK-DAG: %[[SEL:.*]] = call <vscale x 4 x float> @llvm.aarch64.sve.sel.nxv4f32(<vscale x 4 x i1> %[[PG]], <vscale x 4 x float> %op1, <vscale x 4 x float> zeroinitializer)
118 // CHECK: %[[INTRINSIC:.*]] = call <vscale x 4 x float> @llvm.aarch64.sve.fmaxnm.nxv4f32(<vscale x 4 x i1> %[[PG]], <vscale x 4 x float> %[[SEL]], <vscale x 4 x float> %[[DUP]])
119 // CHECK: ret <vscale x 4 x float> %[[INTRINSIC]]
120 return SVE_ACLE_FUNC(svmaxnm,_n_f32,_z,)(pg, op1, op2);
121 }
122
test_svmaxnm_n_f64_z(svbool_t pg,svfloat64_t op1,float64_t op2)123 svfloat64_t test_svmaxnm_n_f64_z(svbool_t pg, svfloat64_t op1, float64_t op2)
124 {
125 // CHECK-LABEL: test_svmaxnm_n_f64_z
126 // CHECK-DAG: %[[PG:.*]] = call <vscale x 2 x i1> @llvm.aarch64.sve.convert.from.svbool.nxv2i1(<vscale x 16 x i1> %pg)
127 // CHECK-DAG: %[[DUP:.*]] = call <vscale x 2 x double> @llvm.aarch64.sve.dup.x.nxv2f64(double %op2)
128 // CHECK-DAG: %[[SEL:.*]] = call <vscale x 2 x double> @llvm.aarch64.sve.sel.nxv2f64(<vscale x 2 x i1> %[[PG]], <vscale x 2 x double> %op1, <vscale x 2 x double> zeroinitializer)
129 // CHECK: %[[INTRINSIC:.*]] = call <vscale x 2 x double> @llvm.aarch64.sve.fmaxnm.nxv2f64(<vscale x 2 x i1> %[[PG]], <vscale x 2 x double> %[[SEL]], <vscale x 2 x double> %[[DUP]])
130 // CHECK: ret <vscale x 2 x double> %[[INTRINSIC]]
131 return SVE_ACLE_FUNC(svmaxnm,_n_f64,_z,)(pg, op1, op2);
132 }
133
test_svmaxnm_n_f16_m(svbool_t pg,svfloat16_t op1,float16_t op2)134 svfloat16_t test_svmaxnm_n_f16_m(svbool_t pg, svfloat16_t op1, float16_t op2)
135 {
136 // CHECK-LABEL: test_svmaxnm_n_f16_m
137 // CHECK-DAG: %[[PG:.*]] = call <vscale x 8 x i1> @llvm.aarch64.sve.convert.from.svbool.nxv8i1(<vscale x 16 x i1> %pg)
138 // CHECK-DAG: %[[DUP:.*]] = call <vscale x 8 x half> @llvm.aarch64.sve.dup.x.nxv8f16(half %op2)
139 // CHECK: %[[INTRINSIC:.*]] = call <vscale x 8 x half> @llvm.aarch64.sve.fmaxnm.nxv8f16(<vscale x 8 x i1> %[[PG]], <vscale x 8 x half> %op1, <vscale x 8 x half> %[[DUP]])
140 // CHECK: ret <vscale x 8 x half> %[[INTRINSIC]]
141 return SVE_ACLE_FUNC(svmaxnm,_n_f16,_m,)(pg, op1, op2);
142 }
143
test_svmaxnm_n_f32_m(svbool_t pg,svfloat32_t op1,float32_t op2)144 svfloat32_t test_svmaxnm_n_f32_m(svbool_t pg, svfloat32_t op1, float32_t op2)
145 {
146 // CHECK-LABEL: test_svmaxnm_n_f32_m
147 // CHECK-DAG: %[[PG:.*]] = call <vscale x 4 x i1> @llvm.aarch64.sve.convert.from.svbool.nxv4i1(<vscale x 16 x i1> %pg)
148 // CHECK-DAG: %[[DUP:.*]] = call <vscale x 4 x float> @llvm.aarch64.sve.dup.x.nxv4f32(float %op2)
149 // CHECK: %[[INTRINSIC:.*]] = call <vscale x 4 x float> @llvm.aarch64.sve.fmaxnm.nxv4f32(<vscale x 4 x i1> %[[PG]], <vscale x 4 x float> %op1, <vscale x 4 x float> %[[DUP]])
150 // CHECK: ret <vscale x 4 x float> %[[INTRINSIC]]
151 return SVE_ACLE_FUNC(svmaxnm,_n_f32,_m,)(pg, op1, op2);
152 }
153
test_svmaxnm_n_f64_m(svbool_t pg,svfloat64_t op1,float64_t op2)154 svfloat64_t test_svmaxnm_n_f64_m(svbool_t pg, svfloat64_t op1, float64_t op2)
155 {
156 // CHECK-LABEL: test_svmaxnm_n_f64_m
157 // CHECK-DAG: %[[PG:.*]] = call <vscale x 2 x i1> @llvm.aarch64.sve.convert.from.svbool.nxv2i1(<vscale x 16 x i1> %pg)
158 // CHECK-DAG: %[[DUP:.*]] = call <vscale x 2 x double> @llvm.aarch64.sve.dup.x.nxv2f64(double %op2)
159 // CHECK: %[[INTRINSIC:.*]] = call <vscale x 2 x double> @llvm.aarch64.sve.fmaxnm.nxv2f64(<vscale x 2 x i1> %[[PG]], <vscale x 2 x double> %op1, <vscale x 2 x double> %[[DUP]])
160 // CHECK: ret <vscale x 2 x double> %[[INTRINSIC]]
161 return SVE_ACLE_FUNC(svmaxnm,_n_f64,_m,)(pg, op1, op2);
162 }
163
test_svmaxnm_n_f16_x(svbool_t pg,svfloat16_t op1,float16_t op2)164 svfloat16_t test_svmaxnm_n_f16_x(svbool_t pg, svfloat16_t op1, float16_t op2)
165 {
166 // CHECK-LABEL: test_svmaxnm_n_f16_x
167 // CHECK-DAG: %[[PG:.*]] = call <vscale x 8 x i1> @llvm.aarch64.sve.convert.from.svbool.nxv8i1(<vscale x 16 x i1> %pg)
168 // CHECK-DAG: %[[DUP:.*]] = call <vscale x 8 x half> @llvm.aarch64.sve.dup.x.nxv8f16(half %op2)
169 // CHECK: %[[INTRINSIC:.*]] = call <vscale x 8 x half> @llvm.aarch64.sve.fmaxnm.nxv8f16(<vscale x 8 x i1> %[[PG]], <vscale x 8 x half> %op1, <vscale x 8 x half> %[[DUP]])
170 // CHECK: ret <vscale x 8 x half> %[[INTRINSIC]]
171 return SVE_ACLE_FUNC(svmaxnm,_n_f16,_x,)(pg, op1, op2);
172 }
173
test_svmaxnm_n_f32_x(svbool_t pg,svfloat32_t op1,float32_t op2)174 svfloat32_t test_svmaxnm_n_f32_x(svbool_t pg, svfloat32_t op1, float32_t op2)
175 {
176 // CHECK-LABEL: test_svmaxnm_n_f32_x
177 // CHECK-DAG: %[[PG:.*]] = call <vscale x 4 x i1> @llvm.aarch64.sve.convert.from.svbool.nxv4i1(<vscale x 16 x i1> %pg)
178 // CHECK-DAG: %[[DUP:.*]] = call <vscale x 4 x float> @llvm.aarch64.sve.dup.x.nxv4f32(float %op2)
179 // CHECK: %[[INTRINSIC:.*]] = call <vscale x 4 x float> @llvm.aarch64.sve.fmaxnm.nxv4f32(<vscale x 4 x i1> %[[PG]], <vscale x 4 x float> %op1, <vscale x 4 x float> %[[DUP]])
180 // CHECK: ret <vscale x 4 x float> %[[INTRINSIC]]
181 return SVE_ACLE_FUNC(svmaxnm,_n_f32,_x,)(pg, op1, op2);
182 }
183
test_svmaxnm_n_f64_x(svbool_t pg,svfloat64_t op1,float64_t op2)184 svfloat64_t test_svmaxnm_n_f64_x(svbool_t pg, svfloat64_t op1, float64_t op2)
185 {
186 // CHECK-LABEL: test_svmaxnm_n_f64_x
187 // CHECK-DAG: %[[PG:.*]] = call <vscale x 2 x i1> @llvm.aarch64.sve.convert.from.svbool.nxv2i1(<vscale x 16 x i1> %pg)
188 // CHECK-DAG: %[[DUP:.*]] = call <vscale x 2 x double> @llvm.aarch64.sve.dup.x.nxv2f64(double %op2)
189 // CHECK: %[[INTRINSIC:.*]] = call <vscale x 2 x double> @llvm.aarch64.sve.fmaxnm.nxv2f64(<vscale x 2 x i1> %[[PG]], <vscale x 2 x double> %op1, <vscale x 2 x double> %[[DUP]])
190 // CHECK: ret <vscale x 2 x double> %[[INTRINSIC]]
191 return SVE_ACLE_FUNC(svmaxnm,_n_f64,_x,)(pg, op1, op2);
192 }
193