1# NOTE: Assertions have been autogenerated by utils/update_mir_test_checks.py
2# RUN: llc -march=amdgcn -mcpu=fiji -run-pass=instruction-select -verify-machineinstrs -o - %s  | FileCheck -check-prefix=GFX8 %s
3# RUN: llc -march=amdgcn -mcpu=gfx900 -run-pass=instruction-select -verify-machineinstrs -o - %s  | FileCheck -check-prefix=GFX9 %s
4# RUN: llc -march=amdgcn -mcpu=gfx1010 -run-pass=instruction-select -verify-machineinstrs -o - %s  | FileCheck -check-prefix=GFX10 %s
5
6---
7
8name:            xor_s32_sgpr_sgpr_sgpr
9legalized:       true
10regBankSelected: true
11tracksRegLiveness: true
12
13body: |
14  bb.0:
15    liveins: $sgpr0, $sgpr1, $sgpr2
16    ; GFX8-LABEL: name: xor_s32_sgpr_sgpr_sgpr
17    ; GFX8: liveins: $sgpr0, $sgpr1, $sgpr2
18    ; GFX8: [[COPY:%[0-9]+]]:sreg_32 = COPY $sgpr0
19    ; GFX8: [[COPY1:%[0-9]+]]:sreg_32 = COPY $sgpr1
20    ; GFX8: [[COPY2:%[0-9]+]]:sreg_32 = COPY $sgpr2
21    ; GFX8: [[S_XOR_B32_:%[0-9]+]]:sreg_32 = S_XOR_B32 [[COPY]], [[COPY1]], implicit-def $scc
22    ; GFX8: [[S_XOR_B32_1:%[0-9]+]]:sreg_32 = S_XOR_B32 [[S_XOR_B32_]], [[COPY2]], implicit-def $scc
23    ; GFX8: S_ENDPGM 0, implicit [[S_XOR_B32_1]]
24    ; GFX9-LABEL: name: xor_s32_sgpr_sgpr_sgpr
25    ; GFX9: liveins: $sgpr0, $sgpr1, $sgpr2
26    ; GFX9: [[COPY:%[0-9]+]]:sreg_32 = COPY $sgpr0
27    ; GFX9: [[COPY1:%[0-9]+]]:sreg_32 = COPY $sgpr1
28    ; GFX9: [[COPY2:%[0-9]+]]:sreg_32 = COPY $sgpr2
29    ; GFX9: [[S_XOR_B32_:%[0-9]+]]:sreg_32 = S_XOR_B32 [[COPY]], [[COPY1]], implicit-def $scc
30    ; GFX9: [[S_XOR_B32_1:%[0-9]+]]:sreg_32 = S_XOR_B32 [[S_XOR_B32_]], [[COPY2]], implicit-def $scc
31    ; GFX9: S_ENDPGM 0, implicit [[S_XOR_B32_1]]
32    ; GFX10-LABEL: name: xor_s32_sgpr_sgpr_sgpr
33    ; GFX10: liveins: $sgpr0, $sgpr1, $sgpr2
34    ; GFX10: $vcc_hi = IMPLICIT_DEF
35    ; GFX10: [[COPY:%[0-9]+]]:sreg_32 = COPY $sgpr0
36    ; GFX10: [[COPY1:%[0-9]+]]:sreg_32 = COPY $sgpr1
37    ; GFX10: [[COPY2:%[0-9]+]]:sreg_32 = COPY $sgpr2
38    ; GFX10: [[S_XOR_B32_:%[0-9]+]]:sreg_32 = S_XOR_B32 [[COPY]], [[COPY1]], implicit-def $scc
39    ; GFX10: [[S_XOR_B32_1:%[0-9]+]]:sreg_32 = S_XOR_B32 [[S_XOR_B32_]], [[COPY2]], implicit-def $scc
40    ; GFX10: S_ENDPGM 0, implicit [[S_XOR_B32_1]]
41    %0:sgpr(s32) = COPY $sgpr0
42    %1:sgpr(s32) = COPY $sgpr1
43    %2:sgpr(s32) = COPY $sgpr2
44    %3:sgpr(s32) = G_XOR %0, %1
45    %4:sgpr(s32) = G_XOR %3, %2
46    S_ENDPGM 0, implicit %4
47...
48
49---
50
51name:            xor_s32_vgpr_vgpr_vgpr
52legalized:       true
53regBankSelected: true
54tracksRegLiveness: true
55
56body: |
57  bb.0:
58    liveins: $vgpr0, $vgpr1, $vgpr2
59    ; GFX8-LABEL: name: xor_s32_vgpr_vgpr_vgpr
60    ; GFX8: liveins: $vgpr0, $vgpr1, $vgpr2
61    ; GFX8: [[COPY:%[0-9]+]]:vgpr_32 = COPY $vgpr0
62    ; GFX8: [[COPY1:%[0-9]+]]:vgpr_32 = COPY $vgpr1
63    ; GFX8: [[COPY2:%[0-9]+]]:vgpr_32 = COPY $vgpr2
64    ; GFX8: [[V_XOR_B32_e64_:%[0-9]+]]:vgpr_32 = V_XOR_B32_e64 [[COPY]], [[COPY1]], implicit $exec
65    ; GFX8: [[V_XOR_B32_e64_1:%[0-9]+]]:vgpr_32 = V_XOR_B32_e64 [[V_XOR_B32_e64_]], [[COPY2]], implicit $exec
66    ; GFX8: S_ENDPGM 0, implicit [[V_XOR_B32_e64_1]]
67    ; GFX9-LABEL: name: xor_s32_vgpr_vgpr_vgpr
68    ; GFX9: liveins: $vgpr0, $vgpr1, $vgpr2
69    ; GFX9: [[COPY:%[0-9]+]]:vgpr_32 = COPY $vgpr0
70    ; GFX9: [[COPY1:%[0-9]+]]:vgpr_32 = COPY $vgpr1
71    ; GFX9: [[COPY2:%[0-9]+]]:vgpr_32 = COPY $vgpr2
72    ; GFX9: [[V_XOR_B32_e64_:%[0-9]+]]:vgpr_32 = V_XOR_B32_e64 [[COPY]], [[COPY1]], implicit $exec
73    ; GFX9: [[V_XOR_B32_e64_1:%[0-9]+]]:vgpr_32 = V_XOR_B32_e64 [[V_XOR_B32_e64_]], [[COPY2]], implicit $exec
74    ; GFX9: S_ENDPGM 0, implicit [[V_XOR_B32_e64_1]]
75    ; GFX10-LABEL: name: xor_s32_vgpr_vgpr_vgpr
76    ; GFX10: liveins: $vgpr0, $vgpr1, $vgpr2
77    ; GFX10: $vcc_hi = IMPLICIT_DEF
78    ; GFX10: [[COPY:%[0-9]+]]:vgpr_32 = COPY $vgpr0
79    ; GFX10: [[COPY1:%[0-9]+]]:vgpr_32 = COPY $vgpr1
80    ; GFX10: [[COPY2:%[0-9]+]]:vgpr_32 = COPY $vgpr2
81    ; GFX10: [[V_XOR3_B32_:%[0-9]+]]:vgpr_32 = V_XOR3_B32 [[COPY]], [[COPY1]], [[COPY2]], implicit $exec
82    ; GFX10: S_ENDPGM 0, implicit [[V_XOR3_B32_]]
83    %0:vgpr(s32) = COPY $vgpr0
84    %1:vgpr(s32) = COPY $vgpr1
85    %2:vgpr(s32) = COPY $vgpr2
86    %3:vgpr(s32) = G_XOR %0, %1
87    %4:vgpr(s32) = G_XOR %3, %2
88    S_ENDPGM 0, implicit %4
89...
90
91# Mixed SGPR and VGPR, with full copy from scalar xor to VGPR, as
92#should actually be produced by RegBankSelect
93
94---
95
96name:            xor_s32_sgpr_sgpr_vgpr_copy
97legalized:       true
98regBankSelected: true
99tracksRegLiveness: true
100
101body: |
102  bb.0:
103    liveins: $sgpr0, $sgpr1, $vgpr0
104
105    ; GFX8-LABEL: name: xor_s32_sgpr_sgpr_vgpr_copy
106    ; GFX8: liveins: $sgpr0, $sgpr1, $vgpr0
107    ; GFX8: [[COPY:%[0-9]+]]:sreg_32 = COPY $sgpr0
108    ; GFX8: [[COPY1:%[0-9]+]]:sreg_32 = COPY $sgpr1
109    ; GFX8: [[COPY2:%[0-9]+]]:vgpr_32 = COPY $vgpr0
110    ; GFX8: [[S_XOR_B32_:%[0-9]+]]:sreg_32 = S_XOR_B32 [[COPY]], [[COPY1]], implicit-def $scc
111    ; GFX8: [[COPY3:%[0-9]+]]:vgpr_32 = COPY [[S_XOR_B32_]]
112    ; GFX8: [[V_XOR_B32_e64_:%[0-9]+]]:vgpr_32 = V_XOR_B32_e64 [[COPY3]], [[COPY2]], implicit $exec
113    ; GFX8: S_ENDPGM 0, implicit [[V_XOR_B32_e64_]]
114    ; GFX9-LABEL: name: xor_s32_sgpr_sgpr_vgpr_copy
115    ; GFX9: liveins: $sgpr0, $sgpr1, $vgpr0
116    ; GFX9: [[COPY:%[0-9]+]]:sreg_32 = COPY $sgpr0
117    ; GFX9: [[COPY1:%[0-9]+]]:sreg_32 = COPY $sgpr1
118    ; GFX9: [[COPY2:%[0-9]+]]:vgpr_32 = COPY $vgpr0
119    ; GFX9: [[S_XOR_B32_:%[0-9]+]]:sreg_32 = S_XOR_B32 [[COPY]], [[COPY1]], implicit-def $scc
120    ; GFX9: [[COPY3:%[0-9]+]]:vgpr_32 = COPY [[S_XOR_B32_]]
121    ; GFX9: [[V_XOR_B32_e64_:%[0-9]+]]:vgpr_32 = V_XOR_B32_e64 [[COPY3]], [[COPY2]], implicit $exec
122    ; GFX9: S_ENDPGM 0, implicit [[V_XOR_B32_e64_]]
123    ; GFX10-LABEL: name: xor_s32_sgpr_sgpr_vgpr_copy
124    ; GFX10: liveins: $sgpr0, $sgpr1, $vgpr0
125    ; GFX10: $vcc_hi = IMPLICIT_DEF
126    ; GFX10: [[COPY:%[0-9]+]]:sreg_32 = COPY $sgpr0
127    ; GFX10: [[COPY1:%[0-9]+]]:sreg_32 = COPY $sgpr1
128    ; GFX10: [[COPY2:%[0-9]+]]:vgpr_32 = COPY $vgpr0
129    ; GFX10: [[S_XOR_B32_:%[0-9]+]]:sreg_32 = S_XOR_B32 [[COPY]], [[COPY1]], implicit-def $scc
130    ; GFX10: [[COPY3:%[0-9]+]]:vgpr_32 = COPY [[S_XOR_B32_]]
131    ; GFX10: [[V_XOR_B32_e64_:%[0-9]+]]:vgpr_32 = V_XOR_B32_e64 [[COPY3]], [[COPY2]], implicit $exec
132    ; GFX10: S_ENDPGM 0, implicit [[V_XOR_B32_e64_]]
133    %0:sgpr(s32) = COPY $sgpr0
134    %1:sgpr(s32) = COPY $sgpr1
135    %2:vgpr(s32) = COPY $vgpr0
136    %3:sgpr(s32) = G_XOR %0, %1
137    %4:vgpr(s32) = COPY %3
138    %5:vgpr(s32) = G_XOR %4, %2
139    S_ENDPGM 0, implicit %5
140...
141
142---
143
144name:            xor_s32_sgpr_sgpr_vgpr_copy_commute
145legalized:       true
146regBankSelected: true
147tracksRegLiveness: true
148
149body: |
150  bb.0:
151    liveins: $sgpr0, $sgpr1, $vgpr0
152
153    ; GFX8-LABEL: name: xor_s32_sgpr_sgpr_vgpr_copy_commute
154    ; GFX8: liveins: $sgpr0, $sgpr1, $vgpr0
155    ; GFX8: [[COPY:%[0-9]+]]:sreg_32 = COPY $sgpr0
156    ; GFX8: [[COPY1:%[0-9]+]]:sreg_32 = COPY $sgpr1
157    ; GFX8: [[COPY2:%[0-9]+]]:vgpr_32 = COPY $vgpr0
158    ; GFX8: [[S_XOR_B32_:%[0-9]+]]:sreg_32 = S_XOR_B32 [[COPY]], [[COPY1]], implicit-def $scc
159    ; GFX8: [[COPY3:%[0-9]+]]:vgpr_32 = COPY [[S_XOR_B32_]]
160    ; GFX8: [[V_XOR_B32_e64_:%[0-9]+]]:vgpr_32 = V_XOR_B32_e64 [[COPY2]], [[COPY3]], implicit $exec
161    ; GFX8: S_ENDPGM 0, implicit [[V_XOR_B32_e64_]]
162    ; GFX9-LABEL: name: xor_s32_sgpr_sgpr_vgpr_copy_commute
163    ; GFX9: liveins: $sgpr0, $sgpr1, $vgpr0
164    ; GFX9: [[COPY:%[0-9]+]]:sreg_32 = COPY $sgpr0
165    ; GFX9: [[COPY1:%[0-9]+]]:sreg_32 = COPY $sgpr1
166    ; GFX9: [[COPY2:%[0-9]+]]:vgpr_32 = COPY $vgpr0
167    ; GFX9: [[S_XOR_B32_:%[0-9]+]]:sreg_32 = S_XOR_B32 [[COPY]], [[COPY1]], implicit-def $scc
168    ; GFX9: [[COPY3:%[0-9]+]]:vgpr_32 = COPY [[S_XOR_B32_]]
169    ; GFX9: [[V_XOR_B32_e64_:%[0-9]+]]:vgpr_32 = V_XOR_B32_e64 [[COPY2]], [[COPY3]], implicit $exec
170    ; GFX9: S_ENDPGM 0, implicit [[V_XOR_B32_e64_]]
171    ; GFX10-LABEL: name: xor_s32_sgpr_sgpr_vgpr_copy_commute
172    ; GFX10: liveins: $sgpr0, $sgpr1, $vgpr0
173    ; GFX10: $vcc_hi = IMPLICIT_DEF
174    ; GFX10: [[COPY:%[0-9]+]]:sreg_32 = COPY $sgpr0
175    ; GFX10: [[COPY1:%[0-9]+]]:sreg_32 = COPY $sgpr1
176    ; GFX10: [[COPY2:%[0-9]+]]:vgpr_32 = COPY $vgpr0
177    ; GFX10: [[S_XOR_B32_:%[0-9]+]]:sreg_32 = S_XOR_B32 [[COPY]], [[COPY1]], implicit-def $scc
178    ; GFX10: [[COPY3:%[0-9]+]]:vgpr_32 = COPY [[S_XOR_B32_]]
179    ; GFX10: [[V_XOR_B32_e64_:%[0-9]+]]:vgpr_32 = V_XOR_B32_e64 [[COPY2]], [[COPY3]], implicit $exec
180    ; GFX10: S_ENDPGM 0, implicit [[V_XOR_B32_e64_]]
181    %0:sgpr(s32) = COPY $sgpr0
182    %1:sgpr(s32) = COPY $sgpr1
183    %2:vgpr(s32) = COPY $vgpr0
184    %3:sgpr(s32) = G_XOR %0, %1
185    %4:vgpr(s32) = COPY %3
186    %5:vgpr(s32) = G_XOR %2, %4
187    S_ENDPGM 0, implicit %5
188...
189
190---
191
192name:            xor_s32_sgpr_sgpr_vgpr
193legalized:       true
194regBankSelected: true
195tracksRegLiveness: true
196
197body: |
198  bb.0:
199    liveins: $sgpr0, $sgpr1, $vgpr0
200
201    ; GFX8-LABEL: name: xor_s32_sgpr_sgpr_vgpr
202    ; GFX8: liveins: $sgpr0, $sgpr1, $vgpr0
203    ; GFX8: [[COPY:%[0-9]+]]:sreg_32 = COPY $sgpr0
204    ; GFX8: [[COPY1:%[0-9]+]]:sreg_32 = COPY $sgpr1
205    ; GFX8: [[COPY2:%[0-9]+]]:vgpr_32 = COPY $vgpr0
206    ; GFX8: [[S_XOR_B32_:%[0-9]+]]:sreg_32 = S_XOR_B32 [[COPY]], [[COPY1]], implicit-def $scc
207    ; GFX8: [[V_XOR_B32_e64_:%[0-9]+]]:vgpr_32 = V_XOR_B32_e64 [[S_XOR_B32_]], [[COPY2]], implicit $exec
208    ; GFX8: S_ENDPGM 0, implicit [[V_XOR_B32_e64_]]
209    ; GFX9-LABEL: name: xor_s32_sgpr_sgpr_vgpr
210    ; GFX9: liveins: $sgpr0, $sgpr1, $vgpr0
211    ; GFX9: [[COPY:%[0-9]+]]:sreg_32 = COPY $sgpr0
212    ; GFX9: [[COPY1:%[0-9]+]]:sreg_32 = COPY $sgpr1
213    ; GFX9: [[COPY2:%[0-9]+]]:vgpr_32 = COPY $vgpr0
214    ; GFX9: [[S_XOR_B32_:%[0-9]+]]:sreg_32 = S_XOR_B32 [[COPY]], [[COPY1]], implicit-def $scc
215    ; GFX9: [[V_XOR_B32_e64_:%[0-9]+]]:vgpr_32 = V_XOR_B32_e64 [[S_XOR_B32_]], [[COPY2]], implicit $exec
216    ; GFX9: S_ENDPGM 0, implicit [[V_XOR_B32_e64_]]
217    ; GFX10-LABEL: name: xor_s32_sgpr_sgpr_vgpr
218    ; GFX10: liveins: $sgpr0, $sgpr1, $vgpr0
219    ; GFX10: $vcc_hi = IMPLICIT_DEF
220    ; GFX10: [[COPY:%[0-9]+]]:sreg_32 = COPY $sgpr0
221    ; GFX10: [[COPY1:%[0-9]+]]:sreg_32 = COPY $sgpr1
222    ; GFX10: [[COPY2:%[0-9]+]]:vgpr_32 = COPY $vgpr0
223    ; GFX10: [[V_XOR3_B32_:%[0-9]+]]:vgpr_32 = V_XOR3_B32 [[COPY]], [[COPY1]], [[COPY2]], implicit $exec
224    ; GFX10: S_ENDPGM 0, implicit [[V_XOR3_B32_]]
225    %0:sgpr(s32) = COPY $sgpr0
226    %1:sgpr(s32) = COPY $sgpr1
227    %2:vgpr(s32) = COPY $vgpr0
228    %3:sgpr(s32) = G_XOR %0, %1
229    %4:vgpr(s32) = G_XOR %3, %2
230    S_ENDPGM 0, implicit %4
231...
232