1# NOTE: Assertions have been autogenerated by utils/update_mir_test_checks.py
2# RUN: llc -mtriple=amdgcn-amd-amdhsa -mcpu=hawaii -run-pass=instruction-select -verify-machineinstrs %s -o - | FileCheck -check-prefix=WAVE64 %s
3# RUN: llc -mtriple=amdgcn-amd-amdhsa -mcpu=gfx1010 -run-pass=instruction-select -verify-machineinstrs %s -o - | FileCheck -check-prefix=WAVE32 %s
4
5---
6
7name:            sitofp
8legalized:       true
9regBankSelected: true
10
11body: |
12  bb.0:
13    liveins: $sgpr0, $vgpr0, $vgpr3_vgpr4
14
15    ; WAVE64-LABEL: name: sitofp
16    ; WAVE64: [[COPY:%[0-9]+]]:sreg_32 = COPY $sgpr0
17    ; WAVE64: [[COPY1:%[0-9]+]]:vgpr_32 = COPY $vgpr0
18    ; WAVE64: [[COPY2:%[0-9]+]]:vreg_64 = COPY $vgpr3_vgpr4
19    ; WAVE64: [[V_CVT_F32_I32_e64_:%[0-9]+]]:vgpr_32 = V_CVT_F32_I32_e64 [[COPY]], 0, 0, implicit $mode, implicit $exec
20    ; WAVE64: [[V_CVT_F32_I32_e64_1:%[0-9]+]]:vgpr_32 = V_CVT_F32_I32_e64 [[COPY1]], 0, 0, implicit $mode, implicit $exec
21    ; WAVE64: FLAT_STORE_DWORD [[COPY2]], [[V_CVT_F32_I32_e64_]], 0, 0, 0, 0, implicit $exec, implicit $flat_scr :: (store 4, addrspace 1)
22    ; WAVE64: FLAT_STORE_DWORD [[COPY2]], [[V_CVT_F32_I32_e64_1]], 0, 0, 0, 0, implicit $exec, implicit $flat_scr :: (store 4, addrspace 1)
23    ; WAVE32-LABEL: name: sitofp
24    ; WAVE32: $vcc_hi = IMPLICIT_DEF
25    ; WAVE32: [[COPY:%[0-9]+]]:sreg_32 = COPY $sgpr0
26    ; WAVE32: [[COPY1:%[0-9]+]]:vgpr_32 = COPY $vgpr0
27    ; WAVE32: [[COPY2:%[0-9]+]]:vreg_64 = COPY $vgpr3_vgpr4
28    ; WAVE32: [[V_CVT_F32_I32_e64_:%[0-9]+]]:vgpr_32 = V_CVT_F32_I32_e64 [[COPY]], 0, 0, implicit $mode, implicit $exec
29    ; WAVE32: [[V_CVT_F32_I32_e64_1:%[0-9]+]]:vgpr_32 = V_CVT_F32_I32_e64 [[COPY1]], 0, 0, implicit $mode, implicit $exec
30    ; WAVE32: GLOBAL_STORE_DWORD [[COPY2]], [[V_CVT_F32_I32_e64_]], 0, 0, 0, 0, implicit $exec :: (store 4, addrspace 1)
31    ; WAVE32: GLOBAL_STORE_DWORD [[COPY2]], [[V_CVT_F32_I32_e64_1]], 0, 0, 0, 0, implicit $exec :: (store 4, addrspace 1)
32    %0:sgpr(s32) = COPY $sgpr0
33
34    %1:vgpr(s32) = COPY $vgpr0
35
36    %2:vgpr(p1) = COPY $vgpr3_vgpr4
37
38    ; sitofp s
39    %3:vgpr(s32) = G_SITOFP %0
40
41    ; sitofp v
42    %4:vgpr(s32) = G_SITOFP %1
43
44    G_STORE %3, %2 :: (store 4, addrspace 1)
45    G_STORE %4, %2 :: (store 4, addrspace 1)
46...
47
48---
49name: sitofp_s32_to_s16_vv
50legalized: true
51regBankSelected: true
52tracksRegLiveness: true
53
54body: |
55  bb.0:
56    liveins: $vgpr0
57
58    ; WAVE64-LABEL: name: sitofp_s32_to_s16_vv
59    ; WAVE64: liveins: $vgpr0
60    ; WAVE64: [[COPY:%[0-9]+]]:vgpr_32 = COPY $vgpr0
61    ; WAVE64: [[V_CVT_F32_I32_e32_:%[0-9]+]]:vgpr_32 = V_CVT_F32_I32_e32 [[COPY]], implicit $mode, implicit $exec
62    ; WAVE64: %1:vgpr_32 = nofpexcept V_CVT_F16_F32_e32 [[V_CVT_F32_I32_e32_]], implicit $mode, implicit $exec
63    ; WAVE64: $vgpr0 = COPY %1
64    ; WAVE32-LABEL: name: sitofp_s32_to_s16_vv
65    ; WAVE32: liveins: $vgpr0
66    ; WAVE32: $vcc_hi = IMPLICIT_DEF
67    ; WAVE32: [[COPY:%[0-9]+]]:vgpr_32 = COPY $vgpr0
68    ; WAVE32: [[V_CVT_F32_I32_e32_:%[0-9]+]]:vgpr_32 = V_CVT_F32_I32_e32 [[COPY]], implicit $mode, implicit $exec
69    ; WAVE32: %1:vgpr_32 = nofpexcept V_CVT_F16_F32_e32 [[V_CVT_F32_I32_e32_]], implicit $mode, implicit $exec
70    ; WAVE32: $vgpr0 = COPY %1
71    %0:vgpr(s32) = COPY $vgpr0
72    %1:vgpr(s16) = G_SITOFP %0
73    %2:vgpr(s32) = G_ANYEXT %1
74    $vgpr0 = COPY %2
75...
76
77---
78name: sitofp_s32_to_s16_vs
79legalized: true
80regBankSelected: true
81tracksRegLiveness: true
82
83body: |
84  bb.0:
85    liveins: $sgpr0
86
87    ; WAVE64-LABEL: name: sitofp_s32_to_s16_vs
88    ; WAVE64: liveins: $sgpr0
89    ; WAVE64: [[COPY:%[0-9]+]]:sreg_32 = COPY $sgpr0
90    ; WAVE64: [[V_CVT_F32_I32_e32_:%[0-9]+]]:vgpr_32 = V_CVT_F32_I32_e32 [[COPY]], implicit $mode, implicit $exec
91    ; WAVE64: %1:vgpr_32 = nofpexcept V_CVT_F16_F32_e32 [[V_CVT_F32_I32_e32_]], implicit $mode, implicit $exec
92    ; WAVE64: $vgpr0 = COPY %1
93    ; WAVE32-LABEL: name: sitofp_s32_to_s16_vs
94    ; WAVE32: liveins: $sgpr0
95    ; WAVE32: $vcc_hi = IMPLICIT_DEF
96    ; WAVE32: [[COPY:%[0-9]+]]:sreg_32 = COPY $sgpr0
97    ; WAVE32: [[V_CVT_F32_I32_e32_:%[0-9]+]]:vgpr_32 = V_CVT_F32_I32_e32 [[COPY]], implicit $mode, implicit $exec
98    ; WAVE32: %1:vgpr_32 = nofpexcept V_CVT_F16_F32_e32 [[V_CVT_F32_I32_e32_]], implicit $mode, implicit $exec
99    ; WAVE32: $vgpr0 = COPY %1
100    %0:sgpr(s32) = COPY $sgpr0
101    %1:vgpr(s16) = G_SITOFP %0
102    %2:vgpr(s32) = G_ANYEXT %1
103    $vgpr0 = COPY %2
104...
105