1; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py
2; RUN: llc -global-isel -mtriple=amdgcn-mesa-mesa3d -mcpu=gfx900 -verify-machineinstrs < %s | FileCheck -check-prefix=GFX9 %s
3; RUN: llc -global-isel -mtriple=amdgcn-mesa-mesa3d -mcpu=gfx1010 -verify-machineinstrs < %s | FileCheck -check-prefix=GFX10 %s
4
5define amdgpu_ps <4 x float> @getresinfo_1d(<8 x i32> inreg %rsrc, i16 %mip) {
6; GFX9-LABEL: getresinfo_1d:
7; GFX9:       ; %bb.0: ; %main_body
8; GFX9-NEXT:    s_mov_b32 s0, s2
9; GFX9-NEXT:    s_mov_b32 s1, s3
10; GFX9-NEXT:    s_mov_b32 s2, s4
11; GFX9-NEXT:    s_mov_b32 s3, s5
12; GFX9-NEXT:    s_mov_b32 s4, s6
13; GFX9-NEXT:    s_mov_b32 s5, s7
14; GFX9-NEXT:    s_mov_b32 s6, s8
15; GFX9-NEXT:    s_mov_b32 s7, s9
16; GFX9-NEXT:    image_get_resinfo v[0:3], v0, s[0:7] dmask:0xf unorm a16
17; GFX9-NEXT:    s_waitcnt vmcnt(0)
18; GFX9-NEXT:    ; return to shader part epilog
19;
20; GFX10-LABEL: getresinfo_1d:
21; GFX10:       ; %bb.0: ; %main_body
22; GFX10-NEXT:    s_mov_b32 s0, s2
23; GFX10-NEXT:    s_mov_b32 s1, s3
24; GFX10-NEXT:    s_mov_b32 s2, s4
25; GFX10-NEXT:    s_mov_b32 s3, s5
26; GFX10-NEXT:    s_mov_b32 s4, s6
27; GFX10-NEXT:    s_mov_b32 s5, s7
28; GFX10-NEXT:    s_mov_b32 s6, s8
29; GFX10-NEXT:    s_mov_b32 s7, s9
30; GFX10-NEXT:    ; implicit-def: $vcc_hi
31; GFX10-NEXT:    image_get_resinfo v[0:3], v0, s[0:7] dmask:0xf dim:SQ_RSRC_IMG_1D unorm a16
32; GFX10-NEXT:    s_waitcnt vmcnt(0)
33; GFX10-NEXT:    ; return to shader part epilog
34main_body:
35  %v = call <4 x float> @llvm.amdgcn.image.getresinfo.1d.v4f32.i16(i32 15, i16 %mip, <8 x i32> %rsrc, i32 0, i32 0)
36  ret <4 x float> %v
37}
38
39define amdgpu_ps <4 x float> @getresinfo_2d(<8 x i32> inreg %rsrc, i16 %mip) {
40; GFX9-LABEL: getresinfo_2d:
41; GFX9:       ; %bb.0: ; %main_body
42; GFX9-NEXT:    s_mov_b32 s0, s2
43; GFX9-NEXT:    s_mov_b32 s1, s3
44; GFX9-NEXT:    s_mov_b32 s2, s4
45; GFX9-NEXT:    s_mov_b32 s3, s5
46; GFX9-NEXT:    s_mov_b32 s4, s6
47; GFX9-NEXT:    s_mov_b32 s5, s7
48; GFX9-NEXT:    s_mov_b32 s6, s8
49; GFX9-NEXT:    s_mov_b32 s7, s9
50; GFX9-NEXT:    image_get_resinfo v[0:3], v0, s[0:7] dmask:0xf unorm a16
51; GFX9-NEXT:    s_waitcnt vmcnt(0)
52; GFX9-NEXT:    ; return to shader part epilog
53;
54; GFX10-LABEL: getresinfo_2d:
55; GFX10:       ; %bb.0: ; %main_body
56; GFX10-NEXT:    s_mov_b32 s0, s2
57; GFX10-NEXT:    s_mov_b32 s1, s3
58; GFX10-NEXT:    s_mov_b32 s2, s4
59; GFX10-NEXT:    s_mov_b32 s3, s5
60; GFX10-NEXT:    s_mov_b32 s4, s6
61; GFX10-NEXT:    s_mov_b32 s5, s7
62; GFX10-NEXT:    s_mov_b32 s6, s8
63; GFX10-NEXT:    s_mov_b32 s7, s9
64; GFX10-NEXT:    ; implicit-def: $vcc_hi
65; GFX10-NEXT:    image_get_resinfo v[0:3], v0, s[0:7] dmask:0xf dim:SQ_RSRC_IMG_2D unorm a16
66; GFX10-NEXT:    s_waitcnt vmcnt(0)
67; GFX10-NEXT:    ; return to shader part epilog
68main_body:
69  %v = call <4 x float> @llvm.amdgcn.image.getresinfo.2d.v4f32.i16(i32 15, i16 %mip, <8 x i32> %rsrc, i32 0, i32 0)
70  ret <4 x float> %v
71}
72
73define amdgpu_ps <4 x float> @getresinfo_3d(<8 x i32> inreg %rsrc, i16 %mip) {
74; GFX9-LABEL: getresinfo_3d:
75; GFX9:       ; %bb.0: ; %main_body
76; GFX9-NEXT:    s_mov_b32 s0, s2
77; GFX9-NEXT:    s_mov_b32 s1, s3
78; GFX9-NEXT:    s_mov_b32 s2, s4
79; GFX9-NEXT:    s_mov_b32 s3, s5
80; GFX9-NEXT:    s_mov_b32 s4, s6
81; GFX9-NEXT:    s_mov_b32 s5, s7
82; GFX9-NEXT:    s_mov_b32 s6, s8
83; GFX9-NEXT:    s_mov_b32 s7, s9
84; GFX9-NEXT:    image_get_resinfo v[0:3], v0, s[0:7] dmask:0xf unorm a16
85; GFX9-NEXT:    s_waitcnt vmcnt(0)
86; GFX9-NEXT:    ; return to shader part epilog
87;
88; GFX10-LABEL: getresinfo_3d:
89; GFX10:       ; %bb.0: ; %main_body
90; GFX10-NEXT:    s_mov_b32 s0, s2
91; GFX10-NEXT:    s_mov_b32 s1, s3
92; GFX10-NEXT:    s_mov_b32 s2, s4
93; GFX10-NEXT:    s_mov_b32 s3, s5
94; GFX10-NEXT:    s_mov_b32 s4, s6
95; GFX10-NEXT:    s_mov_b32 s5, s7
96; GFX10-NEXT:    s_mov_b32 s6, s8
97; GFX10-NEXT:    s_mov_b32 s7, s9
98; GFX10-NEXT:    ; implicit-def: $vcc_hi
99; GFX10-NEXT:    image_get_resinfo v[0:3], v0, s[0:7] dmask:0xf dim:SQ_RSRC_IMG_3D unorm a16
100; GFX10-NEXT:    s_waitcnt vmcnt(0)
101; GFX10-NEXT:    ; return to shader part epilog
102main_body:
103  %v = call <4 x float> @llvm.amdgcn.image.getresinfo.3d.v4f32.i16(i32 15, i16 %mip, <8 x i32> %rsrc, i32 0, i32 0)
104  ret <4 x float> %v
105}
106
107define amdgpu_ps <4 x float> @getresinfo_cube(<8 x i32> inreg %rsrc, i16 %mip) {
108; GFX9-LABEL: getresinfo_cube:
109; GFX9:       ; %bb.0: ; %main_body
110; GFX9-NEXT:    s_mov_b32 s0, s2
111; GFX9-NEXT:    s_mov_b32 s1, s3
112; GFX9-NEXT:    s_mov_b32 s2, s4
113; GFX9-NEXT:    s_mov_b32 s3, s5
114; GFX9-NEXT:    s_mov_b32 s4, s6
115; GFX9-NEXT:    s_mov_b32 s5, s7
116; GFX9-NEXT:    s_mov_b32 s6, s8
117; GFX9-NEXT:    s_mov_b32 s7, s9
118; GFX9-NEXT:    image_get_resinfo v[0:3], v0, s[0:7] dmask:0xf unorm a16 da
119; GFX9-NEXT:    s_waitcnt vmcnt(0)
120; GFX9-NEXT:    ; return to shader part epilog
121;
122; GFX10-LABEL: getresinfo_cube:
123; GFX10:       ; %bb.0: ; %main_body
124; GFX10-NEXT:    s_mov_b32 s0, s2
125; GFX10-NEXT:    s_mov_b32 s1, s3
126; GFX10-NEXT:    s_mov_b32 s2, s4
127; GFX10-NEXT:    s_mov_b32 s3, s5
128; GFX10-NEXT:    s_mov_b32 s4, s6
129; GFX10-NEXT:    s_mov_b32 s5, s7
130; GFX10-NEXT:    s_mov_b32 s6, s8
131; GFX10-NEXT:    s_mov_b32 s7, s9
132; GFX10-NEXT:    ; implicit-def: $vcc_hi
133; GFX10-NEXT:    image_get_resinfo v[0:3], v0, s[0:7] dmask:0xf dim:SQ_RSRC_IMG_CUBE unorm a16
134; GFX10-NEXT:    s_waitcnt vmcnt(0)
135; GFX10-NEXT:    ; return to shader part epilog
136main_body:
137  %v = call <4 x float> @llvm.amdgcn.image.getresinfo.cube.v4f32.i16(i32 15, i16 %mip, <8 x i32> %rsrc, i32 0, i32 0)
138  ret <4 x float> %v
139}
140
141define amdgpu_ps <4 x float> @getresinfo_1darray(<8 x i32> inreg %rsrc, i16 %mip) {
142; GFX9-LABEL: getresinfo_1darray:
143; GFX9:       ; %bb.0: ; %main_body
144; GFX9-NEXT:    s_mov_b32 s0, s2
145; GFX9-NEXT:    s_mov_b32 s1, s3
146; GFX9-NEXT:    s_mov_b32 s2, s4
147; GFX9-NEXT:    s_mov_b32 s3, s5
148; GFX9-NEXT:    s_mov_b32 s4, s6
149; GFX9-NEXT:    s_mov_b32 s5, s7
150; GFX9-NEXT:    s_mov_b32 s6, s8
151; GFX9-NEXT:    s_mov_b32 s7, s9
152; GFX9-NEXT:    image_get_resinfo v[0:3], v0, s[0:7] dmask:0xf unorm a16 da
153; GFX9-NEXT:    s_waitcnt vmcnt(0)
154; GFX9-NEXT:    ; return to shader part epilog
155;
156; GFX10-LABEL: getresinfo_1darray:
157; GFX10:       ; %bb.0: ; %main_body
158; GFX10-NEXT:    s_mov_b32 s0, s2
159; GFX10-NEXT:    s_mov_b32 s1, s3
160; GFX10-NEXT:    s_mov_b32 s2, s4
161; GFX10-NEXT:    s_mov_b32 s3, s5
162; GFX10-NEXT:    s_mov_b32 s4, s6
163; GFX10-NEXT:    s_mov_b32 s5, s7
164; GFX10-NEXT:    s_mov_b32 s6, s8
165; GFX10-NEXT:    s_mov_b32 s7, s9
166; GFX10-NEXT:    ; implicit-def: $vcc_hi
167; GFX10-NEXT:    image_get_resinfo v[0:3], v0, s[0:7] dmask:0xf dim:SQ_RSRC_IMG_1D_ARRAY unorm a16
168; GFX10-NEXT:    s_waitcnt vmcnt(0)
169; GFX10-NEXT:    ; return to shader part epilog
170main_body:
171  %v = call <4 x float> @llvm.amdgcn.image.getresinfo.1darray.v4f32.i16(i32 15, i16 %mip, <8 x i32> %rsrc, i32 0, i32 0)
172  ret <4 x float> %v
173}
174
175define amdgpu_ps <4 x float> @getresinfo_2darray(<8 x i32> inreg %rsrc, i16 %mip) {
176; GFX9-LABEL: getresinfo_2darray:
177; GFX9:       ; %bb.0: ; %main_body
178; GFX9-NEXT:    s_mov_b32 s0, s2
179; GFX9-NEXT:    s_mov_b32 s1, s3
180; GFX9-NEXT:    s_mov_b32 s2, s4
181; GFX9-NEXT:    s_mov_b32 s3, s5
182; GFX9-NEXT:    s_mov_b32 s4, s6
183; GFX9-NEXT:    s_mov_b32 s5, s7
184; GFX9-NEXT:    s_mov_b32 s6, s8
185; GFX9-NEXT:    s_mov_b32 s7, s9
186; GFX9-NEXT:    image_get_resinfo v[0:3], v0, s[0:7] dmask:0xf unorm a16 da
187; GFX9-NEXT:    s_waitcnt vmcnt(0)
188; GFX9-NEXT:    ; return to shader part epilog
189;
190; GFX10-LABEL: getresinfo_2darray:
191; GFX10:       ; %bb.0: ; %main_body
192; GFX10-NEXT:    s_mov_b32 s0, s2
193; GFX10-NEXT:    s_mov_b32 s1, s3
194; GFX10-NEXT:    s_mov_b32 s2, s4
195; GFX10-NEXT:    s_mov_b32 s3, s5
196; GFX10-NEXT:    s_mov_b32 s4, s6
197; GFX10-NEXT:    s_mov_b32 s5, s7
198; GFX10-NEXT:    s_mov_b32 s6, s8
199; GFX10-NEXT:    s_mov_b32 s7, s9
200; GFX10-NEXT:    ; implicit-def: $vcc_hi
201; GFX10-NEXT:    image_get_resinfo v[0:3], v0, s[0:7] dmask:0xf dim:SQ_RSRC_IMG_2D_ARRAY unorm a16
202; GFX10-NEXT:    s_waitcnt vmcnt(0)
203; GFX10-NEXT:    ; return to shader part epilog
204main_body:
205  %v = call <4 x float> @llvm.amdgcn.image.getresinfo.2darray.v4f32.i16(i32 15, i16 %mip, <8 x i32> %rsrc, i32 0, i32 0)
206  ret <4 x float> %v
207}
208
209define amdgpu_ps <4 x float> @getresinfo_2dmsaa(<8 x i32> inreg %rsrc, i16 %mip) {
210; GFX9-LABEL: getresinfo_2dmsaa:
211; GFX9:       ; %bb.0: ; %main_body
212; GFX9-NEXT:    s_mov_b32 s0, s2
213; GFX9-NEXT:    s_mov_b32 s1, s3
214; GFX9-NEXT:    s_mov_b32 s2, s4
215; GFX9-NEXT:    s_mov_b32 s3, s5
216; GFX9-NEXT:    s_mov_b32 s4, s6
217; GFX9-NEXT:    s_mov_b32 s5, s7
218; GFX9-NEXT:    s_mov_b32 s6, s8
219; GFX9-NEXT:    s_mov_b32 s7, s9
220; GFX9-NEXT:    image_get_resinfo v[0:3], v0, s[0:7] dmask:0xf unorm a16
221; GFX9-NEXT:    s_waitcnt vmcnt(0)
222; GFX9-NEXT:    ; return to shader part epilog
223;
224; GFX10-LABEL: getresinfo_2dmsaa:
225; GFX10:       ; %bb.0: ; %main_body
226; GFX10-NEXT:    s_mov_b32 s0, s2
227; GFX10-NEXT:    s_mov_b32 s1, s3
228; GFX10-NEXT:    s_mov_b32 s2, s4
229; GFX10-NEXT:    s_mov_b32 s3, s5
230; GFX10-NEXT:    s_mov_b32 s4, s6
231; GFX10-NEXT:    s_mov_b32 s5, s7
232; GFX10-NEXT:    s_mov_b32 s6, s8
233; GFX10-NEXT:    s_mov_b32 s7, s9
234; GFX10-NEXT:    ; implicit-def: $vcc_hi
235; GFX10-NEXT:    image_get_resinfo v[0:3], v0, s[0:7] dmask:0xf dim:SQ_RSRC_IMG_2D_MSAA unorm a16
236; GFX10-NEXT:    s_waitcnt vmcnt(0)
237; GFX10-NEXT:    ; return to shader part epilog
238main_body:
239  %v = call <4 x float> @llvm.amdgcn.image.getresinfo.2dmsaa.v4f32.i16(i32 15, i16 %mip, <8 x i32> %rsrc, i32 0, i32 0)
240  ret <4 x float> %v
241}
242
243define amdgpu_ps <4 x float> @getresinfo_2darraymsaa(<8 x i32> inreg %rsrc, i16 %mip) {
244; GFX9-LABEL: getresinfo_2darraymsaa:
245; GFX9:       ; %bb.0: ; %main_body
246; GFX9-NEXT:    s_mov_b32 s0, s2
247; GFX9-NEXT:    s_mov_b32 s1, s3
248; GFX9-NEXT:    s_mov_b32 s2, s4
249; GFX9-NEXT:    s_mov_b32 s3, s5
250; GFX9-NEXT:    s_mov_b32 s4, s6
251; GFX9-NEXT:    s_mov_b32 s5, s7
252; GFX9-NEXT:    s_mov_b32 s6, s8
253; GFX9-NEXT:    s_mov_b32 s7, s9
254; GFX9-NEXT:    image_get_resinfo v[0:3], v0, s[0:7] dmask:0xf unorm a16 da
255; GFX9-NEXT:    s_waitcnt vmcnt(0)
256; GFX9-NEXT:    ; return to shader part epilog
257;
258; GFX10-LABEL: getresinfo_2darraymsaa:
259; GFX10:       ; %bb.0: ; %main_body
260; GFX10-NEXT:    s_mov_b32 s0, s2
261; GFX10-NEXT:    s_mov_b32 s1, s3
262; GFX10-NEXT:    s_mov_b32 s2, s4
263; GFX10-NEXT:    s_mov_b32 s3, s5
264; GFX10-NEXT:    s_mov_b32 s4, s6
265; GFX10-NEXT:    s_mov_b32 s5, s7
266; GFX10-NEXT:    s_mov_b32 s6, s8
267; GFX10-NEXT:    s_mov_b32 s7, s9
268; GFX10-NEXT:    ; implicit-def: $vcc_hi
269; GFX10-NEXT:    image_get_resinfo v[0:3], v0, s[0:7] dmask:0xf dim:SQ_RSRC_IMG_2D_MSAA_ARRAY unorm a16
270; GFX10-NEXT:    s_waitcnt vmcnt(0)
271; GFX10-NEXT:    ; return to shader part epilog
272main_body:
273  %v = call <4 x float> @llvm.amdgcn.image.getresinfo.2darraymsaa.v4f32.i16(i32 15, i16 %mip, <8 x i32> %rsrc, i32 0, i32 0)
274  ret <4 x float> %v
275}
276
277define amdgpu_ps <4 x float> @getresinfo_dmask0(<8 x i32> inreg %rsrc, <4 x float> %vdata, i16 %mip) {
278; GFX9-LABEL: getresinfo_dmask0:
279; GFX9:       ; %bb.0: ; %main_body
280; GFX9-NEXT:    ; return to shader part epilog
281;
282; GFX10-LABEL: getresinfo_dmask0:
283; GFX10:       ; %bb.0: ; %main_body
284; GFX10-NEXT:    ; implicit-def: $vcc_hi
285; GFX10-NEXT:    ; return to shader part epilog
286main_body:
287  %r = call <4 x float> @llvm.amdgcn.image.getresinfo.1d.v4f32.i16(i32 0, i16 %mip, <8 x i32> %rsrc, i32 0, i32 0)
288  ret <4 x float> %r
289}
290
291declare <4 x float> @llvm.amdgcn.image.getresinfo.1d.v4f32.i16(i32 immarg, i16, <8 x i32>, i32 immarg, i32 immarg) #1
292declare <4 x float> @llvm.amdgcn.image.getresinfo.2d.v4f32.i16(i32 immarg, i16, <8 x i32>, i32 immarg, i32 immarg) #1
293declare <4 x float> @llvm.amdgcn.image.getresinfo.3d.v4f32.i16(i32 immarg, i16, <8 x i32>, i32 immarg, i32 immarg) #1
294declare <4 x float> @llvm.amdgcn.image.getresinfo.cube.v4f32.i16(i32 immarg, i16, <8 x i32>, i32 immarg, i32 immarg) #1
295declare <4 x float> @llvm.amdgcn.image.getresinfo.1darray.v4f32.i16(i32 immarg, i16, <8 x i32>, i32 immarg, i32 immarg) #1
296declare <4 x float> @llvm.amdgcn.image.getresinfo.2darray.v4f32.i16(i32 immarg, i16, <8 x i32>, i32 immarg, i32 immarg) #1
297declare <4 x float> @llvm.amdgcn.image.getresinfo.2dmsaa.v4f32.i16(i32 immarg, i16, <8 x i32>, i32 immarg, i32 immarg) #1
298declare <4 x float> @llvm.amdgcn.image.getresinfo.2darraymsaa.v4f32.i16(i32 immarg, i16, <8 x i32>, i32 immarg, i32 immarg) #1
299
300attributes #0 = { nounwind }
301attributes #1 = { nounwind readnone }
302